xref: /linux/drivers/video/fbdev/omap2/omapfb/displays/panel-nec-nl8048hl11.c (revision 48dea9a700c8728cc31a1dd44588b97578de86ee)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * NEC NL8048HL11 Panel driver
4  *
5  * Copyright (C) 2010 Texas Instruments Inc.
6  * Author: Erik Gilling <konkers@android.com>
7  * Converted to new DSS device model: Tomi Valkeinen <tomi.valkeinen@ti.com>
8  */
9 
10 #include <linux/module.h>
11 #include <linux/delay.h>
12 #include <linux/spi/spi.h>
13 #include <linux/fb.h>
14 #include <linux/gpio.h>
15 #include <linux/of_gpio.h>
16 
17 #include <video/omapfb_dss.h>
18 
19 struct panel_drv_data {
20 	struct omap_dss_device	dssdev;
21 	struct omap_dss_device *in;
22 
23 	struct omap_video_timings videomode;
24 
25 	int data_lines;
26 
27 	int res_gpio;
28 	int qvga_gpio;
29 
30 	struct spi_device *spi;
31 };
32 
33 #define LCD_XRES		800
34 #define LCD_YRES		480
35 /*
36  * NEC PIX Clock Ratings
37  * MIN:21.8MHz TYP:23.8MHz MAX:25.7MHz
38  */
39 #define LCD_PIXEL_CLOCK		23800000
40 
41 static const struct {
42 	unsigned char addr;
43 	unsigned char dat;
44 } nec_8048_init_seq[] = {
45 	{ 3, 0x01 }, { 0, 0x00 }, { 1, 0x01 }, { 4, 0x00 }, { 5, 0x14 },
46 	{ 6, 0x24 }, { 16, 0xD7 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x55 },
47 	{ 20, 0x01 }, { 21, 0x70 }, { 22, 0x1E }, { 23, 0x25 },	{ 24, 0x25 },
48 	{ 25, 0x02 }, { 26, 0x02 }, { 27, 0xA0 }, { 32, 0x2F }, { 33, 0x0F },
49 	{ 34, 0x0F }, { 35, 0x0F }, { 36, 0x0F }, { 37, 0x0F },	{ 38, 0x0F },
50 	{ 39, 0x00 }, { 40, 0x02 }, { 41, 0x02 }, { 42, 0x02 },	{ 43, 0x0F },
51 	{ 44, 0x0F }, { 45, 0x0F }, { 46, 0x0F }, { 47, 0x0F },	{ 48, 0x0F },
52 	{ 49, 0x0F }, { 50, 0x00 }, { 51, 0x02 }, { 52, 0x02 }, { 53, 0x02 },
53 	{ 80, 0x0C }, { 83, 0x42 }, { 84, 0x42 }, { 85, 0x41 },	{ 86, 0x14 },
54 	{ 89, 0x88 }, { 90, 0x01 }, { 91, 0x00 }, { 92, 0x02 },	{ 93, 0x0C },
55 	{ 94, 0x1C }, { 95, 0x27 }, { 98, 0x49 }, { 99, 0x27 }, { 102, 0x76 },
56 	{ 103, 0x27 }, { 112, 0x01 }, { 113, 0x0E }, { 114, 0x02 },
57 	{ 115, 0x0C }, { 118, 0x0C }, { 121, 0x30 }, { 130, 0x00 },
58 	{ 131, 0x00 }, { 132, 0xFC }, { 134, 0x00 }, { 136, 0x00 },
59 	{ 138, 0x00 }, { 139, 0x00 }, { 140, 0x00 }, { 141, 0xFC },
60 	{ 143, 0x00 }, { 145, 0x00 }, { 147, 0x00 }, { 148, 0x00 },
61 	{ 149, 0x00 }, { 150, 0xFC }, { 152, 0x00 }, { 154, 0x00 },
62 	{ 156, 0x00 }, { 157, 0x00 }, { 2, 0x00 },
63 };
64 
65 static const struct omap_video_timings nec_8048_panel_timings = {
66 	.x_res		= LCD_XRES,
67 	.y_res		= LCD_YRES,
68 	.pixelclock	= LCD_PIXEL_CLOCK,
69 	.hfp		= 6,
70 	.hsw		= 1,
71 	.hbp		= 4,
72 	.vfp		= 3,
73 	.vsw		= 1,
74 	.vbp		= 4,
75 
76 	.vsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
77 	.hsync_level	= OMAPDSS_SIG_ACTIVE_LOW,
78 	.data_pclk_edge	= OMAPDSS_DRIVE_SIG_RISING_EDGE,
79 	.de_level	= OMAPDSS_SIG_ACTIVE_HIGH,
80 	.sync_pclk_edge	= OMAPDSS_DRIVE_SIG_RISING_EDGE,
81 };
82 
83 #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev)
84 
85 static int nec_8048_spi_send(struct spi_device *spi, unsigned char reg_addr,
86 			unsigned char reg_data)
87 {
88 	int ret = 0;
89 	unsigned int cmd = 0, data = 0;
90 
91 	cmd = 0x0000 | reg_addr; /* register address write */
92 	data = 0x0100 | reg_data; /* register data write */
93 	data = (cmd << 16) | data;
94 
95 	ret = spi_write(spi, (unsigned char *)&data, 4);
96 	if (ret)
97 		pr_err("error in spi_write %x\n", data);
98 
99 	return ret;
100 }
101 
102 static int init_nec_8048_wvga_lcd(struct spi_device *spi)
103 {
104 	unsigned int i;
105 	/* Initialization Sequence */
106 	/* nec_8048_spi_send(spi, REG, VAL) */
107 	for (i = 0; i < (ARRAY_SIZE(nec_8048_init_seq) - 1); i++)
108 		nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
109 				nec_8048_init_seq[i].dat);
110 	udelay(20);
111 	nec_8048_spi_send(spi, nec_8048_init_seq[i].addr,
112 				nec_8048_init_seq[i].dat);
113 	return 0;
114 }
115 
116 static int nec_8048_connect(struct omap_dss_device *dssdev)
117 {
118 	struct panel_drv_data *ddata = to_panel_data(dssdev);
119 	struct omap_dss_device *in = ddata->in;
120 	int r;
121 
122 	if (omapdss_device_is_connected(dssdev))
123 		return 0;
124 
125 	r = in->ops.dpi->connect(in, dssdev);
126 	if (r)
127 		return r;
128 
129 	return 0;
130 }
131 
132 static void nec_8048_disconnect(struct omap_dss_device *dssdev)
133 {
134 	struct panel_drv_data *ddata = to_panel_data(dssdev);
135 	struct omap_dss_device *in = ddata->in;
136 
137 	if (!omapdss_device_is_connected(dssdev))
138 		return;
139 
140 	in->ops.dpi->disconnect(in, dssdev);
141 }
142 
143 static int nec_8048_enable(struct omap_dss_device *dssdev)
144 {
145 	struct panel_drv_data *ddata = to_panel_data(dssdev);
146 	struct omap_dss_device *in = ddata->in;
147 	int r;
148 
149 	if (!omapdss_device_is_connected(dssdev))
150 		return -ENODEV;
151 
152 	if (omapdss_device_is_enabled(dssdev))
153 		return 0;
154 
155 	if (ddata->data_lines)
156 		in->ops.dpi->set_data_lines(in, ddata->data_lines);
157 	in->ops.dpi->set_timings(in, &ddata->videomode);
158 
159 	r = in->ops.dpi->enable(in);
160 	if (r)
161 		return r;
162 
163 	if (gpio_is_valid(ddata->res_gpio))
164 		gpio_set_value_cansleep(ddata->res_gpio, 1);
165 
166 	dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
167 
168 	return 0;
169 }
170 
171 static void nec_8048_disable(struct omap_dss_device *dssdev)
172 {
173 	struct panel_drv_data *ddata = to_panel_data(dssdev);
174 	struct omap_dss_device *in = ddata->in;
175 
176 	if (!omapdss_device_is_enabled(dssdev))
177 		return;
178 
179 	if (gpio_is_valid(ddata->res_gpio))
180 		gpio_set_value_cansleep(ddata->res_gpio, 0);
181 
182 	in->ops.dpi->disable(in);
183 
184 	dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
185 }
186 
187 static void nec_8048_set_timings(struct omap_dss_device *dssdev,
188 		struct omap_video_timings *timings)
189 {
190 	struct panel_drv_data *ddata = to_panel_data(dssdev);
191 	struct omap_dss_device *in = ddata->in;
192 
193 	ddata->videomode = *timings;
194 	dssdev->panel.timings = *timings;
195 
196 	in->ops.dpi->set_timings(in, timings);
197 }
198 
199 static void nec_8048_get_timings(struct omap_dss_device *dssdev,
200 		struct omap_video_timings *timings)
201 {
202 	struct panel_drv_data *ddata = to_panel_data(dssdev);
203 
204 	*timings = ddata->videomode;
205 }
206 
207 static int nec_8048_check_timings(struct omap_dss_device *dssdev,
208 		struct omap_video_timings *timings)
209 {
210 	struct panel_drv_data *ddata = to_panel_data(dssdev);
211 	struct omap_dss_device *in = ddata->in;
212 
213 	return in->ops.dpi->check_timings(in, timings);
214 }
215 
216 static struct omap_dss_driver nec_8048_ops = {
217 	.connect	= nec_8048_connect,
218 	.disconnect	= nec_8048_disconnect,
219 
220 	.enable		= nec_8048_enable,
221 	.disable	= nec_8048_disable,
222 
223 	.set_timings	= nec_8048_set_timings,
224 	.get_timings	= nec_8048_get_timings,
225 	.check_timings	= nec_8048_check_timings,
226 
227 	.get_resolution	= omapdss_default_get_resolution,
228 };
229 
230 
231 static int nec_8048_probe_of(struct spi_device *spi)
232 {
233 	struct device_node *node = spi->dev.of_node;
234 	struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
235 	struct omap_dss_device *in;
236 	int gpio;
237 
238 	gpio = of_get_named_gpio(node, "reset-gpios", 0);
239 	if (!gpio_is_valid(gpio)) {
240 		dev_err(&spi->dev, "failed to parse enable gpio\n");
241 		return gpio;
242 	}
243 	ddata->res_gpio = gpio;
244 
245 	/* XXX the panel spec doesn't mention any QVGA pin?? */
246 	ddata->qvga_gpio = -ENOENT;
247 
248 	in = omapdss_of_find_source_for_first_ep(node);
249 	if (IS_ERR(in)) {
250 		dev_err(&spi->dev, "failed to find video source\n");
251 		return PTR_ERR(in);
252 	}
253 
254 	ddata->in = in;
255 
256 	return 0;
257 }
258 
259 static int nec_8048_probe(struct spi_device *spi)
260 {
261 	struct panel_drv_data *ddata;
262 	struct omap_dss_device *dssdev;
263 	int r;
264 
265 	dev_dbg(&spi->dev, "%s\n", __func__);
266 
267 	if (!spi->dev.of_node)
268 		return -ENODEV;
269 
270 	spi->mode = SPI_MODE_0;
271 	spi->bits_per_word = 32;
272 
273 	r = spi_setup(spi);
274 	if (r < 0) {
275 		dev_err(&spi->dev, "spi_setup failed: %d\n", r);
276 		return r;
277 	}
278 
279 	init_nec_8048_wvga_lcd(spi);
280 
281 	ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL);
282 	if (ddata == NULL)
283 		return -ENOMEM;
284 
285 	dev_set_drvdata(&spi->dev, ddata);
286 
287 	ddata->spi = spi;
288 
289 	r = nec_8048_probe_of(spi);
290 	if (r)
291 		return r;
292 
293 	if (gpio_is_valid(ddata->qvga_gpio)) {
294 		r = devm_gpio_request_one(&spi->dev, ddata->qvga_gpio,
295 				GPIOF_OUT_INIT_HIGH, "lcd QVGA");
296 		if (r)
297 			goto err_gpio;
298 	}
299 
300 	if (gpio_is_valid(ddata->res_gpio)) {
301 		r = devm_gpio_request_one(&spi->dev, ddata->res_gpio,
302 				GPIOF_OUT_INIT_LOW, "lcd RES");
303 		if (r)
304 			goto err_gpio;
305 	}
306 
307 	ddata->videomode = nec_8048_panel_timings;
308 
309 	dssdev = &ddata->dssdev;
310 	dssdev->dev = &spi->dev;
311 	dssdev->driver = &nec_8048_ops;
312 	dssdev->type = OMAP_DISPLAY_TYPE_DPI;
313 	dssdev->owner = THIS_MODULE;
314 	dssdev->panel.timings = ddata->videomode;
315 
316 	r = omapdss_register_display(dssdev);
317 	if (r) {
318 		dev_err(&spi->dev, "Failed to register panel\n");
319 		goto err_reg;
320 	}
321 
322 	return 0;
323 
324 err_reg:
325 err_gpio:
326 	omap_dss_put_device(ddata->in);
327 	return r;
328 }
329 
330 static int nec_8048_remove(struct spi_device *spi)
331 {
332 	struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
333 	struct omap_dss_device *dssdev = &ddata->dssdev;
334 	struct omap_dss_device *in = ddata->in;
335 
336 	dev_dbg(&ddata->spi->dev, "%s\n", __func__);
337 
338 	omapdss_unregister_display(dssdev);
339 
340 	nec_8048_disable(dssdev);
341 	nec_8048_disconnect(dssdev);
342 
343 	omap_dss_put_device(in);
344 
345 	return 0;
346 }
347 
348 #ifdef CONFIG_PM_SLEEP
349 static int nec_8048_suspend(struct device *dev)
350 {
351 	struct spi_device *spi = to_spi_device(dev);
352 
353 	nec_8048_spi_send(spi, 2, 0x01);
354 	mdelay(40);
355 
356 	return 0;
357 }
358 
359 static int nec_8048_resume(struct device *dev)
360 {
361 	struct spi_device *spi = to_spi_device(dev);
362 
363 	/* reinitialize the panel */
364 	spi_setup(spi);
365 	nec_8048_spi_send(spi, 2, 0x00);
366 	init_nec_8048_wvga_lcd(spi);
367 
368 	return 0;
369 }
370 static SIMPLE_DEV_PM_OPS(nec_8048_pm_ops, nec_8048_suspend,
371 		nec_8048_resume);
372 #define NEC_8048_PM_OPS (&nec_8048_pm_ops)
373 #else
374 #define NEC_8048_PM_OPS NULL
375 #endif
376 
377 static const struct of_device_id nec_8048_of_match[] = {
378 	{ .compatible = "omapdss,nec,nl8048hl11", },
379 	{},
380 };
381 
382 MODULE_DEVICE_TABLE(of, nec_8048_of_match);
383 
384 static struct spi_driver nec_8048_driver = {
385 	.driver = {
386 		.name	= "panel-nec-nl8048hl11",
387 		.pm	= NEC_8048_PM_OPS,
388 		.of_match_table = nec_8048_of_match,
389 		.suppress_bind_attrs = true,
390 	},
391 	.probe	= nec_8048_probe,
392 	.remove	= nec_8048_remove,
393 };
394 
395 module_spi_driver(nec_8048_driver);
396 
397 MODULE_ALIAS("spi:nec,nl8048hl11");
398 MODULE_AUTHOR("Erik Gilling <konkers@android.com>");
399 MODULE_DESCRIPTION("NEC-NL8048HL11 Driver");
400 MODULE_LICENSE("GPL");
401