1 /* 2 * 3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 4 * 5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> 6 * 7 * Portions Copyright (c) 2001 Matrox Graphics Inc. 8 * 9 * Version: 1.65 2002/08/14 10 * 11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> 12 * 13 * Contributors: "menion?" <menion@mindless.com> 14 * Betatesting, fixes, ideas 15 * 16 * "Kurt Garloff" <garloff@suse.de> 17 * Betatesting, fixes, ideas, videomodes, videomodes timmings 18 * 19 * "Tom Rini" <trini@kernel.crashing.org> 20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas 21 * 22 * "Bibek Sahu" <scorpio@dodds.net> 23 * Access device through readb|w|l and write b|w|l 24 * Extensive debugging stuff 25 * 26 * "Daniel Haun" <haund@usa.net> 27 * Testing, hardware cursor fixes 28 * 29 * "Scott Wood" <sawst46+@pitt.edu> 30 * Fixes 31 * 32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> 33 * Betatesting 34 * 35 * "Kelly French" <targon@hazmat.com> 36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> 37 * Betatesting, bug reporting 38 * 39 * "Pablo Bianucci" <pbian@pccp.com.ar> 40 * Fixes, ideas, betatesting 41 * 42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> 43 * Fixes, enhandcements, ideas, betatesting 44 * 45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> 46 * PPC betatesting, PPC support, backward compatibility 47 * 48 * "Paul Womar" <Paul@pwomar.demon.co.uk> 49 * "Owen Waller" <O.Waller@ee.qub.ac.uk> 50 * PPC betatesting 51 * 52 * "Thomas Pornin" <pornin@bolet.ens.fr> 53 * Alpha betatesting 54 * 55 * "Pieter van Leuven" <pvl@iae.nl> 56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> 57 * G100 testing 58 * 59 * "H. Peter Arvin" <hpa@transmeta.com> 60 * Ideas 61 * 62 * "Cort Dougan" <cort@cs.nmt.edu> 63 * CHRP fixes and PReP cleanup 64 * 65 * "Mark Vojkovich" <mvojkovi@ucsd.edu> 66 * G400 support 67 * 68 * "Samuel Hocevar" <sam@via.ecp.fr> 69 * Fixes 70 * 71 * "Anton Altaparmakov" <AntonA@bigfoot.com> 72 * G400 MAX/non-MAX distinction 73 * 74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com> 75 * memtype extension (needed for GXT130P RS/6000 adapter) 76 * 77 * "Uns Lider" <unslider@miranda.org> 78 * G100 PLNWT fixes 79 * 80 * "Denis Zaitsev" <zzz@cd-club.ru> 81 * Fixes 82 * 83 * "Mike Pieper" <mike@pieper-family.de> 84 * TVOut enhandcements, V4L2 control interface. 85 * 86 * "Diego Biurrun" <diego@biurrun.de> 87 * DFP testing 88 * 89 * (following author is not in any relation with this code, but his code 90 * is included in this driver) 91 * 92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards 93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> 94 * 95 * (following author is not in any relation with this code, but his ideas 96 * were used when writing this driver) 97 * 98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> 99 * 100 */ 101 102 #include <linux/version.h> 103 104 #include "matroxfb_base.h" 105 #include "matroxfb_misc.h" 106 #include "matroxfb_accel.h" 107 #include "matroxfb_DAC1064.h" 108 #include "matroxfb_Ti3026.h" 109 #include "matroxfb_maven.h" 110 #include "matroxfb_crtc2.h" 111 #include "matroxfb_g450.h" 112 #include <linux/matroxfb.h> 113 #include <linux/interrupt.h> 114 #include <linux/nvram.h> 115 #include <linux/slab.h> 116 #include <linux/uaccess.h> 117 118 #ifdef CONFIG_PPC_PMAC 119 #include <asm/machdep.h> 120 static int default_vmode = VMODE_NVRAM; 121 static int default_cmode = CMODE_NVRAM; 122 #endif 123 124 static void matroxfb_unregister_device(struct matrox_fb_info* minfo); 125 126 /* --------------------------------------------------------------------- */ 127 128 /* 129 * card parameters 130 */ 131 132 /* --------------------------------------------------------------------- */ 133 134 static struct fb_var_screeninfo vesafb_defined = { 135 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/ 136 0,0, /* virtual -> visible no offset */ 137 8, /* depth -> load bits_per_pixel */ 138 0, /* greyscale ? */ 139 {0,0,0}, /* R */ 140 {0,0,0}, /* G */ 141 {0,0,0}, /* B */ 142 {0,0,0}, /* transparency */ 143 0, /* standard pixel format */ 144 FB_ACTIVATE_NOW, 145 -1,-1, 146 FB_ACCELF_TEXT, /* accel flags */ 147 39721L,48L,16L,33L,10L, 148 96L,2L,~0, /* No sync info */ 149 FB_VMODE_NONINTERLACED, 150 }; 151 152 153 154 /* --------------------------------------------------------------------- */ 155 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos) 156 { 157 struct matroxfb_dh_fb_info *info = minfo->crtc2.info; 158 159 /* Make sure that displays are compatible */ 160 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel) 161 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual) 162 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length) 163 ) { 164 switch (minfo->fbcon.var.bits_per_pixel) { 165 case 16: 166 case 32: 167 pos = pos * 8; 168 if (info->interlaced) { 169 mga_outl(0x3C2C, pos); 170 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8); 171 } else { 172 mga_outl(0x3C28, pos); 173 } 174 break; 175 } 176 } 177 } 178 179 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo) 180 { 181 if (minfo->crtc1.panpos >= 0) { 182 unsigned long flags; 183 int panpos; 184 185 matroxfb_DAC_lock_irqsave(flags); 186 panpos = minfo->crtc1.panpos; 187 if (panpos >= 0) { 188 unsigned int extvga_reg; 189 190 minfo->crtc1.panpos = -1; /* No update pending anymore */ 191 extvga_reg = mga_inb(M_EXTVGA_INDEX); 192 mga_setr(M_EXTVGA_INDEX, 0x00, panpos); 193 if (extvga_reg != 0x00) { 194 mga_outb(M_EXTVGA_INDEX, extvga_reg); 195 } 196 } 197 matroxfb_DAC_unlock_irqrestore(flags); 198 } 199 } 200 201 static irqreturn_t matrox_irq(int irq, void *dev_id) 202 { 203 u_int32_t status; 204 int handled = 0; 205 struct matrox_fb_info *minfo = dev_id; 206 207 status = mga_inl(M_STATUS); 208 209 if (status & 0x20) { 210 mga_outl(M_ICLEAR, 0x20); 211 minfo->crtc1.vsync.cnt++; 212 matroxfb_crtc1_panpos(minfo); 213 wake_up_interruptible(&minfo->crtc1.vsync.wait); 214 handled = 1; 215 } 216 if (status & 0x200) { 217 mga_outl(M_ICLEAR, 0x200); 218 minfo->crtc2.vsync.cnt++; 219 wake_up_interruptible(&minfo->crtc2.vsync.wait); 220 handled = 1; 221 } 222 return IRQ_RETVAL(handled); 223 } 224 225 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable) 226 { 227 u_int32_t bm; 228 229 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 230 bm = 0x220; 231 else 232 bm = 0x020; 233 234 if (!test_and_set_bit(0, &minfo->irq_flags)) { 235 if (request_irq(minfo->pcidev->irq, matrox_irq, 236 IRQF_SHARED, "matroxfb", minfo)) { 237 clear_bit(0, &minfo->irq_flags); 238 return -EINVAL; 239 } 240 /* Clear any pending field interrupts */ 241 mga_outl(M_ICLEAR, bm); 242 mga_outl(M_IEN, mga_inl(M_IEN) | bm); 243 } else if (reenable) { 244 u_int32_t ien; 245 246 ien = mga_inl(M_IEN); 247 if ((ien & bm) != bm) { 248 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien); 249 mga_outl(M_IEN, ien | bm); 250 } 251 } 252 return 0; 253 } 254 255 static void matroxfb_disable_irq(struct matrox_fb_info *minfo) 256 { 257 if (test_and_clear_bit(0, &minfo->irq_flags)) { 258 /* Flush pending pan-at-vbl request... */ 259 matroxfb_crtc1_panpos(minfo); 260 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 261 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); 262 else 263 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20); 264 free_irq(minfo->pcidev->irq, minfo); 265 } 266 } 267 268 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc) 269 { 270 struct matrox_vsync *vs; 271 unsigned int cnt; 272 int ret; 273 274 switch (crtc) { 275 case 0: 276 vs = &minfo->crtc1.vsync; 277 break; 278 case 1: 279 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) { 280 return -ENODEV; 281 } 282 vs = &minfo->crtc2.vsync; 283 break; 284 default: 285 return -ENODEV; 286 } 287 ret = matroxfb_enable_irq(minfo, 0); 288 if (ret) { 289 return ret; 290 } 291 292 cnt = vs->cnt; 293 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10); 294 if (ret < 0) { 295 return ret; 296 } 297 if (ret == 0) { 298 matroxfb_enable_irq(minfo, 1); 299 return -ETIMEDOUT; 300 } 301 return 0; 302 } 303 304 /* --------------------------------------------------------------------- */ 305 306 static void matrox_pan_var(struct matrox_fb_info *minfo, 307 struct fb_var_screeninfo *var) 308 { 309 unsigned int pos; 310 unsigned short p0, p1, p2; 311 unsigned int p3; 312 int vbl; 313 unsigned long flags; 314 315 CRITFLAGS 316 317 DBG(__func__) 318 319 if (minfo->dead) 320 return; 321 322 minfo->fbcon.var.xoffset = var->xoffset; 323 minfo->fbcon.var.yoffset = var->yoffset; 324 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32; 325 pos += minfo->curr.ydstorg.chunks; 326 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF; 327 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8; 328 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 329 p3 = minfo->hw.CRTCEXT[8] = pos >> 21; 330 331 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ 332 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0); 333 334 CRITBEGIN 335 336 matroxfb_DAC_lock_irqsave(flags); 337 mga_setr(M_CRTC_INDEX, 0x0D, p0); 338 mga_setr(M_CRTC_INDEX, 0x0C, p1); 339 if (minfo->devflags.support32MB) 340 mga_setr(M_EXTVGA_INDEX, 0x08, p3); 341 if (vbl) { 342 minfo->crtc1.panpos = p2; 343 } else { 344 /* Abort any pending change */ 345 minfo->crtc1.panpos = -1; 346 mga_setr(M_EXTVGA_INDEX, 0x00, p2); 347 } 348 matroxfb_DAC_unlock_irqrestore(flags); 349 350 update_crtc2(minfo, pos); 351 352 CRITEND 353 } 354 355 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy) 356 { 357 /* Currently we are holding big kernel lock on all dead & usecount updates. 358 * Destroy everything after all users release it. Especially do not unregister 359 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check 360 * for device unplugged when in use. 361 * In future we should point mmio.vbase & video.vbase somewhere where we can 362 * write data without causing too much damage... 363 */ 364 365 minfo->dead = 1; 366 if (minfo->usecount) { 367 /* destroy it later */ 368 return; 369 } 370 matroxfb_unregister_device(minfo); 371 unregister_framebuffer(&minfo->fbcon); 372 matroxfb_g450_shutdown(minfo); 373 arch_phys_wc_del(minfo->wc_cookie); 374 iounmap(minfo->mmio.vbase.vaddr); 375 iounmap(minfo->video.vbase.vaddr); 376 release_mem_region(minfo->video.base, minfo->video.len_maximum); 377 release_mem_region(minfo->mmio.base, 16384); 378 kfree(minfo); 379 } 380 381 /* 382 * Open/Release the frame buffer device 383 */ 384 385 static int matroxfb_open(struct fb_info *info, int user) 386 { 387 struct matrox_fb_info *minfo = info2minfo(info); 388 389 DBG_LOOP(__func__) 390 391 if (minfo->dead) { 392 return -ENXIO; 393 } 394 minfo->usecount++; 395 if (user) { 396 minfo->userusecount++; 397 } 398 return(0); 399 } 400 401 static int matroxfb_release(struct fb_info *info, int user) 402 { 403 struct matrox_fb_info *minfo = info2minfo(info); 404 405 DBG_LOOP(__func__) 406 407 if (user) { 408 if (0 == --minfo->userusecount) { 409 matroxfb_disable_irq(minfo); 410 } 411 } 412 if (!(--minfo->usecount) && minfo->dead) { 413 matroxfb_remove(minfo, 0); 414 } 415 return(0); 416 } 417 418 static int matroxfb_pan_display(struct fb_var_screeninfo *var, 419 struct fb_info* info) { 420 struct matrox_fb_info *minfo = info2minfo(info); 421 422 DBG(__func__) 423 424 matrox_pan_var(minfo, var); 425 return 0; 426 } 427 428 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo, 429 int bpp) 430 { 431 int bppshft2; 432 433 DBG(__func__) 434 435 bppshft2 = bpp; 436 if (!bppshft2) { 437 return 8; 438 } 439 if (isInterleave(minfo)) 440 bppshft2 >>= 1; 441 if (minfo->devflags.video64bits) 442 bppshft2 >>= 1; 443 return bppshft2; 444 } 445 446 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo, 447 int xres, int bpp) 448 { 449 int over; 450 int rounding; 451 452 DBG(__func__) 453 454 switch (bpp) { 455 case 0: return xres; 456 case 4: rounding = 128; 457 break; 458 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */ 459 break; 460 case 16: rounding = 32; 461 break; 462 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */ 463 break; 464 default: rounding = 16; 465 /* on G400, 16 really does not work */ 466 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 467 rounding = 32; 468 break; 469 } 470 if (isInterleave(minfo)) { 471 rounding *= 2; 472 } 473 over = xres % rounding; 474 if (over) 475 xres += rounding-over; 476 return xres; 477 } 478 479 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres, 480 int bpp) 481 { 482 const int* width; 483 int xres_new; 484 485 DBG(__func__) 486 487 if (!bpp) return xres; 488 489 width = minfo->capable.vxres; 490 491 if (minfo->devflags.precise_width) { 492 while (*width) { 493 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) { 494 break; 495 } 496 width++; 497 } 498 xres_new = *width; 499 } else { 500 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp); 501 } 502 return xres_new; 503 } 504 505 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) { 506 507 DBG(__func__) 508 509 switch (var->bits_per_pixel) { 510 case 4: 511 return 16; /* pseudocolor... 16 entries HW palette */ 512 case 8: 513 return 256; /* pseudocolor... 256 entries HW palette */ 514 case 16: 515 return 16; /* directcolor... 16 entries SW palette */ 516 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 517 case 24: 518 return 16; /* directcolor... 16 entries SW palette */ 519 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 520 case 32: 521 return 16; /* directcolor... 16 entries SW palette */ 522 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 523 } 524 return 16; /* return something reasonable... or panic()? */ 525 } 526 527 static int matroxfb_decode_var(const struct matrox_fb_info *minfo, 528 struct fb_var_screeninfo *var, int *visual, 529 int *video_cmap_len, unsigned int* ydstorg) 530 { 531 struct RGBT { 532 unsigned char bpp; 533 struct { 534 unsigned char offset, 535 length; 536 } red, 537 green, 538 blue, 539 transp; 540 signed char visual; 541 }; 542 static const struct RGBT table[]= { 543 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR}, 544 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR}, 545 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 546 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 547 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR} 548 }; 549 struct RGBT const *rgbt; 550 unsigned int bpp = var->bits_per_pixel; 551 unsigned int vramlen; 552 unsigned int memlen; 553 554 DBG(__func__) 555 556 switch (bpp) { 557 case 4: if (!minfo->capable.cfb4) return -EINVAL; 558 break; 559 case 8: break; 560 case 16: break; 561 case 24: break; 562 case 32: break; 563 default: return -EINVAL; 564 } 565 *ydstorg = 0; 566 vramlen = minfo->video.len_usable; 567 if (var->yres_virtual < var->yres) 568 var->yres_virtual = var->yres; 569 if (var->xres_virtual < var->xres) 570 var->xres_virtual = var->xres; 571 572 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp); 573 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 574 if (memlen > vramlen) { 575 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); 576 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 577 } 578 /* There is hardware bug that no line can cross 4MB boundary */ 579 /* give up for CFB24, it is impossible to easy workaround it */ 580 /* for other try to do something */ 581 if (!minfo->capable.cross4MB && (memlen > 0x400000)) { 582 if (bpp == 24) { 583 /* sorry */ 584 } else { 585 unsigned int linelen; 586 unsigned int m1 = linelen = var->xres_virtual * bpp / 8; 587 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ 588 unsigned int max_yres; 589 590 while (m1) { 591 while (m2 >= m1) m2 -= m1; 592 swap(m1, m2); 593 } 594 m2 = linelen * PAGE_SIZE / m2; 595 *ydstorg = m2 = 0x400000 % m2; 596 max_yres = (vramlen - m2) / linelen; 597 if (var->yres_virtual > max_yres) 598 var->yres_virtual = max_yres; 599 } 600 } 601 /* YDSTLEN contains only signed 16bit value */ 602 if (var->yres_virtual > 32767) 603 var->yres_virtual = 32767; 604 /* we must round yres/xres down, we already rounded y/xres_virtual up 605 if it was possible. We should return -EINVAL, but I disagree */ 606 if (var->yres_virtual < var->yres) 607 var->yres = var->yres_virtual; 608 if (var->xres_virtual < var->xres) 609 var->xres = var->xres_virtual; 610 if (var->xoffset + var->xres > var->xres_virtual) 611 var->xoffset = var->xres_virtual - var->xres; 612 if (var->yoffset + var->yres > var->yres_virtual) 613 var->yoffset = var->yres_virtual - var->yres; 614 615 if (bpp == 16 && var->green.length == 5) { 616 bpp--; /* an artificial value - 15 */ 617 } 618 619 for (rgbt = table; rgbt->bpp < bpp; rgbt++); 620 #define SETCLR(clr)\ 621 var->clr.offset = rgbt->clr.offset;\ 622 var->clr.length = rgbt->clr.length 623 SETCLR(red); 624 SETCLR(green); 625 SETCLR(blue); 626 SETCLR(transp); 627 #undef SETCLR 628 *visual = rgbt->visual; 629 630 if (bpp > 8) 631 dprintk("matroxfb: truecolor: " 632 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", 633 var->transp.length, var->red.length, var->green.length, var->blue.length, 634 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset); 635 636 *video_cmap_len = matroxfb_get_cmap_len(var); 637 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel, 638 var->xres_virtual, var->yres_virtual); 639 return 0; 640 } 641 642 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green, 643 unsigned blue, unsigned transp, 644 struct fb_info *fb_info) 645 { 646 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon); 647 648 DBG(__func__) 649 650 /* 651 * Set a single color register. The values supplied are 652 * already rounded down to the hardware's capabilities 653 * (according to the entries in the `var' structure). Return 654 * != 0 for invalid regno. 655 */ 656 657 if (regno >= minfo->curr.cmap_len) 658 return 1; 659 660 if (minfo->fbcon.var.grayscale) { 661 /* gray = 0.30*R + 0.59*G + 0.11*B */ 662 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; 663 } 664 665 red = CNVT_TOHW(red, minfo->fbcon.var.red.length); 666 green = CNVT_TOHW(green, minfo->fbcon.var.green.length); 667 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length); 668 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length); 669 670 switch (minfo->fbcon.var.bits_per_pixel) { 671 case 4: 672 case 8: 673 mga_outb(M_DAC_REG, regno); 674 mga_outb(M_DAC_VAL, red); 675 mga_outb(M_DAC_VAL, green); 676 mga_outb(M_DAC_VAL, blue); 677 break; 678 case 16: 679 if (regno >= 16) 680 break; 681 { 682 u_int16_t col = 683 (red << minfo->fbcon.var.red.offset) | 684 (green << minfo->fbcon.var.green.offset) | 685 (blue << minfo->fbcon.var.blue.offset) | 686 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */ 687 minfo->cmap[regno] = col | (col << 16); 688 } 689 break; 690 case 24: 691 case 32: 692 if (regno >= 16) 693 break; 694 minfo->cmap[regno] = 695 (red << minfo->fbcon.var.red.offset) | 696 (green << minfo->fbcon.var.green.offset) | 697 (blue << minfo->fbcon.var.blue.offset) | 698 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */ 699 break; 700 } 701 return 0; 702 } 703 704 static void matroxfb_init_fix(struct matrox_fb_info *minfo) 705 { 706 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 707 DBG(__func__) 708 709 strcpy(fix->id,"MATROX"); 710 711 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */ 712 fix->ypanstep = 1; 713 fix->ywrapstep = 0; 714 fix->mmio_start = minfo->mmio.base; 715 fix->mmio_len = minfo->mmio.len; 716 fix->accel = minfo->devflags.accelerator; 717 } 718 719 static void matroxfb_update_fix(struct matrox_fb_info *minfo) 720 { 721 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 722 DBG(__func__) 723 724 mutex_lock(&minfo->fbcon.mm_lock); 725 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes; 726 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes; 727 mutex_unlock(&minfo->fbcon.mm_lock); 728 } 729 730 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 731 { 732 int err; 733 int visual; 734 int cmap_len; 735 unsigned int ydstorg; 736 struct matrox_fb_info *minfo = info2minfo(info); 737 738 if (minfo->dead) { 739 return -ENXIO; 740 } 741 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 742 return err; 743 return 0; 744 } 745 746 static int matroxfb_set_par(struct fb_info *info) 747 { 748 int err; 749 int visual; 750 int cmap_len; 751 unsigned int ydstorg; 752 struct fb_var_screeninfo *var; 753 struct matrox_fb_info *minfo = info2minfo(info); 754 755 DBG(__func__) 756 757 if (minfo->dead) { 758 return -ENXIO; 759 } 760 761 var = &info->var; 762 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 763 return err; 764 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg; 765 matroxfb_update_fix(minfo); 766 minfo->fbcon.fix.visual = visual; 767 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS; 768 minfo->fbcon.fix.type_aux = 0; 769 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3; 770 { 771 unsigned int pos; 772 773 minfo->curr.cmap_len = cmap_len; 774 ydstorg += minfo->devflags.ydstorg; 775 minfo->curr.ydstorg.bytes = ydstorg; 776 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2); 777 if (var->bits_per_pixel == 4) 778 minfo->curr.ydstorg.pixels = ydstorg; 779 else 780 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel; 781 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel); 782 { struct my_timming mt; 783 struct matrox_hw_state* hw; 784 int out; 785 786 matroxfb_var2my(var, &mt); 787 mt.crtc = MATROXFB_SRC_CRTC1; 788 /* CRTC1 delays */ 789 switch (var->bits_per_pixel) { 790 case 0: mt.delay = 31 + 0; break; 791 case 16: mt.delay = 21 + 8; break; 792 case 24: mt.delay = 17 + 8; break; 793 case 32: mt.delay = 16 + 8; break; 794 default: mt.delay = 31 + 8; break; 795 } 796 797 hw = &minfo->hw; 798 799 down_read(&minfo->altout.lock); 800 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 801 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 802 minfo->outputs[out].output->compute) { 803 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt); 804 } 805 } 806 up_read(&minfo->altout.lock); 807 minfo->crtc1.pixclock = mt.pixclock; 808 minfo->crtc1.mnp = mt.mnp; 809 minfo->hw_switch->init(minfo, &mt); 810 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32; 811 pos += minfo->curr.ydstorg.chunks; 812 813 hw->CRTC[0x0D] = pos & 0xFF; 814 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; 815 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 816 hw->CRTCEXT[8] = pos >> 21; 817 minfo->hw_switch->restore(minfo); 818 update_crtc2(minfo, pos); 819 down_read(&minfo->altout.lock); 820 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 821 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 822 minfo->outputs[out].output->program) { 823 minfo->outputs[out].output->program(minfo->outputs[out].data); 824 } 825 } 826 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 827 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 828 minfo->outputs[out].output->start) { 829 minfo->outputs[out].output->start(minfo->outputs[out].data); 830 } 831 } 832 up_read(&minfo->altout.lock); 833 matrox_cfbX_init(minfo); 834 } 835 } 836 minfo->initialized = 1; 837 return 0; 838 } 839 840 static int matroxfb_get_vblank(struct matrox_fb_info *minfo, 841 struct fb_vblank *vblank) 842 { 843 unsigned int sts1; 844 845 matroxfb_enable_irq(minfo, 0); 846 memset(vblank, 0, sizeof(*vblank)); 847 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | 848 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; 849 sts1 = mga_inb(M_INSTS1); 850 vblank->vcount = mga_inl(M_VCOUNT); 851 /* BTW, on my PIII/450 with G400, reading M_INSTS1 852 byte makes this call about 12% slower (1.70 vs. 2.05 us 853 per ioctl()) */ 854 if (sts1 & 1) 855 vblank->flags |= FB_VBLANK_HBLANKING; 856 if (sts1 & 8) 857 vblank->flags |= FB_VBLANK_VSYNCING; 858 if (vblank->vcount >= minfo->fbcon.var.yres) 859 vblank->flags |= FB_VBLANK_VBLANKING; 860 if (test_bit(0, &minfo->irq_flags)) { 861 vblank->flags |= FB_VBLANK_HAVE_COUNT; 862 /* Only one writer, aligned int value... 863 it should work without lock and without atomic_t */ 864 vblank->count = minfo->crtc1.vsync.cnt; 865 } 866 return 0; 867 } 868 869 static struct matrox_altout panellink_output = { 870 .name = "Panellink output", 871 }; 872 873 static int matroxfb_ioctl(struct fb_info *info, 874 unsigned int cmd, unsigned long arg) 875 { 876 void __user *argp = (void __user *)arg; 877 struct matrox_fb_info *minfo = info2minfo(info); 878 879 DBG(__func__) 880 881 if (minfo->dead) { 882 return -ENXIO; 883 } 884 885 switch (cmd) { 886 case FBIOGET_VBLANK: 887 { 888 struct fb_vblank vblank; 889 int err; 890 891 err = matroxfb_get_vblank(minfo, &vblank); 892 if (err) 893 return err; 894 if (copy_to_user(argp, &vblank, sizeof(vblank))) 895 return -EFAULT; 896 return 0; 897 } 898 case FBIO_WAITFORVSYNC: 899 { 900 u_int32_t crt; 901 902 if (get_user(crt, (u_int32_t __user *)arg)) 903 return -EFAULT; 904 905 return matroxfb_wait_for_sync(minfo, crt); 906 } 907 case MATROXFB_SET_OUTPUT_MODE: 908 { 909 struct matroxioc_output_mode mom; 910 struct matrox_altout *oproc; 911 int val; 912 913 if (copy_from_user(&mom, argp, sizeof(mom))) 914 return -EFAULT; 915 if (mom.output >= MATROXFB_MAX_OUTPUTS) 916 return -ENXIO; 917 down_read(&minfo->altout.lock); 918 oproc = minfo->outputs[mom.output].output; 919 if (!oproc) { 920 val = -ENXIO; 921 } else if (!oproc->verifymode) { 922 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) { 923 val = 0; 924 } else { 925 val = -EINVAL; 926 } 927 } else { 928 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode); 929 } 930 if (!val) { 931 if (minfo->outputs[mom.output].mode != mom.mode) { 932 minfo->outputs[mom.output].mode = mom.mode; 933 val = 1; 934 } 935 } 936 up_read(&minfo->altout.lock); 937 if (val != 1) 938 return val; 939 switch (minfo->outputs[mom.output].src) { 940 case MATROXFB_SRC_CRTC1: 941 matroxfb_set_par(info); 942 break; 943 case MATROXFB_SRC_CRTC2: 944 { 945 struct matroxfb_dh_fb_info* crtc2; 946 947 down_read(&minfo->crtc2.lock); 948 crtc2 = minfo->crtc2.info; 949 if (crtc2) 950 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon); 951 up_read(&minfo->crtc2.lock); 952 } 953 break; 954 } 955 return 0; 956 } 957 case MATROXFB_GET_OUTPUT_MODE: 958 { 959 struct matroxioc_output_mode mom; 960 struct matrox_altout *oproc; 961 int val; 962 963 if (copy_from_user(&mom, argp, sizeof(mom))) 964 return -EFAULT; 965 if (mom.output >= MATROXFB_MAX_OUTPUTS) 966 return -ENXIO; 967 down_read(&minfo->altout.lock); 968 oproc = minfo->outputs[mom.output].output; 969 if (!oproc) { 970 val = -ENXIO; 971 } else { 972 mom.mode = minfo->outputs[mom.output].mode; 973 val = 0; 974 } 975 up_read(&minfo->altout.lock); 976 if (val) 977 return val; 978 if (copy_to_user(argp, &mom, sizeof(mom))) 979 return -EFAULT; 980 return 0; 981 } 982 case MATROXFB_SET_OUTPUT_CONNECTION: 983 { 984 u_int32_t tmp; 985 int i; 986 int changes; 987 988 if (copy_from_user(&tmp, argp, sizeof(tmp))) 989 return -EFAULT; 990 for (i = 0; i < 32; i++) { 991 if (tmp & (1 << i)) { 992 if (i >= MATROXFB_MAX_OUTPUTS) 993 return -ENXIO; 994 if (!minfo->outputs[i].output) 995 return -ENXIO; 996 switch (minfo->outputs[i].src) { 997 case MATROXFB_SRC_NONE: 998 case MATROXFB_SRC_CRTC1: 999 break; 1000 default: 1001 return -EBUSY; 1002 } 1003 } 1004 } 1005 if (minfo->devflags.panellink) { 1006 if (tmp & MATROXFB_OUTPUT_CONN_DFP) { 1007 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY) 1008 return -EINVAL; 1009 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1010 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) { 1011 return -EBUSY; 1012 } 1013 } 1014 } 1015 } 1016 changes = 0; 1017 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1018 if (tmp & (1 << i)) { 1019 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) { 1020 changes = 1; 1021 minfo->outputs[i].src = MATROXFB_SRC_CRTC1; 1022 } 1023 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1024 changes = 1; 1025 minfo->outputs[i].src = MATROXFB_SRC_NONE; 1026 } 1027 } 1028 if (!changes) 1029 return 0; 1030 matroxfb_set_par(info); 1031 return 0; 1032 } 1033 case MATROXFB_GET_OUTPUT_CONNECTION: 1034 { 1035 u_int32_t conn = 0; 1036 int i; 1037 1038 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1039 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1040 conn |= 1 << i; 1041 } 1042 } 1043 if (put_user(conn, (u_int32_t __user *)arg)) 1044 return -EFAULT; 1045 return 0; 1046 } 1047 case MATROXFB_GET_AVAILABLE_OUTPUTS: 1048 { 1049 u_int32_t conn = 0; 1050 int i; 1051 1052 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1053 if (minfo->outputs[i].output) { 1054 switch (minfo->outputs[i].src) { 1055 case MATROXFB_SRC_NONE: 1056 case MATROXFB_SRC_CRTC1: 1057 conn |= 1 << i; 1058 break; 1059 } 1060 } 1061 } 1062 if (minfo->devflags.panellink) { 1063 if (conn & MATROXFB_OUTPUT_CONN_DFP) 1064 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY; 1065 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY) 1066 conn &= ~MATROXFB_OUTPUT_CONN_DFP; 1067 } 1068 if (put_user(conn, (u_int32_t __user *)arg)) 1069 return -EFAULT; 1070 return 0; 1071 } 1072 case MATROXFB_GET_ALL_OUTPUTS: 1073 { 1074 u_int32_t conn = 0; 1075 int i; 1076 1077 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1078 if (minfo->outputs[i].output) { 1079 conn |= 1 << i; 1080 } 1081 } 1082 if (put_user(conn, (u_int32_t __user *)arg)) 1083 return -EFAULT; 1084 return 0; 1085 } 1086 case VIDIOC_QUERYCAP: 1087 { 1088 struct v4l2_capability r; 1089 1090 memset(&r, 0, sizeof(r)); 1091 strcpy(r.driver, "matroxfb"); 1092 strcpy(r.card, "Matrox"); 1093 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev)); 1094 r.version = KERNEL_VERSION(1,0,0); 1095 r.capabilities = V4L2_CAP_VIDEO_OUTPUT; 1096 if (copy_to_user(argp, &r, sizeof(r))) 1097 return -EFAULT; 1098 return 0; 1099 1100 } 1101 case VIDIOC_QUERYCTRL: 1102 { 1103 struct v4l2_queryctrl qctrl; 1104 int err; 1105 1106 if (copy_from_user(&qctrl, argp, sizeof(qctrl))) 1107 return -EFAULT; 1108 1109 down_read(&minfo->altout.lock); 1110 if (!minfo->outputs[1].output) { 1111 err = -ENXIO; 1112 } else if (minfo->outputs[1].output->getqueryctrl) { 1113 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl); 1114 } else { 1115 err = -EINVAL; 1116 } 1117 up_read(&minfo->altout.lock); 1118 if (err >= 0 && 1119 copy_to_user(argp, &qctrl, sizeof(qctrl))) 1120 return -EFAULT; 1121 return err; 1122 } 1123 case VIDIOC_G_CTRL: 1124 { 1125 struct v4l2_control ctrl; 1126 int err; 1127 1128 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1129 return -EFAULT; 1130 1131 down_read(&minfo->altout.lock); 1132 if (!minfo->outputs[1].output) { 1133 err = -ENXIO; 1134 } else if (minfo->outputs[1].output->getctrl) { 1135 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl); 1136 } else { 1137 err = -EINVAL; 1138 } 1139 up_read(&minfo->altout.lock); 1140 if (err >= 0 && 1141 copy_to_user(argp, &ctrl, sizeof(ctrl))) 1142 return -EFAULT; 1143 return err; 1144 } 1145 case VIDIOC_S_CTRL: 1146 { 1147 struct v4l2_control ctrl; 1148 int err; 1149 1150 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1151 return -EFAULT; 1152 1153 down_read(&minfo->altout.lock); 1154 if (!minfo->outputs[1].output) { 1155 err = -ENXIO; 1156 } else if (minfo->outputs[1].output->setctrl) { 1157 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl); 1158 } else { 1159 err = -EINVAL; 1160 } 1161 up_read(&minfo->altout.lock); 1162 return err; 1163 } 1164 } 1165 return -ENOTTY; 1166 } 1167 1168 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ 1169 1170 static int matroxfb_blank(int blank, struct fb_info *info) 1171 { 1172 int seq; 1173 int crtc; 1174 CRITFLAGS 1175 struct matrox_fb_info *minfo = info2minfo(info); 1176 1177 DBG(__func__) 1178 1179 if (minfo->dead) 1180 return 1; 1181 1182 switch (blank) { 1183 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ 1184 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; 1185 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; 1186 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; 1187 default: seq = 0x00; crtc = 0x00; break; 1188 } 1189 1190 CRITBEGIN 1191 1192 mga_outb(M_SEQ_INDEX, 1); 1193 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq); 1194 mga_outb(M_EXTVGA_INDEX, 1); 1195 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); 1196 1197 CRITEND 1198 return 0; 1199 } 1200 1201 static const struct fb_ops matroxfb_ops = { 1202 .owner = THIS_MODULE, 1203 .fb_open = matroxfb_open, 1204 .fb_release = matroxfb_release, 1205 .fb_check_var = matroxfb_check_var, 1206 .fb_set_par = matroxfb_set_par, 1207 .fb_setcolreg = matroxfb_setcolreg, 1208 .fb_pan_display =matroxfb_pan_display, 1209 .fb_blank = matroxfb_blank, 1210 .fb_ioctl = matroxfb_ioctl, 1211 /* .fb_fillrect = <set by matrox_cfbX_init>, */ 1212 /* .fb_copyarea = <set by matrox_cfbX_init>, */ 1213 /* .fb_imageblit = <set by matrox_cfbX_init>, */ 1214 /* .fb_cursor = <set by matrox_cfbX_init>, */ 1215 }; 1216 1217 #define RSDepth(X) (((X) >> 8) & 0x0F) 1218 #define RS8bpp 0x1 1219 #define RS15bpp 0x2 1220 #define RS16bpp 0x3 1221 #define RS32bpp 0x4 1222 #define RS4bpp 0x5 1223 #define RS24bpp 0x6 1224 #define RSText 0x7 1225 #define RSText8 0x8 1226 /* 9-F */ 1227 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = { 1228 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 }, 1229 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 }, 1230 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 }, 1231 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 }, 1232 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 }, 1233 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 }, 1234 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */ 1235 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */ 1236 }; 1237 1238 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */ 1239 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */ 1240 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */ 1241 static int inv24; /* "matroxfb:inv24" */ 1242 static int cross4MB = -1; /* "matroxfb:cross4MB" */ 1243 static int disabled; /* "matroxfb:disabled" */ 1244 static int noaccel; /* "matroxfb:noaccel" */ 1245 static int nopan; /* "matroxfb:nopan" */ 1246 static int no_pci_retry; /* "matroxfb:nopciretry" */ 1247 static int novga; /* "matroxfb:novga" */ 1248 static int nobios; /* "matroxfb:nobios" */ 1249 static int noinit = 1; /* "matroxfb:init" */ 1250 static int inverse; /* "matroxfb:inverse" */ 1251 static int sgram; /* "matroxfb:sgram" */ 1252 static int mtrr = 1; /* "matroxfb:nomtrr" */ 1253 static int grayscale; /* "matroxfb:grayscale" */ 1254 static int dev = -1; /* "matroxfb:dev:xxxxx" */ 1255 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */ 1256 static int depth = -1; /* "matroxfb:depth:xxxxx" */ 1257 static unsigned int xres; /* "matroxfb:xres:xxxxx" */ 1258 static unsigned int yres; /* "matroxfb:yres:xxxxx" */ 1259 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */ 1260 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */ 1261 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */ 1262 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */ 1263 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */ 1264 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */ 1265 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */ 1266 static int sync = -1; /* "matroxfb:sync:xxxxx" */ 1267 static unsigned int fv; /* "matroxfb:fv:xxxxx" */ 1268 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */ 1269 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */ 1270 static int dfp; /* "matroxfb:dfp */ 1271 static int dfp_type = -1; /* "matroxfb:dfp:xxx */ 1272 static int memtype = -1; /* "matroxfb:memtype:xxx" */ 1273 static char outputs[8]; /* "matroxfb:outputs:xxx" */ 1274 1275 #ifndef MODULE 1276 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */ 1277 #endif 1278 1279 static int matroxfb_getmemory(struct matrox_fb_info *minfo, 1280 unsigned int maxSize, unsigned int *realSize) 1281 { 1282 vaddr_t vm; 1283 unsigned int offs; 1284 unsigned int offs2; 1285 unsigned char orig; 1286 unsigned char bytes[32]; 1287 unsigned char* tmp; 1288 1289 DBG(__func__) 1290 1291 vm = minfo->video.vbase; 1292 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */ 1293 /* at least 2MB */ 1294 if (maxSize < 0x0200000) return 0; 1295 if (maxSize > 0x2000000) maxSize = 0x2000000; 1296 1297 mga_outb(M_EXTVGA_INDEX, 0x03); 1298 orig = mga_inb(M_EXTVGA_DATA); 1299 mga_outb(M_EXTVGA_DATA, orig | 0x80); 1300 1301 tmp = bytes; 1302 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1303 *tmp++ = mga_readb(vm, offs); 1304 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1305 mga_writeb(vm, offs, 0x02); 1306 mga_outb(M_CACHEFLUSH, 0x00); 1307 for (offs = 0x100000; offs < maxSize; offs += 0x200000) { 1308 if (mga_readb(vm, offs) != 0x02) 1309 break; 1310 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02); 1311 if (mga_readb(vm, offs)) 1312 break; 1313 } 1314 tmp = bytes; 1315 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000) 1316 mga_writeb(vm, offs2, *tmp++); 1317 1318 mga_outb(M_EXTVGA_INDEX, 0x03); 1319 mga_outb(M_EXTVGA_DATA, orig); 1320 1321 *realSize = offs - 0x100000; 1322 #ifdef CONFIG_FB_MATROX_MILLENIUM 1323 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF)); 1324 #endif 1325 return 1; 1326 } 1327 1328 struct video_board { 1329 int maxvram; 1330 int maxdisplayable; 1331 int accelID; 1332 struct matrox_switch* lowlevel; 1333 }; 1334 #ifdef CONFIG_FB_MATROX_MILLENIUM 1335 static struct video_board vbMillennium = { 1336 .maxvram = 0x0800000, 1337 .maxdisplayable = 0x0800000, 1338 .accelID = FB_ACCEL_MATROX_MGA2064W, 1339 .lowlevel = &matrox_millennium 1340 }; 1341 1342 static struct video_board vbMillennium2 = { 1343 .maxvram = 0x1000000, 1344 .maxdisplayable = 0x0800000, 1345 .accelID = FB_ACCEL_MATROX_MGA2164W, 1346 .lowlevel = &matrox_millennium 1347 }; 1348 1349 static struct video_board vbMillennium2A = { 1350 .maxvram = 0x1000000, 1351 .maxdisplayable = 0x0800000, 1352 .accelID = FB_ACCEL_MATROX_MGA2164W_AGP, 1353 .lowlevel = &matrox_millennium 1354 }; 1355 #endif /* CONFIG_FB_MATROX_MILLENIUM */ 1356 #ifdef CONFIG_FB_MATROX_MYSTIQUE 1357 static struct video_board vbMystique = { 1358 .maxvram = 0x0800000, 1359 .maxdisplayable = 0x0800000, 1360 .accelID = FB_ACCEL_MATROX_MGA1064SG, 1361 .lowlevel = &matrox_mystique 1362 }; 1363 #endif /* CONFIG_FB_MATROX_MYSTIQUE */ 1364 #ifdef CONFIG_FB_MATROX_G 1365 static struct video_board vbG100 = { 1366 .maxvram = 0x0800000, 1367 .maxdisplayable = 0x0800000, 1368 .accelID = FB_ACCEL_MATROX_MGAG100, 1369 .lowlevel = &matrox_G100 1370 }; 1371 1372 static struct video_board vbG200 = { 1373 .maxvram = 0x1000000, 1374 .maxdisplayable = 0x1000000, 1375 .accelID = FB_ACCEL_MATROX_MGAG200, 1376 .lowlevel = &matrox_G100 1377 }; 1378 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for 1379 whole 32MB */ 1380 static struct video_board vbG400 = { 1381 .maxvram = 0x2000000, 1382 .maxdisplayable = 0x1000000, 1383 .accelID = FB_ACCEL_MATROX_MGAG400, 1384 .lowlevel = &matrox_G100 1385 }; 1386 #endif 1387 1388 #define DEVF_VIDEO64BIT 0x0001 1389 #define DEVF_SWAPS 0x0002 1390 #define DEVF_SRCORG 0x0004 1391 #define DEVF_DUALHEAD 0x0008 1392 #define DEVF_CROSS4MB 0x0010 1393 #define DEVF_TEXT4B 0x0020 1394 /* #define DEVF_recycled 0x0040 */ 1395 /* #define DEVF_recycled 0x0080 */ 1396 #define DEVF_SUPPORT32MB 0x0100 1397 #define DEVF_ANY_VXRES 0x0200 1398 #define DEVF_TEXT16B 0x0400 1399 #define DEVF_CRTC2 0x0800 1400 #define DEVF_MAVEN_CAPABLE 0x1000 1401 #define DEVF_PANELLINK_CAPABLE 0x2000 1402 #define DEVF_G450DAC 0x4000 1403 1404 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB) 1405 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD) 1406 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */ 1407 #define DEVF_G200 (DEVF_G2CORE) 1408 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2) 1409 /* if you'll find how to drive DFP... */ 1410 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD) 1411 #define DEVF_G550 (DEVF_G450) 1412 1413 static struct board { 1414 unsigned short vendor, device, rev, svid, sid; 1415 unsigned int flags; 1416 unsigned int maxclk; 1417 enum mga_chip chip; 1418 struct video_board* base; 1419 const char* name; 1420 } dev_list[] = { 1421 #ifdef CONFIG_FB_MATROX_MILLENIUM 1422 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF, 1423 0, 0, 1424 DEVF_TEXT4B, 1425 230000, 1426 MGA_2064, 1427 &vbMillennium, 1428 "Millennium (PCI)"}, 1429 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF, 1430 0, 0, 1431 DEVF_SWAPS, 1432 220000, 1433 MGA_2164, 1434 &vbMillennium2, 1435 "Millennium II (PCI)"}, 1436 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF, 1437 0, 0, 1438 DEVF_SWAPS, 1439 250000, 1440 MGA_2164, 1441 &vbMillennium2A, 1442 "Millennium II (AGP)"}, 1443 #endif 1444 #ifdef CONFIG_FB_MATROX_MYSTIQUE 1445 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02, 1446 0, 0, 1447 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1448 180000, 1449 MGA_1064, 1450 &vbMystique, 1451 "Mystique (PCI)"}, 1452 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF, 1453 0, 0, 1454 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1455 220000, 1456 MGA_1164, 1457 &vbMystique, 1458 "Mystique 220 (PCI)"}, 1459 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02, 1460 0, 0, 1461 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1462 180000, 1463 MGA_1064, 1464 &vbMystique, 1465 "Mystique (AGP)"}, 1466 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF, 1467 0, 0, 1468 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1469 220000, 1470 MGA_1164, 1471 &vbMystique, 1472 "Mystique 220 (AGP)"}, 1473 #endif 1474 #ifdef CONFIG_FB_MATROX_G 1475 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF, 1476 0, 0, 1477 DEVF_G100, 1478 230000, 1479 MGA_G100, 1480 &vbG100, 1481 "MGA-G100 (PCI)"}, 1482 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF, 1483 0, 0, 1484 DEVF_G100, 1485 230000, 1486 MGA_G100, 1487 &vbG100, 1488 "MGA-G100 (AGP)"}, 1489 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, 1490 0, 0, 1491 DEVF_G200, 1492 250000, 1493 MGA_G200, 1494 &vbG200, 1495 "MGA-G200 (PCI)"}, 1496 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1497 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC, 1498 DEVF_G200, 1499 220000, 1500 MGA_G200, 1501 &vbG200, 1502 "MGA-G200 (AGP)"}, 1503 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1504 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP, 1505 DEVF_G200, 1506 230000, 1507 MGA_G200, 1508 &vbG200, 1509 "Mystique G200 (AGP)"}, 1510 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1511 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP, 1512 DEVF_G200, 1513 250000, 1514 MGA_G200, 1515 &vbG200, 1516 "Millennium G200 (AGP)"}, 1517 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1518 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP, 1519 DEVF_G200, 1520 230000, 1521 MGA_G200, 1522 &vbG200, 1523 "Marvel G200 (AGP)"}, 1524 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1525 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP, 1526 DEVF_G200, 1527 230000, 1528 MGA_G200, 1529 &vbG200, 1530 "MGA-G200 (AGP)"}, 1531 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1532 0, 0, 1533 DEVF_G200, 1534 230000, 1535 MGA_G200, 1536 &vbG200, 1537 "G200 (AGP)"}, 1538 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1539 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP, 1540 DEVF_G400, 1541 360000, 1542 MGA_G400, 1543 &vbG400, 1544 "Millennium G400 MAX (AGP)"}, 1545 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1546 0, 0, 1547 DEVF_G400, 1548 300000, 1549 MGA_G400, 1550 &vbG400, 1551 "G400 (AGP)"}, 1552 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF, 1553 0, 0, 1554 DEVF_G450, 1555 360000, 1556 MGA_G450, 1557 &vbG400, 1558 "G450"}, 1559 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF, 1560 0, 0, 1561 DEVF_G550, 1562 360000, 1563 MGA_G550, 1564 &vbG400, 1565 "G550"}, 1566 #endif 1567 {0, 0, 0xFF, 1568 0, 0, 1569 0, 1570 0, 1571 0, 1572 NULL, 1573 NULL}}; 1574 1575 #ifndef MODULE 1576 static const struct fb_videomode defaultmode = { 1577 /* 640x480 @ 60Hz, 31.5 kHz */ 1578 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 1579 0, FB_VMODE_NONINTERLACED 1580 }; 1581 1582 static int hotplug = 0; 1583 #endif /* !MODULE */ 1584 1585 static void setDefaultOutputs(struct matrox_fb_info *minfo) 1586 { 1587 unsigned int i; 1588 const char* ptr; 1589 1590 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1; 1591 if (minfo->devflags.g450dac) { 1592 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1; 1593 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1594 } else if (dfp) { 1595 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1596 } 1597 ptr = outputs; 1598 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1599 char c = *ptr++; 1600 1601 if (c == 0) { 1602 break; 1603 } 1604 if (c == '0') { 1605 minfo->outputs[i].default_src = MATROXFB_SRC_NONE; 1606 } else if (c == '1') { 1607 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1; 1608 } else if (c == '2' && minfo->devflags.crtc2) { 1609 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2; 1610 } else { 1611 printk(KERN_ERR "matroxfb: Unknown outputs setting\n"); 1612 break; 1613 } 1614 } 1615 /* Nullify this option for subsequent adapters */ 1616 outputs[0] = 0; 1617 } 1618 1619 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) 1620 { 1621 unsigned long ctrlptr_phys = 0; 1622 unsigned long video_base_phys = 0; 1623 unsigned int memsize; 1624 int err; 1625 1626 static const struct pci_device_id intel_82437[] = { 1627 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) }, 1628 { }, 1629 }; 1630 1631 DBG(__func__) 1632 1633 /* set default values... */ 1634 vesafb_defined.accel_flags = FB_ACCELF_TEXT; 1635 1636 minfo->hw_switch = b->base->lowlevel; 1637 minfo->devflags.accelerator = b->base->accelID; 1638 minfo->max_pixel_clock = b->maxclk; 1639 1640 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name); 1641 minfo->capable.plnwt = 1; 1642 minfo->chip = b->chip; 1643 minfo->capable.srcorg = b->flags & DEVF_SRCORG; 1644 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT; 1645 if (b->flags & DEVF_TEXT4B) { 1646 minfo->devflags.vgastep = 4; 1647 minfo->devflags.textmode = 4; 1648 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1649 } else if (b->flags & DEVF_TEXT16B) { 1650 minfo->devflags.vgastep = 16; 1651 minfo->devflags.textmode = 1; 1652 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1653 } else { 1654 minfo->devflags.vgastep = 8; 1655 minfo->devflags.textmode = 1; 1656 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8; 1657 } 1658 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0; 1659 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES); 1660 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0; 1661 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0; 1662 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0; 1663 minfo->devflags.dfp_type = dfp_type; 1664 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0; 1665 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode; 1666 minfo->devflags.textvram = 65536 / minfo->devflags.textmode; 1667 setDefaultOutputs(minfo); 1668 if (b->flags & DEVF_PANELLINK_CAPABLE) { 1669 minfo->outputs[2].data = minfo; 1670 minfo->outputs[2].output = &panellink_output; 1671 minfo->outputs[2].src = minfo->outputs[2].default_src; 1672 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR; 1673 minfo->devflags.panellink = 1; 1674 } 1675 1676 if (minfo->capable.cross4MB < 0) 1677 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB; 1678 if (b->flags & DEVF_SWAPS) { 1679 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1); 1680 video_base_phys = pci_resource_start(minfo->pcidev, 0); 1681 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0; 1682 } else { 1683 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0); 1684 video_base_phys = pci_resource_start(minfo->pcidev, 1); 1685 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1; 1686 } 1687 err = -EINVAL; 1688 if (!ctrlptr_phys) { 1689 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n"); 1690 goto fail; 1691 } 1692 if (!video_base_phys) { 1693 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n"); 1694 goto fail; 1695 } 1696 memsize = b->base->maxvram; 1697 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) { 1698 goto fail; 1699 } 1700 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) { 1701 goto failCtrlMR; 1702 } 1703 minfo->video.len_maximum = memsize; 1704 /* convert mem (autodetect k, M) */ 1705 if (mem < 1024) mem *= 1024; 1706 if (mem < 0x00100000) mem *= 1024; 1707 1708 if (mem && (mem < memsize)) 1709 memsize = mem; 1710 err = -ENOMEM; 1711 1712 minfo->mmio.vbase.vaddr = ioremap_nocache(ctrlptr_phys, 16384); 1713 if (!minfo->mmio.vbase.vaddr) { 1714 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); 1715 goto failVideoMR; 1716 } 1717 minfo->mmio.base = ctrlptr_phys; 1718 minfo->mmio.len = 16384; 1719 minfo->video.base = video_base_phys; 1720 minfo->video.vbase.vaddr = ioremap_wc(video_base_phys, memsize); 1721 if (!minfo->video.vbase.vaddr) { 1722 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n", 1723 video_base_phys, memsize); 1724 goto failCtrlIO; 1725 } 1726 { 1727 u_int32_t cmd; 1728 u_int32_t mga_option; 1729 1730 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option); 1731 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd); 1732 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */ 1733 mga_option |= MX_OPTION_BSWAP; 1734 /* disable palette snooping */ 1735 cmd &= ~PCI_COMMAND_VGA_PALETTE; 1736 if (pci_dev_present(intel_82437)) { 1737 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) { 1738 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n"); 1739 } 1740 mga_option |= 0x20000000; 1741 minfo->devflags.nopciretry = 1; 1742 } 1743 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd); 1744 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option); 1745 minfo->hw.MXoptionReg = mga_option; 1746 1747 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */ 1748 /* maybe preinit() candidate, but it is same... for all devices... at this time... */ 1749 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00); 1750 } 1751 1752 err = -ENXIO; 1753 matroxfb_read_pins(minfo); 1754 if (minfo->hw_switch->preinit(minfo)) { 1755 goto failVideoIO; 1756 } 1757 1758 err = -ENOMEM; 1759 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) { 1760 printk(KERN_ERR "matroxfb: cannot determine memory size\n"); 1761 goto failVideoIO; 1762 } 1763 minfo->devflags.ydstorg = 0; 1764 1765 minfo->video.base = video_base_phys; 1766 minfo->video.len_usable = minfo->video.len; 1767 if (minfo->video.len_usable > b->base->maxdisplayable) 1768 minfo->video.len_usable = b->base->maxdisplayable; 1769 if (mtrr) 1770 minfo->wc_cookie = arch_phys_wc_add(video_base_phys, 1771 minfo->video.len); 1772 1773 if (!minfo->devflags.novga) 1774 request_region(0x3C0, 32, "matrox"); 1775 matroxfb_g450_connect(minfo); 1776 minfo->hw_switch->reset(minfo); 1777 1778 minfo->fbcon.monspecs.hfmin = 0; 1779 minfo->fbcon.monspecs.hfmax = fh; 1780 minfo->fbcon.monspecs.vfmin = 0; 1781 minfo->fbcon.monspecs.vfmax = fv; 1782 minfo->fbcon.monspecs.dpms = 0; /* TBD */ 1783 1784 /* static settings */ 1785 vesafb_defined.red = colors[depth-1].red; 1786 vesafb_defined.green = colors[depth-1].green; 1787 vesafb_defined.blue = colors[depth-1].blue; 1788 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel; 1789 vesafb_defined.grayscale = grayscale; 1790 vesafb_defined.vmode = 0; 1791 if (noaccel) 1792 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT; 1793 1794 minfo->fbops = matroxfb_ops; 1795 minfo->fbcon.fbops = &minfo->fbops; 1796 minfo->fbcon.pseudo_palette = minfo->cmap; 1797 minfo->fbcon.flags = FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */ 1798 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */ 1799 FBINFO_HWACCEL_FILLRECT | /* And fillrect */ 1800 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ 1801 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ 1802 FBINFO_HWACCEL_YPAN | /* And vertical panning */ 1803 FBINFO_READS_FAST; 1804 minfo->video.len_usable &= PAGE_MASK; 1805 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1); 1806 1807 #ifndef MODULE 1808 /* mode database is marked __init!!! */ 1809 if (!hotplug) { 1810 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL, 1811 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel); 1812 } 1813 #endif /* !MODULE */ 1814 1815 /* mode modifiers */ 1816 if (hslen) 1817 vesafb_defined.hsync_len = hslen; 1818 if (vslen) 1819 vesafb_defined.vsync_len = vslen; 1820 if (left != ~0) 1821 vesafb_defined.left_margin = left; 1822 if (right != ~0) 1823 vesafb_defined.right_margin = right; 1824 if (upper != ~0) 1825 vesafb_defined.upper_margin = upper; 1826 if (lower != ~0) 1827 vesafb_defined.lower_margin = lower; 1828 if (xres) 1829 vesafb_defined.xres = xres; 1830 if (yres) 1831 vesafb_defined.yres = yres; 1832 if (sync != -1) 1833 vesafb_defined.sync = sync; 1834 else if (vesafb_defined.sync == ~0) { 1835 vesafb_defined.sync = 0; 1836 if (yres < 400) 1837 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT; 1838 else if (yres < 480) 1839 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT; 1840 } 1841 1842 /* fv, fh, maxclk limits was specified */ 1843 { 1844 unsigned int tmp; 1845 1846 if (fv) { 1847 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres 1848 + vesafb_defined.lower_margin + vesafb_defined.vsync_len); 1849 if ((tmp < fh) || (fh == 0)) fh = tmp; 1850 } 1851 if (fh) { 1852 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres 1853 + vesafb_defined.right_margin + vesafb_defined.hsync_len); 1854 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp; 1855 } 1856 tmp = (maxclk + 499) / 500; 1857 if (tmp) { 1858 tmp = (2000000000 + tmp) / tmp; 1859 if (tmp > pixclock) pixclock = tmp; 1860 } 1861 } 1862 if (pixclock) { 1863 if (pixclock < 2000) /* > 500MHz */ 1864 pixclock = 4000; /* 250MHz */ 1865 if (pixclock > 1000000) 1866 pixclock = 1000000; /* 1MHz */ 1867 vesafb_defined.pixclock = pixclock; 1868 } 1869 1870 /* FIXME: Where to move this?! */ 1871 #if defined(CONFIG_PPC_PMAC) 1872 #ifndef MODULE 1873 if (machine_is(powermac)) { 1874 struct fb_var_screeninfo var; 1875 1876 if (default_vmode <= 0 || default_vmode > VMODE_MAX) 1877 default_vmode = VMODE_640_480_60; 1878 #if defined(CONFIG_PPC32) 1879 if (IS_REACHABLE(CONFIG_NVRAM) && default_cmode == CMODE_NVRAM) 1880 default_cmode = nvram_read_byte(NV_CMODE); 1881 #endif 1882 if (default_cmode < CMODE_8 || default_cmode > CMODE_32) 1883 default_cmode = CMODE_8; 1884 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) { 1885 var.accel_flags = vesafb_defined.accel_flags; 1886 var.xoffset = var.yoffset = 0; 1887 /* Note: mac_vmode_to_var() does not set all parameters */ 1888 vesafb_defined = var; 1889 } 1890 } 1891 #endif /* !MODULE */ 1892 #endif /* CONFIG_PPC_PMAC */ 1893 vesafb_defined.xres_virtual = vesafb_defined.xres; 1894 if (nopan) { 1895 vesafb_defined.yres_virtual = vesafb_defined.yres; 1896 } else { 1897 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough 1898 to yres_virtual * xres_virtual < 2^32 */ 1899 } 1900 matroxfb_init_fix(minfo); 1901 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase); 1902 /* Normalize values (namely yres_virtual) */ 1903 matroxfb_check_var(&vesafb_defined, &minfo->fbcon); 1904 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over 1905 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var, 1906 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work 1907 * anyway. But we at least tried... */ 1908 minfo->fbcon.var = vesafb_defined; 1909 err = -EINVAL; 1910 1911 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n", 1912 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel, 1913 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual); 1914 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n", 1915 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len); 1916 1917 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console 1918 * and we do not want currcon == 0 for subsequent framebuffers */ 1919 1920 minfo->fbcon.device = &minfo->pcidev->dev; 1921 if (register_framebuffer(&minfo->fbcon) < 0) { 1922 goto failVideoIO; 1923 } 1924 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id); 1925 1926 /* there is no console on this fb... but we have to initialize hardware 1927 * until someone tells me what is proper thing to do */ 1928 if (!minfo->initialized) { 1929 fb_info(&minfo->fbcon, "initializing hardware\n"); 1930 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var 1931 * already before, so register_framebuffer works correctly. */ 1932 vesafb_defined.activate |= FB_ACTIVATE_FORCE; 1933 fb_set_var(&minfo->fbcon, &vesafb_defined); 1934 } 1935 1936 return 0; 1937 failVideoIO:; 1938 matroxfb_g450_shutdown(minfo); 1939 iounmap(minfo->video.vbase.vaddr); 1940 failCtrlIO:; 1941 iounmap(minfo->mmio.vbase.vaddr); 1942 failVideoMR:; 1943 release_mem_region(video_base_phys, minfo->video.len_maximum); 1944 failCtrlMR:; 1945 release_mem_region(ctrlptr_phys, 16384); 1946 fail:; 1947 return err; 1948 } 1949 1950 static LIST_HEAD(matroxfb_list); 1951 static LIST_HEAD(matroxfb_driver_list); 1952 1953 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) 1954 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) 1955 int matroxfb_register_driver(struct matroxfb_driver* drv) { 1956 struct matrox_fb_info* minfo; 1957 1958 list_add(&drv->node, &matroxfb_driver_list); 1959 for (minfo = matroxfb_l(matroxfb_list.next); 1960 minfo != matroxfb_l(&matroxfb_list); 1961 minfo = matroxfb_l(minfo->next_fb.next)) { 1962 void* p; 1963 1964 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS) 1965 continue; 1966 p = drv->probe(minfo); 1967 if (p) { 1968 minfo->drivers_data[minfo->drivers_count] = p; 1969 minfo->drivers[minfo->drivers_count++] = drv; 1970 } 1971 } 1972 return 0; 1973 } 1974 1975 void matroxfb_unregister_driver(struct matroxfb_driver* drv) { 1976 struct matrox_fb_info* minfo; 1977 1978 list_del(&drv->node); 1979 for (minfo = matroxfb_l(matroxfb_list.next); 1980 minfo != matroxfb_l(&matroxfb_list); 1981 minfo = matroxfb_l(minfo->next_fb.next)) { 1982 int i; 1983 1984 for (i = 0; i < minfo->drivers_count; ) { 1985 if (minfo->drivers[i] == drv) { 1986 if (drv && drv->remove) 1987 drv->remove(minfo, minfo->drivers_data[i]); 1988 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count]; 1989 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count]; 1990 } else 1991 i++; 1992 } 1993 } 1994 } 1995 1996 static void matroxfb_register_device(struct matrox_fb_info* minfo) { 1997 struct matroxfb_driver* drv; 1998 int i = 0; 1999 list_add(&minfo->next_fb, &matroxfb_list); 2000 for (drv = matroxfb_driver_l(matroxfb_driver_list.next); 2001 drv != matroxfb_driver_l(&matroxfb_driver_list); 2002 drv = matroxfb_driver_l(drv->node.next)) { 2003 if (drv->probe) { 2004 void *p = drv->probe(minfo); 2005 if (p) { 2006 minfo->drivers_data[i] = p; 2007 minfo->drivers[i++] = drv; 2008 if (i == MATROXFB_MAX_FB_DRIVERS) 2009 break; 2010 } 2011 } 2012 } 2013 minfo->drivers_count = i; 2014 } 2015 2016 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) { 2017 int i; 2018 2019 list_del(&minfo->next_fb); 2020 for (i = 0; i < minfo->drivers_count; i++) { 2021 struct matroxfb_driver* drv = minfo->drivers[i]; 2022 2023 if (drv && drv->remove) 2024 drv->remove(minfo, minfo->drivers_data[i]); 2025 } 2026 } 2027 2028 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { 2029 struct board* b; 2030 u_int16_t svid; 2031 u_int16_t sid; 2032 struct matrox_fb_info* minfo; 2033 int err; 2034 u_int32_t cmd; 2035 DBG(__func__) 2036 2037 svid = pdev->subsystem_vendor; 2038 sid = pdev->subsystem_device; 2039 for (b = dev_list; b->vendor; b++) { 2040 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue; 2041 if (b->svid) 2042 if ((b->svid != svid) || (b->sid != sid)) continue; 2043 break; 2044 } 2045 /* not match... */ 2046 if (!b->vendor) 2047 return -ENODEV; 2048 if (dev > 0) { 2049 /* not requested one... */ 2050 dev--; 2051 return -ENODEV; 2052 } 2053 pci_read_config_dword(pdev, PCI_COMMAND, &cmd); 2054 if (pci_enable_device(pdev)) { 2055 return -1; 2056 } 2057 2058 minfo = kzalloc(sizeof(*minfo), GFP_KERNEL); 2059 if (!minfo) 2060 return -ENOMEM; 2061 2062 minfo->pcidev = pdev; 2063 minfo->dead = 0; 2064 minfo->usecount = 0; 2065 minfo->userusecount = 0; 2066 2067 pci_set_drvdata(pdev, minfo); 2068 /* DEVFLAGS */ 2069 minfo->devflags.memtype = memtype; 2070 if (memtype != -1) 2071 noinit = 0; 2072 if (cmd & PCI_COMMAND_MEMORY) { 2073 minfo->devflags.novga = novga; 2074 minfo->devflags.nobios = nobios; 2075 minfo->devflags.noinit = noinit; 2076 /* subsequent heads always needs initialization and must not enable BIOS */ 2077 novga = 1; 2078 nobios = 1; 2079 noinit = 0; 2080 } else { 2081 minfo->devflags.novga = 1; 2082 minfo->devflags.nobios = 1; 2083 minfo->devflags.noinit = 0; 2084 } 2085 2086 minfo->devflags.nopciretry = no_pci_retry; 2087 minfo->devflags.mga_24bpp_fix = inv24; 2088 minfo->devflags.precise_width = option_precise_width; 2089 minfo->devflags.sgram = sgram; 2090 minfo->capable.cross4MB = cross4MB; 2091 2092 spin_lock_init(&minfo->lock.DAC); 2093 spin_lock_init(&minfo->lock.accel); 2094 init_rwsem(&minfo->crtc2.lock); 2095 init_rwsem(&minfo->altout.lock); 2096 mutex_init(&minfo->fbcon.mm_lock); 2097 minfo->irq_flags = 0; 2098 init_waitqueue_head(&minfo->crtc1.vsync.wait); 2099 init_waitqueue_head(&minfo->crtc2.vsync.wait); 2100 minfo->crtc1.panpos = -1; 2101 2102 err = initMatrox2(minfo, b); 2103 if (!err) { 2104 matroxfb_register_device(minfo); 2105 return 0; 2106 } 2107 kfree(minfo); 2108 return -1; 2109 } 2110 2111 static void pci_remove_matrox(struct pci_dev* pdev) { 2112 struct matrox_fb_info* minfo; 2113 2114 minfo = pci_get_drvdata(pdev); 2115 matroxfb_remove(minfo, 1); 2116 } 2117 2118 static const struct pci_device_id matroxfb_devices[] = { 2119 #ifdef CONFIG_FB_MATROX_MILLENIUM 2120 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 2121 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2122 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 2123 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2124 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 2125 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2126 #endif 2127 #ifdef CONFIG_FB_MATROX_MYSTIQUE 2128 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 2129 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2130 #endif 2131 #ifdef CONFIG_FB_MATROX_G 2132 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 2133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2134 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 2135 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2136 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 2137 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2138 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 2139 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2140 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 2141 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2142 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 2143 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, 2144 #endif 2145 {0, 0, 2146 0, 0, 0, 0, 0} 2147 }; 2148 2149 MODULE_DEVICE_TABLE(pci, matroxfb_devices); 2150 2151 2152 static struct pci_driver matroxfb_driver = { 2153 .name = "matroxfb", 2154 .id_table = matroxfb_devices, 2155 .probe = matroxfb_probe, 2156 .remove = pci_remove_matrox, 2157 }; 2158 2159 /* **************************** init-time only **************************** */ 2160 2161 #define RSResolution(X) ((X) & 0x0F) 2162 #define RS640x400 1 2163 #define RS640x480 2 2164 #define RS800x600 3 2165 #define RS1024x768 4 2166 #define RS1280x1024 5 2167 #define RS1600x1200 6 2168 #define RS768x576 7 2169 #define RS960x720 8 2170 #define RS1152x864 9 2171 #define RS1408x1056 10 2172 #define RS640x350 11 2173 #define RS1056x344 12 /* 132 x 43 text */ 2174 #define RS1056x400 13 /* 132 x 50 text */ 2175 #define RS1056x480 14 /* 132 x 60 text */ 2176 #define RSNoxNo 15 2177 /* 10-FF */ 2178 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = { 2179 { 640, 400, 48, 16, 39, 8, 96, 2, 70 }, 2180 { 640, 480, 48, 16, 33, 10, 96, 2, 60 }, 2181 { 800, 600, 144, 24, 28, 8, 112, 6, 60 }, 2182 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 }, 2183 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 }, 2184 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 }, 2185 { 768, 576, 144, 16, 28, 6, 112, 4, 60 }, 2186 { 960, 720, 144, 24, 28, 8, 112, 4, 60 }, 2187 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 }, 2188 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 }, 2189 { 640, 350, 48, 16, 39, 8, 96, 2, 70 }, 2190 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 }, 2191 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 }, 2192 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 }, 2193 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 } 2194 }; 2195 2196 #define RSCreate(X,Y) ((X) | ((Y) << 8)) 2197 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = { 2198 /* default must be first */ 2199 { ~0, RSCreate(RSNoxNo, RS8bpp ) }, 2200 { 0x101, RSCreate(RS640x480, RS8bpp ) }, 2201 { 0x100, RSCreate(RS640x400, RS8bpp ) }, 2202 { 0x180, RSCreate(RS768x576, RS8bpp ) }, 2203 { 0x103, RSCreate(RS800x600, RS8bpp ) }, 2204 { 0x188, RSCreate(RS960x720, RS8bpp ) }, 2205 { 0x105, RSCreate(RS1024x768, RS8bpp ) }, 2206 { 0x190, RSCreate(RS1152x864, RS8bpp ) }, 2207 { 0x107, RSCreate(RS1280x1024, RS8bpp ) }, 2208 { 0x198, RSCreate(RS1408x1056, RS8bpp ) }, 2209 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) }, 2210 { 0x110, RSCreate(RS640x480, RS15bpp) }, 2211 { 0x181, RSCreate(RS768x576, RS15bpp) }, 2212 { 0x113, RSCreate(RS800x600, RS15bpp) }, 2213 { 0x189, RSCreate(RS960x720, RS15bpp) }, 2214 { 0x116, RSCreate(RS1024x768, RS15bpp) }, 2215 { 0x191, RSCreate(RS1152x864, RS15bpp) }, 2216 { 0x119, RSCreate(RS1280x1024, RS15bpp) }, 2217 { 0x199, RSCreate(RS1408x1056, RS15bpp) }, 2218 { 0x11D, RSCreate(RS1600x1200, RS15bpp) }, 2219 { 0x111, RSCreate(RS640x480, RS16bpp) }, 2220 { 0x182, RSCreate(RS768x576, RS16bpp) }, 2221 { 0x114, RSCreate(RS800x600, RS16bpp) }, 2222 { 0x18A, RSCreate(RS960x720, RS16bpp) }, 2223 { 0x117, RSCreate(RS1024x768, RS16bpp) }, 2224 { 0x192, RSCreate(RS1152x864, RS16bpp) }, 2225 { 0x11A, RSCreate(RS1280x1024, RS16bpp) }, 2226 { 0x19A, RSCreate(RS1408x1056, RS16bpp) }, 2227 { 0x11E, RSCreate(RS1600x1200, RS16bpp) }, 2228 { 0x1B2, RSCreate(RS640x480, RS24bpp) }, 2229 { 0x184, RSCreate(RS768x576, RS24bpp) }, 2230 { 0x1B5, RSCreate(RS800x600, RS24bpp) }, 2231 { 0x18C, RSCreate(RS960x720, RS24bpp) }, 2232 { 0x1B8, RSCreate(RS1024x768, RS24bpp) }, 2233 { 0x194, RSCreate(RS1152x864, RS24bpp) }, 2234 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) }, 2235 { 0x19C, RSCreate(RS1408x1056, RS24bpp) }, 2236 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) }, 2237 { 0x112, RSCreate(RS640x480, RS32bpp) }, 2238 { 0x183, RSCreate(RS768x576, RS32bpp) }, 2239 { 0x115, RSCreate(RS800x600, RS32bpp) }, 2240 { 0x18B, RSCreate(RS960x720, RS32bpp) }, 2241 { 0x118, RSCreate(RS1024x768, RS32bpp) }, 2242 { 0x193, RSCreate(RS1152x864, RS32bpp) }, 2243 { 0x11B, RSCreate(RS1280x1024, RS32bpp) }, 2244 { 0x19B, RSCreate(RS1408x1056, RS32bpp) }, 2245 { 0x11F, RSCreate(RS1600x1200, RS32bpp) }, 2246 { 0x010, RSCreate(RS640x350, RS4bpp ) }, 2247 { 0x012, RSCreate(RS640x480, RS4bpp ) }, 2248 { 0x102, RSCreate(RS800x600, RS4bpp ) }, 2249 { 0x104, RSCreate(RS1024x768, RS4bpp ) }, 2250 { 0x106, RSCreate(RS1280x1024, RS4bpp ) }, 2251 { 0, 0 }}; 2252 2253 static void __init matroxfb_init_params(void) { 2254 /* fh from kHz to Hz */ 2255 if (fh < 1000) 2256 fh *= 1000; /* 1kHz minimum */ 2257 /* maxclk */ 2258 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */ 2259 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */ 2260 /* fix VESA number */ 2261 if (vesa != ~0) 2262 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */ 2263 2264 /* static settings */ 2265 for (RSptr = vesamap; RSptr->vesa; RSptr++) { 2266 if (RSptr->vesa == vesa) break; 2267 } 2268 if (!RSptr->vesa) { 2269 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa); 2270 RSptr = vesamap; 2271 } 2272 { 2273 int res = RSResolution(RSptr->info)-1; 2274 if (left == ~0) 2275 left = timmings[res].left; 2276 if (!xres) 2277 xres = timmings[res].xres; 2278 if (right == ~0) 2279 right = timmings[res].right; 2280 if (!hslen) 2281 hslen = timmings[res].hslen; 2282 if (upper == ~0) 2283 upper = timmings[res].upper; 2284 if (!yres) 2285 yres = timmings[res].yres; 2286 if (lower == ~0) 2287 lower = timmings[res].lower; 2288 if (!vslen) 2289 vslen = timmings[res].vslen; 2290 if (!(fv||fh||maxclk||pixclock)) 2291 fv = timmings[res].vfreq; 2292 if (depth == -1) 2293 depth = RSDepth(RSptr->info); 2294 } 2295 } 2296 2297 static int __init matrox_init(void) { 2298 int err; 2299 2300 matroxfb_init_params(); 2301 err = pci_register_driver(&matroxfb_driver); 2302 dev = -1; /* accept all new devices... */ 2303 return err; 2304 } 2305 2306 /* **************************** exit-time only **************************** */ 2307 2308 static void __exit matrox_done(void) { 2309 pci_unregister_driver(&matroxfb_driver); 2310 } 2311 2312 #ifndef MODULE 2313 2314 /* ************************* init in-kernel code ************************** */ 2315 2316 static int __init matroxfb_setup(char *options) { 2317 char *this_opt; 2318 2319 DBG(__func__) 2320 2321 if (!options || !*options) 2322 return 0; 2323 2324 while ((this_opt = strsep(&options, ",")) != NULL) { 2325 if (!*this_opt) continue; 2326 2327 dprintk("matroxfb_setup: option %s\n", this_opt); 2328 2329 if (!strncmp(this_opt, "dev:", 4)) 2330 dev = simple_strtoul(this_opt+4, NULL, 0); 2331 else if (!strncmp(this_opt, "depth:", 6)) { 2332 switch (simple_strtoul(this_opt+6, NULL, 0)) { 2333 case 0: depth = RSText; break; 2334 case 4: depth = RS4bpp; break; 2335 case 8: depth = RS8bpp; break; 2336 case 15:depth = RS15bpp; break; 2337 case 16:depth = RS16bpp; break; 2338 case 24:depth = RS24bpp; break; 2339 case 32:depth = RS32bpp; break; 2340 default: 2341 printk(KERN_ERR "matroxfb: unsupported color depth\n"); 2342 } 2343 } else if (!strncmp(this_opt, "xres:", 5)) 2344 xres = simple_strtoul(this_opt+5, NULL, 0); 2345 else if (!strncmp(this_opt, "yres:", 5)) 2346 yres = simple_strtoul(this_opt+5, NULL, 0); 2347 else if (!strncmp(this_opt, "vslen:", 6)) 2348 vslen = simple_strtoul(this_opt+6, NULL, 0); 2349 else if (!strncmp(this_opt, "hslen:", 6)) 2350 hslen = simple_strtoul(this_opt+6, NULL, 0); 2351 else if (!strncmp(this_opt, "left:", 5)) 2352 left = simple_strtoul(this_opt+5, NULL, 0); 2353 else if (!strncmp(this_opt, "right:", 6)) 2354 right = simple_strtoul(this_opt+6, NULL, 0); 2355 else if (!strncmp(this_opt, "upper:", 6)) 2356 upper = simple_strtoul(this_opt+6, NULL, 0); 2357 else if (!strncmp(this_opt, "lower:", 6)) 2358 lower = simple_strtoul(this_opt+6, NULL, 0); 2359 else if (!strncmp(this_opt, "pixclock:", 9)) 2360 pixclock = simple_strtoul(this_opt+9, NULL, 0); 2361 else if (!strncmp(this_opt, "sync:", 5)) 2362 sync = simple_strtoul(this_opt+5, NULL, 0); 2363 else if (!strncmp(this_opt, "vesa:", 5)) 2364 vesa = simple_strtoul(this_opt+5, NULL, 0); 2365 else if (!strncmp(this_opt, "maxclk:", 7)) 2366 maxclk = simple_strtoul(this_opt+7, NULL, 0); 2367 else if (!strncmp(this_opt, "fh:", 3)) 2368 fh = simple_strtoul(this_opt+3, NULL, 0); 2369 else if (!strncmp(this_opt, "fv:", 3)) 2370 fv = simple_strtoul(this_opt+3, NULL, 0); 2371 else if (!strncmp(this_opt, "mem:", 4)) 2372 mem = simple_strtoul(this_opt+4, NULL, 0); 2373 else if (!strncmp(this_opt, "mode:", 5)) 2374 strlcpy(videomode, this_opt+5, sizeof(videomode)); 2375 else if (!strncmp(this_opt, "outputs:", 8)) 2376 strlcpy(outputs, this_opt+8, sizeof(outputs)); 2377 else if (!strncmp(this_opt, "dfp:", 4)) { 2378 dfp_type = simple_strtoul(this_opt+4, NULL, 0); 2379 dfp = 1; 2380 } 2381 #ifdef CONFIG_PPC_PMAC 2382 else if (!strncmp(this_opt, "vmode:", 6)) { 2383 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); 2384 if (vmode > 0 && vmode <= VMODE_MAX) 2385 default_vmode = vmode; 2386 } else if (!strncmp(this_opt, "cmode:", 6)) { 2387 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); 2388 switch (cmode) { 2389 case 0: 2390 case 8: 2391 default_cmode = CMODE_8; 2392 break; 2393 case 15: 2394 case 16: 2395 default_cmode = CMODE_16; 2396 break; 2397 case 24: 2398 case 32: 2399 default_cmode = CMODE_32; 2400 break; 2401 } 2402 } 2403 #endif 2404 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */ 2405 disabled = 1; 2406 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */ 2407 disabled = 0; 2408 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */ 2409 sgram = 1; 2410 else if (!strcmp(this_opt, "sdram")) 2411 sgram = 0; 2412 else if (!strncmp(this_opt, "memtype:", 8)) 2413 memtype = simple_strtoul(this_opt+8, NULL, 0); 2414 else { 2415 int value = 1; 2416 2417 if (!strncmp(this_opt, "no", 2)) { 2418 value = 0; 2419 this_opt += 2; 2420 } 2421 if (! strcmp(this_opt, "inverse")) 2422 inverse = value; 2423 else if (!strcmp(this_opt, "accel")) 2424 noaccel = !value; 2425 else if (!strcmp(this_opt, "pan")) 2426 nopan = !value; 2427 else if (!strcmp(this_opt, "pciretry")) 2428 no_pci_retry = !value; 2429 else if (!strcmp(this_opt, "vga")) 2430 novga = !value; 2431 else if (!strcmp(this_opt, "bios")) 2432 nobios = !value; 2433 else if (!strcmp(this_opt, "init")) 2434 noinit = !value; 2435 else if (!strcmp(this_opt, "mtrr")) 2436 mtrr = value; 2437 else if (!strcmp(this_opt, "inv24")) 2438 inv24 = value; 2439 else if (!strcmp(this_opt, "cross4MB")) 2440 cross4MB = value; 2441 else if (!strcmp(this_opt, "grayscale")) 2442 grayscale = value; 2443 else if (!strcmp(this_opt, "dfp")) 2444 dfp = value; 2445 else { 2446 strlcpy(videomode, this_opt, sizeof(videomode)); 2447 } 2448 } 2449 } 2450 return 0; 2451 } 2452 2453 static int __initdata initialized = 0; 2454 2455 static int __init matroxfb_init(void) 2456 { 2457 char *option = NULL; 2458 int err = 0; 2459 2460 DBG(__func__) 2461 2462 if (fb_get_options("matroxfb", &option)) 2463 return -ENODEV; 2464 matroxfb_setup(option); 2465 2466 if (disabled) 2467 return -ENXIO; 2468 if (!initialized) { 2469 initialized = 1; 2470 err = matrox_init(); 2471 } 2472 hotplug = 1; 2473 /* never return failure, user can hotplug matrox later... */ 2474 return err; 2475 } 2476 2477 module_init(matroxfb_init); 2478 2479 #else 2480 2481 /* *************************** init module code **************************** */ 2482 2483 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); 2484 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550"); 2485 MODULE_LICENSE("GPL"); 2486 2487 module_param(mem, int, 0); 2488 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)"); 2489 module_param(disabled, int, 0); 2490 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)"); 2491 module_param(noaccel, int, 0); 2492 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)"); 2493 module_param(nopan, int, 0); 2494 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)"); 2495 module_param(no_pci_retry, int, 0); 2496 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)"); 2497 module_param(novga, int, 0); 2498 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)"); 2499 module_param(nobios, int, 0); 2500 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)"); 2501 module_param(noinit, int, 0); 2502 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)"); 2503 module_param(memtype, int, 0); 2504 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)"); 2505 module_param(mtrr, int, 0); 2506 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)"); 2507 module_param(sgram, int, 0); 2508 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)"); 2509 module_param(inv24, int, 0); 2510 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)"); 2511 module_param(inverse, int, 0); 2512 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)"); 2513 module_param(dev, int, 0); 2514 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)"); 2515 module_param(vesa, int, 0); 2516 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)"); 2517 module_param(xres, int, 0); 2518 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)"); 2519 module_param(yres, int, 0); 2520 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)"); 2521 module_param(upper, int, 0); 2522 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)"); 2523 module_param(lower, int, 0); 2524 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)"); 2525 module_param(vslen, int, 0); 2526 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)"); 2527 module_param(left, int, 0); 2528 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)"); 2529 module_param(right, int, 0); 2530 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)"); 2531 module_param(hslen, int, 0); 2532 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)"); 2533 module_param(pixclock, int, 0); 2534 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)"); 2535 module_param(sync, int, 0); 2536 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)"); 2537 module_param(depth, int, 0); 2538 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)"); 2539 module_param(maxclk, int, 0); 2540 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz"); 2541 module_param(fh, int, 0); 2542 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz"); 2543 module_param(fv, int, 0); 2544 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n" 2545 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\""); 2546 module_param(grayscale, int, 0); 2547 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)"); 2548 module_param(cross4MB, int, 0); 2549 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)"); 2550 module_param(dfp, int, 0); 2551 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)"); 2552 module_param(dfp_type, int, 0); 2553 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)"); 2554 module_param_string(outputs, outputs, sizeof(outputs), 0); 2555 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)"); 2556 #ifdef CONFIG_PPC_PMAC 2557 module_param_named(vmode, default_vmode, int, 0); 2558 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)"); 2559 module_param_named(cmode, default_cmode, int, 0); 2560 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)"); 2561 #endif 2562 2563 int __init init_module(void){ 2564 2565 DBG(__func__) 2566 2567 if (disabled) 2568 return -ENXIO; 2569 2570 if (depth == 0) 2571 depth = RSText; 2572 else if (depth == 4) 2573 depth = RS4bpp; 2574 else if (depth == 8) 2575 depth = RS8bpp; 2576 else if (depth == 15) 2577 depth = RS15bpp; 2578 else if (depth == 16) 2579 depth = RS16bpp; 2580 else if (depth == 24) 2581 depth = RS24bpp; 2582 else if (depth == 32) 2583 depth = RS32bpp; 2584 else if (depth != -1) { 2585 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth); 2586 depth = -1; 2587 } 2588 matrox_init(); 2589 /* never return failure; user can hotplug matrox later... */ 2590 return 0; 2591 } 2592 #endif /* MODULE */ 2593 2594 module_exit(matrox_done); 2595 EXPORT_SYMBOL(matroxfb_register_driver); 2596 EXPORT_SYMBOL(matroxfb_unregister_driver); 2597 EXPORT_SYMBOL(matroxfb_wait_for_sync); 2598 EXPORT_SYMBOL(matroxfb_enable_irq); 2599 2600 /* 2601 * Overrides for Emacs so that we follow Linus's tabbing style. 2602 * --------------------------------------------------------------------------- 2603 * Local variables: 2604 * c-basic-offset: 8 2605 * End: 2606 */ 2607 2608