1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * 4 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400 5 * 6 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz> 7 * 8 * Portions Copyright (c) 2001 Matrox Graphics Inc. 9 * 10 * Version: 1.65 2002/08/14 11 * 12 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org> 13 * 14 * Contributors: "menion?" <menion@mindless.com> 15 * Betatesting, fixes, ideas 16 * 17 * "Kurt Garloff" <garloff@suse.de> 18 * Betatesting, fixes, ideas, videomodes, videomodes timmings 19 * 20 * "Tom Rini" <trini@kernel.crashing.org> 21 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas 22 * 23 * "Bibek Sahu" <scorpio@dodds.net> 24 * Access device through readb|w|l and write b|w|l 25 * Extensive debugging stuff 26 * 27 * "Daniel Haun" <haund@usa.net> 28 * Testing, hardware cursor fixes 29 * 30 * "Scott Wood" <sawst46+@pitt.edu> 31 * Fixes 32 * 33 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de> 34 * Betatesting 35 * 36 * "Kelly French" <targon@hazmat.com> 37 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es> 38 * Betatesting, bug reporting 39 * 40 * "Pablo Bianucci" <pbian@pccp.com.ar> 41 * Fixes, ideas, betatesting 42 * 43 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es> 44 * Fixes, enhandcements, ideas, betatesting 45 * 46 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp> 47 * PPC betatesting, PPC support, backward compatibility 48 * 49 * "Paul Womar" <Paul@pwomar.demon.co.uk> 50 * "Owen Waller" <O.Waller@ee.qub.ac.uk> 51 * PPC betatesting 52 * 53 * "Thomas Pornin" <pornin@bolet.ens.fr> 54 * Alpha betatesting 55 * 56 * "Pieter van Leuven" <pvl@iae.nl> 57 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de> 58 * G100 testing 59 * 60 * "H. Peter Arvin" <hpa@transmeta.com> 61 * Ideas 62 * 63 * "Cort Dougan" <cort@cs.nmt.edu> 64 * CHRP fixes and PReP cleanup 65 * 66 * "Mark Vojkovich" <mvojkovi@ucsd.edu> 67 * G400 support 68 * 69 * "Samuel Hocevar" <sam@via.ecp.fr> 70 * Fixes 71 * 72 * "Anton Altaparmakov" <AntonA@bigfoot.com> 73 * G400 MAX/non-MAX distinction 74 * 75 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com> 76 * memtype extension (needed for GXT130P RS/6000 adapter) 77 * 78 * "Uns Lider" <unslider@miranda.org> 79 * G100 PLNWT fixes 80 * 81 * "Denis Zaitsev" <zzz@cd-club.ru> 82 * Fixes 83 * 84 * "Mike Pieper" <mike@pieper-family.de> 85 * TVOut enhandcements, V4L2 control interface. 86 * 87 * "Diego Biurrun" <diego@biurrun.de> 88 * DFP testing 89 * 90 * (following author is not in any relation with this code, but his code 91 * is included in this driver) 92 * 93 * Based on framebuffer driver for VBE 2.0 compliant graphic boards 94 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de> 95 * 96 * (following author is not in any relation with this code, but his ideas 97 * were used when writing this driver) 98 * 99 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk> 100 * 101 */ 102 103 #include <linux/aperture.h> 104 #include <linux/export.h> 105 #include <linux/version.h> 106 107 #include "matroxfb_base.h" 108 #include "matroxfb_misc.h" 109 #include "matroxfb_accel.h" 110 #include "matroxfb_DAC1064.h" 111 #include "matroxfb_Ti3026.h" 112 #include "matroxfb_maven.h" 113 #include "matroxfb_crtc2.h" 114 #include "matroxfb_g450.h" 115 #include <linux/matroxfb.h> 116 #include <linux/interrupt.h> 117 #include <linux/nvram.h> 118 #include <linux/slab.h> 119 #include <linux/uaccess.h> 120 121 #ifdef CONFIG_PPC_PMAC 122 #include <asm/machdep.h> 123 static int default_vmode = VMODE_NVRAM; 124 static int default_cmode = CMODE_NVRAM; 125 #endif 126 127 static void matroxfb_unregister_device(struct matrox_fb_info* minfo); 128 129 /* --------------------------------------------------------------------- */ 130 131 /* 132 * card parameters 133 */ 134 135 /* --------------------------------------------------------------------- */ 136 137 static struct fb_var_screeninfo vesafb_defined = { 138 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/ 139 0,0, /* virtual -> visible no offset */ 140 8, /* depth -> load bits_per_pixel */ 141 0, /* greyscale ? */ 142 {0,0,0}, /* R */ 143 {0,0,0}, /* G */ 144 {0,0,0}, /* B */ 145 {0,0,0}, /* transparency */ 146 0, /* standard pixel format */ 147 FB_ACTIVATE_NOW, 148 -1,-1, 149 FB_ACCELF_TEXT, /* accel flags */ 150 39721L,48L,16L,33L,10L, 151 96L,2L,~0, /* No sync info */ 152 FB_VMODE_NONINTERLACED, 153 }; 154 155 156 157 /* --------------------------------------------------------------------- */ 158 static void update_crtc2(struct matrox_fb_info *minfo, unsigned int pos) 159 { 160 struct matroxfb_dh_fb_info *info = minfo->crtc2.info; 161 162 /* Make sure that displays are compatible */ 163 if (info && (info->fbcon.var.bits_per_pixel == minfo->fbcon.var.bits_per_pixel) 164 && (info->fbcon.var.xres_virtual == minfo->fbcon.var.xres_virtual) 165 && (info->fbcon.var.green.length == minfo->fbcon.var.green.length) 166 ) { 167 switch (minfo->fbcon.var.bits_per_pixel) { 168 case 16: 169 case 32: 170 pos = pos * 8; 171 if (info->interlaced) { 172 mga_outl(0x3C2C, pos); 173 mga_outl(0x3C28, pos + minfo->fbcon.var.xres_virtual * minfo->fbcon.var.bits_per_pixel / 8); 174 } else { 175 mga_outl(0x3C28, pos); 176 } 177 break; 178 } 179 } 180 } 181 182 static void matroxfb_crtc1_panpos(struct matrox_fb_info *minfo) 183 { 184 if (minfo->crtc1.panpos >= 0) { 185 unsigned long flags; 186 int panpos; 187 188 matroxfb_DAC_lock_irqsave(flags); 189 panpos = minfo->crtc1.panpos; 190 if (panpos >= 0) { 191 unsigned int extvga_reg; 192 193 minfo->crtc1.panpos = -1; /* No update pending anymore */ 194 extvga_reg = mga_inb(M_EXTVGA_INDEX); 195 mga_setr(M_EXTVGA_INDEX, 0x00, panpos); 196 if (extvga_reg != 0x00) { 197 mga_outb(M_EXTVGA_INDEX, extvga_reg); 198 } 199 } 200 matroxfb_DAC_unlock_irqrestore(flags); 201 } 202 } 203 204 static irqreturn_t matrox_irq(int irq, void *dev_id) 205 { 206 u_int32_t status; 207 int handled = 0; 208 struct matrox_fb_info *minfo = dev_id; 209 210 status = mga_inl(M_STATUS); 211 212 if (status & 0x20) { 213 mga_outl(M_ICLEAR, 0x20); 214 minfo->crtc1.vsync.cnt++; 215 matroxfb_crtc1_panpos(minfo); 216 wake_up_interruptible(&minfo->crtc1.vsync.wait); 217 handled = 1; 218 } 219 if (status & 0x200) { 220 mga_outl(M_ICLEAR, 0x200); 221 minfo->crtc2.vsync.cnt++; 222 wake_up_interruptible(&minfo->crtc2.vsync.wait); 223 handled = 1; 224 } 225 return IRQ_RETVAL(handled); 226 } 227 228 int matroxfb_enable_irq(struct matrox_fb_info *minfo, int reenable) 229 { 230 u_int32_t bm; 231 232 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 233 bm = 0x220; 234 else 235 bm = 0x020; 236 237 if (!test_and_set_bit(0, &minfo->irq_flags)) { 238 if (request_irq(minfo->pcidev->irq, matrox_irq, 239 IRQF_SHARED, "matroxfb", minfo)) { 240 clear_bit(0, &minfo->irq_flags); 241 return -EINVAL; 242 } 243 /* Clear any pending field interrupts */ 244 mga_outl(M_ICLEAR, bm); 245 mga_outl(M_IEN, mga_inl(M_IEN) | bm); 246 } else if (reenable) { 247 u_int32_t ien; 248 249 ien = mga_inl(M_IEN); 250 if ((ien & bm) != bm) { 251 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien); 252 mga_outl(M_IEN, ien | bm); 253 } 254 } 255 return 0; 256 } 257 258 static void matroxfb_disable_irq(struct matrox_fb_info *minfo) 259 { 260 if (test_and_clear_bit(0, &minfo->irq_flags)) { 261 /* Flush pending pan-at-vbl request... */ 262 matroxfb_crtc1_panpos(minfo); 263 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 264 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220); 265 else 266 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20); 267 free_irq(minfo->pcidev->irq, minfo); 268 } 269 } 270 271 int matroxfb_wait_for_sync(struct matrox_fb_info *minfo, u_int32_t crtc) 272 { 273 struct matrox_vsync *vs; 274 unsigned int cnt; 275 int ret; 276 277 switch (crtc) { 278 case 0: 279 vs = &minfo->crtc1.vsync; 280 break; 281 case 1: 282 if (minfo->devflags.accelerator != FB_ACCEL_MATROX_MGAG400) { 283 return -ENODEV; 284 } 285 vs = &minfo->crtc2.vsync; 286 break; 287 default: 288 return -ENODEV; 289 } 290 ret = matroxfb_enable_irq(minfo, 0); 291 if (ret) { 292 return ret; 293 } 294 295 cnt = vs->cnt; 296 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10); 297 if (ret < 0) { 298 return ret; 299 } 300 if (ret == 0) { 301 matroxfb_enable_irq(minfo, 1); 302 return -ETIMEDOUT; 303 } 304 return 0; 305 } 306 307 /* --------------------------------------------------------------------- */ 308 309 static void matrox_pan_var(struct matrox_fb_info *minfo, 310 struct fb_var_screeninfo *var) 311 { 312 unsigned int pos; 313 unsigned short p0, p1, p2; 314 unsigned int p3; 315 int vbl; 316 unsigned long flags; 317 318 CRITFLAGS 319 320 DBG(__func__) 321 322 if (minfo->dead) 323 return; 324 325 minfo->fbcon.var.xoffset = var->xoffset; 326 minfo->fbcon.var.yoffset = var->yoffset; 327 pos = (minfo->fbcon.var.yoffset * minfo->fbcon.var.xres_virtual + minfo->fbcon.var.xoffset) * minfo->curr.final_bppShift / 32; 328 pos += minfo->curr.ydstorg.chunks; 329 p0 = minfo->hw.CRTC[0x0D] = pos & 0xFF; 330 p1 = minfo->hw.CRTC[0x0C] = (pos & 0xFF00) >> 8; 331 p2 = minfo->hw.CRTCEXT[0] = (minfo->hw.CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 332 p3 = minfo->hw.CRTCEXT[8] = pos >> 21; 333 334 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */ 335 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(minfo, 0) == 0); 336 337 CRITBEGIN 338 339 matroxfb_DAC_lock_irqsave(flags); 340 mga_setr(M_CRTC_INDEX, 0x0D, p0); 341 mga_setr(M_CRTC_INDEX, 0x0C, p1); 342 if (minfo->devflags.support32MB) 343 mga_setr(M_EXTVGA_INDEX, 0x08, p3); 344 if (vbl) { 345 minfo->crtc1.panpos = p2; 346 } else { 347 /* Abort any pending change */ 348 minfo->crtc1.panpos = -1; 349 mga_setr(M_EXTVGA_INDEX, 0x00, p2); 350 } 351 matroxfb_DAC_unlock_irqrestore(flags); 352 353 update_crtc2(minfo, pos); 354 355 CRITEND 356 } 357 358 static void matroxfb_remove(struct matrox_fb_info *minfo, int dummy) 359 { 360 /* Currently we are holding big kernel lock on all dead & usecount updates. 361 * Destroy everything after all users release it. Especially do not unregister 362 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check 363 * for device unplugged when in use. 364 * In future we should point mmio.vbase & video.vbase somewhere where we can 365 * write data without causing too much damage... 366 */ 367 368 minfo->dead = 1; 369 if (minfo->usecount) { 370 /* destroy it later */ 371 return; 372 } 373 matroxfb_unregister_device(minfo); 374 unregister_framebuffer(&minfo->fbcon); 375 matroxfb_g450_shutdown(minfo); 376 arch_phys_wc_del(minfo->wc_cookie); 377 kfree(minfo); 378 } 379 380 /* 381 * Open/Release the frame buffer device 382 */ 383 384 static int matroxfb_open(struct fb_info *info, int user) 385 { 386 struct matrox_fb_info *minfo = info2minfo(info); 387 388 DBG_LOOP(__func__) 389 390 if (minfo->dead) { 391 return -ENXIO; 392 } 393 minfo->usecount++; 394 if (user) { 395 minfo->userusecount++; 396 } 397 return(0); 398 } 399 400 static int matroxfb_release(struct fb_info *info, int user) 401 { 402 struct matrox_fb_info *minfo = info2minfo(info); 403 404 DBG_LOOP(__func__) 405 406 if (user) { 407 if (0 == --minfo->userusecount) { 408 matroxfb_disable_irq(minfo); 409 } 410 } 411 if (!(--minfo->usecount) && minfo->dead) { 412 matroxfb_remove(minfo, 0); 413 } 414 return(0); 415 } 416 417 static int matroxfb_pan_display(struct fb_var_screeninfo *var, 418 struct fb_info* info) { 419 struct matrox_fb_info *minfo = info2minfo(info); 420 421 DBG(__func__) 422 423 matrox_pan_var(minfo, var); 424 return 0; 425 } 426 427 static int matroxfb_get_final_bppShift(const struct matrox_fb_info *minfo, 428 int bpp) 429 { 430 int bppshft2; 431 432 DBG(__func__) 433 434 bppshft2 = bpp; 435 if (!bppshft2) { 436 return 8; 437 } 438 if (isInterleave(minfo)) 439 bppshft2 >>= 1; 440 if (minfo->devflags.video64bits) 441 bppshft2 >>= 1; 442 return bppshft2; 443 } 444 445 static int matroxfb_test_and_set_rounding(const struct matrox_fb_info *minfo, 446 int xres, int bpp) 447 { 448 int over; 449 int rounding; 450 451 DBG(__func__) 452 453 switch (bpp) { 454 case 0: return xres; 455 case 4: rounding = 128; 456 break; 457 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */ 458 break; 459 case 16: rounding = 32; 460 break; 461 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */ 462 break; 463 default: rounding = 16; 464 /* on G400, 16 really does not work */ 465 if (minfo->devflags.accelerator == FB_ACCEL_MATROX_MGAG400) 466 rounding = 32; 467 break; 468 } 469 if (isInterleave(minfo)) { 470 rounding *= 2; 471 } 472 over = xres % rounding; 473 if (over) 474 xres += rounding-over; 475 return xres; 476 } 477 478 static int matroxfb_pitch_adjust(const struct matrox_fb_info *minfo, int xres, 479 int bpp) 480 { 481 const int* width; 482 int xres_new; 483 484 DBG(__func__) 485 486 if (!bpp) return xres; 487 488 width = minfo->capable.vxres; 489 490 if (minfo->devflags.precise_width) { 491 while (*width) { 492 if ((*width >= xres) && (matroxfb_test_and_set_rounding(minfo, *width, bpp) == *width)) { 493 break; 494 } 495 width++; 496 } 497 xres_new = *width; 498 } else { 499 xres_new = matroxfb_test_and_set_rounding(minfo, xres, bpp); 500 } 501 return xres_new; 502 } 503 504 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) { 505 506 DBG(__func__) 507 508 switch (var->bits_per_pixel) { 509 case 4: 510 return 16; /* pseudocolor... 16 entries HW palette */ 511 case 8: 512 return 256; /* pseudocolor... 256 entries HW palette */ 513 case 16: 514 return 16; /* directcolor... 16 entries SW palette */ 515 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 516 case 24: 517 return 16; /* directcolor... 16 entries SW palette */ 518 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 519 case 32: 520 return 16; /* directcolor... 16 entries SW palette */ 521 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */ 522 } 523 return 16; /* return something reasonable... or panic()? */ 524 } 525 526 static int matroxfb_decode_var(const struct matrox_fb_info *minfo, 527 struct fb_var_screeninfo *var, int *visual, 528 int *video_cmap_len, unsigned int* ydstorg) 529 { 530 struct RGBT { 531 unsigned char bpp; 532 struct { 533 unsigned char offset, 534 length; 535 } red, 536 green, 537 blue, 538 transp; 539 signed char visual; 540 }; 541 static const struct RGBT table[]= { 542 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR}, 543 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR}, 544 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 545 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR}, 546 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR} 547 }; 548 struct RGBT const *rgbt; 549 unsigned int bpp = var->bits_per_pixel; 550 unsigned int vramlen; 551 unsigned int memlen; 552 553 DBG(__func__) 554 555 switch (bpp) { 556 case 4: if (!minfo->capable.cfb4) return -EINVAL; 557 break; 558 case 8: break; 559 case 16: break; 560 case 24: break; 561 case 32: break; 562 default: return -EINVAL; 563 } 564 *ydstorg = 0; 565 vramlen = minfo->video.len_usable; 566 if (var->yres_virtual < var->yres) 567 var->yres_virtual = var->yres; 568 if (var->xres_virtual < var->xres) 569 var->xres_virtual = var->xres; 570 571 var->xres_virtual = matroxfb_pitch_adjust(minfo, var->xres_virtual, bpp); 572 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 573 if (memlen > vramlen) { 574 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp); 575 memlen = var->xres_virtual * bpp * var->yres_virtual / 8; 576 } 577 /* There is hardware bug that no line can cross 4MB boundary */ 578 /* give up for CFB24, it is impossible to easy workaround it */ 579 /* for other try to do something */ 580 if (!minfo->capable.cross4MB && (memlen > 0x400000)) { 581 if (bpp == 24) { 582 /* sorry */ 583 } else { 584 unsigned int linelen; 585 unsigned int m1 = linelen = var->xres_virtual * bpp / 8; 586 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */ 587 unsigned int max_yres; 588 589 while (m1) { 590 while (m2 >= m1) m2 -= m1; 591 swap(m1, m2); 592 } 593 m2 = linelen * PAGE_SIZE / m2; 594 *ydstorg = m2 = 0x400000 % m2; 595 max_yres = (vramlen - m2) / linelen; 596 if (var->yres_virtual > max_yres) 597 var->yres_virtual = max_yres; 598 } 599 } 600 /* YDSTLEN contains only signed 16bit value */ 601 if (var->yres_virtual > 32767) 602 var->yres_virtual = 32767; 603 /* we must round yres/xres down, we already rounded y/xres_virtual up 604 if it was possible. We should return -EINVAL, but I disagree */ 605 if (var->yres_virtual < var->yres) 606 var->yres = var->yres_virtual; 607 if (var->xres_virtual < var->xres) 608 var->xres = var->xres_virtual; 609 if (var->xoffset + var->xres > var->xres_virtual) 610 var->xoffset = var->xres_virtual - var->xres; 611 if (var->yoffset + var->yres > var->yres_virtual) 612 var->yoffset = var->yres_virtual - var->yres; 613 614 if (bpp == 16 && var->green.length == 5) { 615 bpp--; /* an artificial value - 15 */ 616 } 617 618 for (rgbt = table; rgbt->bpp < bpp; rgbt++); 619 #define SETCLR(clr)\ 620 var->clr.offset = rgbt->clr.offset;\ 621 var->clr.length = rgbt->clr.length 622 SETCLR(red); 623 SETCLR(green); 624 SETCLR(blue); 625 SETCLR(transp); 626 #undef SETCLR 627 *visual = rgbt->visual; 628 629 if (bpp > 8) 630 dprintk("matroxfb: truecolor: " 631 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n", 632 var->transp.length, var->red.length, var->green.length, var->blue.length, 633 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset); 634 635 *video_cmap_len = matroxfb_get_cmap_len(var); 636 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel, 637 var->xres_virtual, var->yres_virtual); 638 return 0; 639 } 640 641 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green, 642 unsigned blue, unsigned transp, 643 struct fb_info *fb_info) 644 { 645 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon); 646 647 DBG(__func__) 648 649 /* 650 * Set a single color register. The values supplied are 651 * already rounded down to the hardware's capabilities 652 * (according to the entries in the `var' structure). Return 653 * != 0 for invalid regno. 654 */ 655 656 if (regno >= minfo->curr.cmap_len) 657 return 1; 658 659 if (minfo->fbcon.var.grayscale) { 660 /* gray = 0.30*R + 0.59*G + 0.11*B */ 661 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; 662 } 663 664 red = CNVT_TOHW(red, minfo->fbcon.var.red.length); 665 green = CNVT_TOHW(green, minfo->fbcon.var.green.length); 666 blue = CNVT_TOHW(blue, minfo->fbcon.var.blue.length); 667 transp = CNVT_TOHW(transp, minfo->fbcon.var.transp.length); 668 669 switch (minfo->fbcon.var.bits_per_pixel) { 670 case 4: 671 case 8: 672 mga_outb(M_DAC_REG, regno); 673 mga_outb(M_DAC_VAL, red); 674 mga_outb(M_DAC_VAL, green); 675 mga_outb(M_DAC_VAL, blue); 676 break; 677 case 16: 678 if (regno >= 16) 679 break; 680 { 681 u_int16_t col = 682 (red << minfo->fbcon.var.red.offset) | 683 (green << minfo->fbcon.var.green.offset) | 684 (blue << minfo->fbcon.var.blue.offset) | 685 (transp << minfo->fbcon.var.transp.offset); /* for 1:5:5:5 */ 686 minfo->cmap[regno] = col | (col << 16); 687 } 688 break; 689 case 24: 690 case 32: 691 if (regno >= 16) 692 break; 693 minfo->cmap[regno] = 694 (red << minfo->fbcon.var.red.offset) | 695 (green << minfo->fbcon.var.green.offset) | 696 (blue << minfo->fbcon.var.blue.offset) | 697 (transp << minfo->fbcon.var.transp.offset); /* 8:8:8:8 */ 698 break; 699 } 700 return 0; 701 } 702 703 static void matroxfb_init_fix(struct matrox_fb_info *minfo) 704 { 705 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 706 DBG(__func__) 707 708 strcpy(fix->id,"MATROX"); 709 710 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */ 711 fix->ypanstep = 1; 712 fix->ywrapstep = 0; 713 fix->mmio_start = minfo->mmio.base; 714 fix->mmio_len = minfo->mmio.len; 715 fix->accel = minfo->devflags.accelerator; 716 } 717 718 static void matroxfb_update_fix(struct matrox_fb_info *minfo) 719 { 720 struct fb_fix_screeninfo *fix = &minfo->fbcon.fix; 721 DBG(__func__) 722 723 mutex_lock(&minfo->fbcon.mm_lock); 724 fix->smem_start = minfo->video.base + minfo->curr.ydstorg.bytes; 725 fix->smem_len = minfo->video.len_usable - minfo->curr.ydstorg.bytes; 726 mutex_unlock(&minfo->fbcon.mm_lock); 727 } 728 729 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) 730 { 731 int err; 732 int visual; 733 int cmap_len; 734 unsigned int ydstorg; 735 struct matrox_fb_info *minfo = info2minfo(info); 736 737 if (minfo->dead) { 738 return -ENXIO; 739 } 740 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 741 return err; 742 return 0; 743 } 744 745 static int matroxfb_set_par(struct fb_info *info) 746 { 747 int err; 748 int visual; 749 int cmap_len; 750 unsigned int ydstorg; 751 struct fb_var_screeninfo *var; 752 struct matrox_fb_info *minfo = info2minfo(info); 753 754 DBG(__func__) 755 756 if (minfo->dead) { 757 return -ENXIO; 758 } 759 760 var = &info->var; 761 if ((err = matroxfb_decode_var(minfo, var, &visual, &cmap_len, &ydstorg)) != 0) 762 return err; 763 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase) + ydstorg; 764 matroxfb_update_fix(minfo); 765 minfo->fbcon.fix.visual = visual; 766 minfo->fbcon.fix.type = FB_TYPE_PACKED_PIXELS; 767 minfo->fbcon.fix.type_aux = 0; 768 minfo->fbcon.fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3; 769 { 770 unsigned int pos; 771 772 minfo->curr.cmap_len = cmap_len; 773 ydstorg += minfo->devflags.ydstorg; 774 minfo->curr.ydstorg.bytes = ydstorg; 775 minfo->curr.ydstorg.chunks = ydstorg >> (isInterleave(minfo) ? 3 : 2); 776 if (var->bits_per_pixel == 4) 777 minfo->curr.ydstorg.pixels = ydstorg; 778 else 779 minfo->curr.ydstorg.pixels = (ydstorg * 8) / var->bits_per_pixel; 780 minfo->curr.final_bppShift = matroxfb_get_final_bppShift(minfo, var->bits_per_pixel); 781 { struct my_timming mt; 782 struct matrox_hw_state* hw; 783 int out; 784 785 matroxfb_var2my(var, &mt); 786 mt.crtc = MATROXFB_SRC_CRTC1; 787 /* CRTC1 delays */ 788 switch (var->bits_per_pixel) { 789 case 0: mt.delay = 31 + 0; break; 790 case 16: mt.delay = 21 + 8; break; 791 case 24: mt.delay = 17 + 8; break; 792 case 32: mt.delay = 16 + 8; break; 793 default: mt.delay = 31 + 8; break; 794 } 795 796 hw = &minfo->hw; 797 798 down_read(&minfo->altout.lock); 799 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 800 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 801 minfo->outputs[out].output->compute) { 802 minfo->outputs[out].output->compute(minfo->outputs[out].data, &mt); 803 } 804 } 805 up_read(&minfo->altout.lock); 806 minfo->crtc1.pixclock = mt.pixclock; 807 minfo->crtc1.mnp = mt.mnp; 808 minfo->hw_switch->init(minfo, &mt); 809 pos = (var->yoffset * var->xres_virtual + var->xoffset) * minfo->curr.final_bppShift / 32; 810 pos += minfo->curr.ydstorg.chunks; 811 812 hw->CRTC[0x0D] = pos & 0xFF; 813 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8; 814 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40); 815 hw->CRTCEXT[8] = pos >> 21; 816 minfo->hw_switch->restore(minfo); 817 update_crtc2(minfo, pos); 818 down_read(&minfo->altout.lock); 819 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 820 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 821 minfo->outputs[out].output->program) { 822 minfo->outputs[out].output->program(minfo->outputs[out].data); 823 } 824 } 825 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) { 826 if (minfo->outputs[out].src == MATROXFB_SRC_CRTC1 && 827 minfo->outputs[out].output->start) { 828 minfo->outputs[out].output->start(minfo->outputs[out].data); 829 } 830 } 831 up_read(&minfo->altout.lock); 832 matrox_cfbX_init(minfo); 833 } 834 } 835 minfo->initialized = 1; 836 return 0; 837 } 838 839 static int matroxfb_get_vblank(struct matrox_fb_info *minfo, 840 struct fb_vblank *vblank) 841 { 842 unsigned int sts1; 843 844 matroxfb_enable_irq(minfo, 0); 845 memset(vblank, 0, sizeof(*vblank)); 846 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC | 847 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK; 848 sts1 = mga_inb(M_INSTS1); 849 vblank->vcount = mga_inl(M_VCOUNT); 850 /* BTW, on my PIII/450 with G400, reading M_INSTS1 851 byte makes this call about 12% slower (1.70 vs. 2.05 us 852 per ioctl()) */ 853 if (sts1 & 1) 854 vblank->flags |= FB_VBLANK_HBLANKING; 855 if (sts1 & 8) 856 vblank->flags |= FB_VBLANK_VSYNCING; 857 if (vblank->vcount >= minfo->fbcon.var.yres) 858 vblank->flags |= FB_VBLANK_VBLANKING; 859 if (test_bit(0, &minfo->irq_flags)) { 860 vblank->flags |= FB_VBLANK_HAVE_COUNT; 861 /* Only one writer, aligned int value... 862 it should work without lock and without atomic_t */ 863 vblank->count = minfo->crtc1.vsync.cnt; 864 } 865 return 0; 866 } 867 868 static struct matrox_altout panellink_output = { 869 .name = "Panellink output", 870 }; 871 872 static int matroxfb_ioctl(struct fb_info *info, 873 unsigned int cmd, unsigned long arg) 874 { 875 void __user *argp = (void __user *)arg; 876 struct matrox_fb_info *minfo = info2minfo(info); 877 878 DBG(__func__) 879 880 if (minfo->dead) { 881 return -ENXIO; 882 } 883 884 switch (cmd) { 885 case FBIOGET_VBLANK: 886 { 887 struct fb_vblank vblank; 888 int err; 889 890 err = matroxfb_get_vblank(minfo, &vblank); 891 if (err) 892 return err; 893 if (copy_to_user(argp, &vblank, sizeof(vblank))) 894 return -EFAULT; 895 return 0; 896 } 897 case FBIO_WAITFORVSYNC: 898 { 899 u_int32_t crt; 900 901 if (get_user(crt, (u_int32_t __user *)arg)) 902 return -EFAULT; 903 904 return matroxfb_wait_for_sync(minfo, crt); 905 } 906 case MATROXFB_SET_OUTPUT_MODE: 907 { 908 struct matroxioc_output_mode mom; 909 struct matrox_altout *oproc; 910 int val; 911 912 if (copy_from_user(&mom, argp, sizeof(mom))) 913 return -EFAULT; 914 if (mom.output >= MATROXFB_MAX_OUTPUTS) 915 return -ENXIO; 916 down_read(&minfo->altout.lock); 917 oproc = minfo->outputs[mom.output].output; 918 if (!oproc) { 919 val = -ENXIO; 920 } else if (!oproc->verifymode) { 921 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) { 922 val = 0; 923 } else { 924 val = -EINVAL; 925 } 926 } else { 927 val = oproc->verifymode(minfo->outputs[mom.output].data, mom.mode); 928 } 929 if (!val) { 930 if (minfo->outputs[mom.output].mode != mom.mode) { 931 minfo->outputs[mom.output].mode = mom.mode; 932 val = 1; 933 } 934 } 935 up_read(&minfo->altout.lock); 936 if (val != 1) 937 return val; 938 switch (minfo->outputs[mom.output].src) { 939 case MATROXFB_SRC_CRTC1: 940 matroxfb_set_par(info); 941 break; 942 case MATROXFB_SRC_CRTC2: 943 { 944 struct matroxfb_dh_fb_info* crtc2; 945 946 down_read(&minfo->crtc2.lock); 947 crtc2 = minfo->crtc2.info; 948 if (crtc2) 949 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon); 950 up_read(&minfo->crtc2.lock); 951 } 952 break; 953 } 954 return 0; 955 } 956 case MATROXFB_GET_OUTPUT_MODE: 957 { 958 struct matroxioc_output_mode mom; 959 struct matrox_altout *oproc; 960 int val; 961 962 if (copy_from_user(&mom, argp, sizeof(mom))) 963 return -EFAULT; 964 if (mom.output >= MATROXFB_MAX_OUTPUTS) 965 return -ENXIO; 966 down_read(&minfo->altout.lock); 967 oproc = minfo->outputs[mom.output].output; 968 if (!oproc) { 969 val = -ENXIO; 970 } else { 971 mom.mode = minfo->outputs[mom.output].mode; 972 val = 0; 973 } 974 up_read(&minfo->altout.lock); 975 if (val) 976 return val; 977 if (copy_to_user(argp, &mom, sizeof(mom))) 978 return -EFAULT; 979 return 0; 980 } 981 case MATROXFB_SET_OUTPUT_CONNECTION: 982 { 983 u_int32_t tmp; 984 int i; 985 int changes; 986 987 if (copy_from_user(&tmp, argp, sizeof(tmp))) 988 return -EFAULT; 989 for (i = 0; i < 32; i++) { 990 if (tmp & (1 << i)) { 991 if (i >= MATROXFB_MAX_OUTPUTS) 992 return -ENXIO; 993 if (!minfo->outputs[i].output) 994 return -ENXIO; 995 switch (minfo->outputs[i].src) { 996 case MATROXFB_SRC_NONE: 997 case MATROXFB_SRC_CRTC1: 998 break; 999 default: 1000 return -EBUSY; 1001 } 1002 } 1003 } 1004 if (minfo->devflags.panellink) { 1005 if (tmp & MATROXFB_OUTPUT_CONN_DFP) { 1006 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY) 1007 return -EINVAL; 1008 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1009 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC2) { 1010 return -EBUSY; 1011 } 1012 } 1013 } 1014 } 1015 changes = 0; 1016 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1017 if (tmp & (1 << i)) { 1018 if (minfo->outputs[i].src != MATROXFB_SRC_CRTC1) { 1019 changes = 1; 1020 minfo->outputs[i].src = MATROXFB_SRC_CRTC1; 1021 } 1022 } else if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1023 changes = 1; 1024 minfo->outputs[i].src = MATROXFB_SRC_NONE; 1025 } 1026 } 1027 if (!changes) 1028 return 0; 1029 matroxfb_set_par(info); 1030 return 0; 1031 } 1032 case MATROXFB_GET_OUTPUT_CONNECTION: 1033 { 1034 u_int32_t conn = 0; 1035 int i; 1036 1037 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1038 if (minfo->outputs[i].src == MATROXFB_SRC_CRTC1) { 1039 conn |= 1 << i; 1040 } 1041 } 1042 if (put_user(conn, (u_int32_t __user *)arg)) 1043 return -EFAULT; 1044 return 0; 1045 } 1046 case MATROXFB_GET_AVAILABLE_OUTPUTS: 1047 { 1048 u_int32_t conn = 0; 1049 int i; 1050 1051 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1052 if (minfo->outputs[i].output) { 1053 switch (minfo->outputs[i].src) { 1054 case MATROXFB_SRC_NONE: 1055 case MATROXFB_SRC_CRTC1: 1056 conn |= 1 << i; 1057 break; 1058 } 1059 } 1060 } 1061 if (minfo->devflags.panellink) { 1062 if (conn & MATROXFB_OUTPUT_CONN_DFP) 1063 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY; 1064 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY) 1065 conn &= ~MATROXFB_OUTPUT_CONN_DFP; 1066 } 1067 if (put_user(conn, (u_int32_t __user *)arg)) 1068 return -EFAULT; 1069 return 0; 1070 } 1071 case MATROXFB_GET_ALL_OUTPUTS: 1072 { 1073 u_int32_t conn = 0; 1074 int i; 1075 1076 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1077 if (minfo->outputs[i].output) { 1078 conn |= 1 << i; 1079 } 1080 } 1081 if (put_user(conn, (u_int32_t __user *)arg)) 1082 return -EFAULT; 1083 return 0; 1084 } 1085 case VIDIOC_QUERYCAP: 1086 { 1087 struct v4l2_capability r; 1088 1089 memset(&r, 0, sizeof(r)); 1090 strcpy(r.driver, "matroxfb"); 1091 strcpy(r.card, "Matrox"); 1092 sprintf(r.bus_info, "PCI:%s", pci_name(minfo->pcidev)); 1093 r.version = KERNEL_VERSION(1,0,0); 1094 r.capabilities = V4L2_CAP_VIDEO_OUTPUT; 1095 if (copy_to_user(argp, &r, sizeof(r))) 1096 return -EFAULT; 1097 return 0; 1098 1099 } 1100 case VIDIOC_QUERYCTRL: 1101 { 1102 struct v4l2_queryctrl qctrl; 1103 int err; 1104 1105 if (copy_from_user(&qctrl, argp, sizeof(qctrl))) 1106 return -EFAULT; 1107 1108 down_read(&minfo->altout.lock); 1109 if (!minfo->outputs[1].output) { 1110 err = -ENXIO; 1111 } else if (minfo->outputs[1].output->getqueryctrl) { 1112 err = minfo->outputs[1].output->getqueryctrl(minfo->outputs[1].data, &qctrl); 1113 } else { 1114 err = -EINVAL; 1115 } 1116 up_read(&minfo->altout.lock); 1117 if (err >= 0 && 1118 copy_to_user(argp, &qctrl, sizeof(qctrl))) 1119 return -EFAULT; 1120 return err; 1121 } 1122 case VIDIOC_G_CTRL: 1123 { 1124 struct v4l2_control ctrl; 1125 int err; 1126 1127 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1128 return -EFAULT; 1129 1130 down_read(&minfo->altout.lock); 1131 if (!minfo->outputs[1].output) { 1132 err = -ENXIO; 1133 } else if (minfo->outputs[1].output->getctrl) { 1134 err = minfo->outputs[1].output->getctrl(minfo->outputs[1].data, &ctrl); 1135 } else { 1136 err = -EINVAL; 1137 } 1138 up_read(&minfo->altout.lock); 1139 if (err >= 0 && 1140 copy_to_user(argp, &ctrl, sizeof(ctrl))) 1141 return -EFAULT; 1142 return err; 1143 } 1144 case VIDIOC_S_CTRL: 1145 { 1146 struct v4l2_control ctrl; 1147 int err; 1148 1149 if (copy_from_user(&ctrl, argp, sizeof(ctrl))) 1150 return -EFAULT; 1151 1152 down_read(&minfo->altout.lock); 1153 if (!minfo->outputs[1].output) { 1154 err = -ENXIO; 1155 } else if (minfo->outputs[1].output->setctrl) { 1156 err = minfo->outputs[1].output->setctrl(minfo->outputs[1].data, &ctrl); 1157 } else { 1158 err = -EINVAL; 1159 } 1160 up_read(&minfo->altout.lock); 1161 return err; 1162 } 1163 } 1164 return -ENOTTY; 1165 } 1166 1167 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ 1168 1169 static int matroxfb_blank(int blank, struct fb_info *info) 1170 { 1171 int seq; 1172 int crtc; 1173 CRITFLAGS 1174 struct matrox_fb_info *minfo = info2minfo(info); 1175 1176 DBG(__func__) 1177 1178 if (minfo->dead) 1179 return 1; 1180 1181 switch (blank) { 1182 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */ 1183 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break; 1184 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break; 1185 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break; 1186 default: seq = 0x00; crtc = 0x00; break; 1187 } 1188 1189 CRITBEGIN 1190 1191 mga_outb(M_SEQ_INDEX, 1); 1192 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq); 1193 mga_outb(M_EXTVGA_INDEX, 1); 1194 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc); 1195 1196 CRITEND 1197 return 0; 1198 } 1199 1200 static const struct fb_ops matroxfb_ops = { 1201 .owner = THIS_MODULE, 1202 .fb_open = matroxfb_open, 1203 .fb_release = matroxfb_release, 1204 __FB_DEFAULT_IOMEM_OPS_RDWR, 1205 .fb_check_var = matroxfb_check_var, 1206 .fb_set_par = matroxfb_set_par, 1207 .fb_setcolreg = matroxfb_setcolreg, 1208 .fb_pan_display =matroxfb_pan_display, 1209 .fb_blank = matroxfb_blank, 1210 .fb_ioctl = matroxfb_ioctl, 1211 /* .fb_fillrect = <set by matrox_cfbX_init>, */ 1212 /* .fb_copyarea = <set by matrox_cfbX_init>, */ 1213 /* .fb_imageblit = <set by matrox_cfbX_init>, */ 1214 /* .fb_cursor = <set by matrox_cfbX_init>, */ 1215 __FB_DEFAULT_IOMEM_OPS_MMAP, 1216 }; 1217 1218 #define RSDepth(X) (((X) >> 8) & 0x0F) 1219 #define RS8bpp 0x1 1220 #define RS15bpp 0x2 1221 #define RS16bpp 0x3 1222 #define RS32bpp 0x4 1223 #define RS4bpp 0x5 1224 #define RS24bpp 0x6 1225 #define RSText 0x7 1226 #define RSText8 0x8 1227 /* 9-F */ 1228 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = { 1229 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 }, 1230 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 }, 1231 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 }, 1232 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 }, 1233 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 }, 1234 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 }, 1235 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */ 1236 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */ 1237 }; 1238 1239 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */ 1240 static unsigned int mem; /* "matroxfb:mem:xxxxxM" */ 1241 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */ 1242 static int inv24; /* "matroxfb:inv24" */ 1243 static int cross4MB = -1; /* "matroxfb:cross4MB" */ 1244 static int disabled; /* "matroxfb:disabled" */ 1245 static int noaccel; /* "matroxfb:noaccel" */ 1246 static int nopan; /* "matroxfb:nopan" */ 1247 static int no_pci_retry; /* "matroxfb:nopciretry" */ 1248 static int novga; /* "matroxfb:novga" */ 1249 static int nobios; /* "matroxfb:nobios" */ 1250 static int noinit = 1; /* "matroxfb:init" */ 1251 static int inverse; /* "matroxfb:inverse" */ 1252 static int sgram; /* "matroxfb:sgram" */ 1253 static int mtrr = 1; /* "matroxfb:nomtrr" */ 1254 static int grayscale; /* "matroxfb:grayscale" */ 1255 static int dev = -1; /* "matroxfb:dev:xxxxx" */ 1256 static unsigned int vesa = ~0; /* "matroxfb:vesa:xxxxx" */ 1257 static int depth = -1; /* "matroxfb:depth:xxxxx" */ 1258 static unsigned int xres; /* "matroxfb:xres:xxxxx" */ 1259 static unsigned int yres; /* "matroxfb:yres:xxxxx" */ 1260 static unsigned int upper = ~0; /* "matroxfb:upper:xxxxx" */ 1261 static unsigned int lower = ~0; /* "matroxfb:lower:xxxxx" */ 1262 static unsigned int vslen; /* "matroxfb:vslen:xxxxx" */ 1263 static unsigned int left = ~0; /* "matroxfb:left:xxxxx" */ 1264 static unsigned int right = ~0; /* "matroxfb:right:xxxxx" */ 1265 static unsigned int hslen; /* "matroxfb:hslen:xxxxx" */ 1266 static unsigned int pixclock; /* "matroxfb:pixclock:xxxxx" */ 1267 static int sync = -1; /* "matroxfb:sync:xxxxx" */ 1268 static unsigned int fv; /* "matroxfb:fv:xxxxx" */ 1269 static unsigned int fh; /* "matroxfb:fh:xxxxxk" */ 1270 static unsigned int maxclk; /* "matroxfb:maxclk:xxxxM" */ 1271 static int dfp; /* "matroxfb:dfp */ 1272 static int dfp_type = -1; /* "matroxfb:dfp:xxx */ 1273 static int memtype = -1; /* "matroxfb:memtype:xxx" */ 1274 static char outputs[8]; /* "matroxfb:outputs:xxx" */ 1275 1276 #ifndef MODULE 1277 static char videomode[64]; /* "matroxfb:mode:xxxxx" or "matroxfb:xxxxx" */ 1278 #endif 1279 1280 static int matroxfb_getmemory(struct matrox_fb_info *minfo, 1281 unsigned int maxSize, unsigned int *realSize) 1282 { 1283 vaddr_t vm; 1284 unsigned int offs; 1285 unsigned int offs2; 1286 unsigned char orig; 1287 unsigned char bytes[32]; 1288 unsigned char* tmp; 1289 1290 DBG(__func__) 1291 1292 vm = minfo->video.vbase; 1293 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */ 1294 /* at least 2MB */ 1295 if (maxSize < 0x0200000) return 0; 1296 if (maxSize > 0x2000000) maxSize = 0x2000000; 1297 1298 mga_outb(M_EXTVGA_INDEX, 0x03); 1299 orig = mga_inb(M_EXTVGA_DATA); 1300 mga_outb(M_EXTVGA_DATA, orig | 0x80); 1301 1302 tmp = bytes; 1303 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1304 *tmp++ = mga_readb(vm, offs); 1305 for (offs = 0x100000; offs < maxSize; offs += 0x200000) 1306 mga_writeb(vm, offs, 0x02); 1307 mga_outb(M_CACHEFLUSH, 0x00); 1308 for (offs = 0x100000; offs < maxSize; offs += 0x200000) { 1309 if (mga_readb(vm, offs) != 0x02) 1310 break; 1311 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02); 1312 if (mga_readb(vm, offs)) 1313 break; 1314 } 1315 tmp = bytes; 1316 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000) 1317 mga_writeb(vm, offs2, *tmp++); 1318 1319 mga_outb(M_EXTVGA_INDEX, 0x03); 1320 mga_outb(M_EXTVGA_DATA, orig); 1321 1322 *realSize = offs - 0x100000; 1323 #ifdef CONFIG_FB_MATROX_MILLENIUM 1324 minfo->interleave = !(!isMillenium(minfo) || ((offs - 0x100000) & 0x3FFFFF)); 1325 #endif 1326 return 1; 1327 } 1328 1329 struct video_board { 1330 int maxvram; 1331 int maxdisplayable; 1332 int accelID; 1333 struct matrox_switch* lowlevel; 1334 }; 1335 #ifdef CONFIG_FB_MATROX_MILLENIUM 1336 static struct video_board vbMillennium = { 1337 .maxvram = 0x0800000, 1338 .maxdisplayable = 0x0800000, 1339 .accelID = FB_ACCEL_MATROX_MGA2064W, 1340 .lowlevel = &matrox_millennium 1341 }; 1342 1343 static struct video_board vbMillennium2 = { 1344 .maxvram = 0x1000000, 1345 .maxdisplayable = 0x0800000, 1346 .accelID = FB_ACCEL_MATROX_MGA2164W, 1347 .lowlevel = &matrox_millennium 1348 }; 1349 1350 static struct video_board vbMillennium2A = { 1351 .maxvram = 0x1000000, 1352 .maxdisplayable = 0x0800000, 1353 .accelID = FB_ACCEL_MATROX_MGA2164W_AGP, 1354 .lowlevel = &matrox_millennium 1355 }; 1356 #endif /* CONFIG_FB_MATROX_MILLENIUM */ 1357 #ifdef CONFIG_FB_MATROX_MYSTIQUE 1358 static struct video_board vbMystique = { 1359 .maxvram = 0x0800000, 1360 .maxdisplayable = 0x0800000, 1361 .accelID = FB_ACCEL_MATROX_MGA1064SG, 1362 .lowlevel = &matrox_mystique 1363 }; 1364 #endif /* CONFIG_FB_MATROX_MYSTIQUE */ 1365 #ifdef CONFIG_FB_MATROX_G 1366 static struct video_board vbG100 = { 1367 .maxvram = 0x0800000, 1368 .maxdisplayable = 0x0800000, 1369 .accelID = FB_ACCEL_MATROX_MGAG100, 1370 .lowlevel = &matrox_G100 1371 }; 1372 1373 static struct video_board vbG200 = { 1374 .maxvram = 0x1000000, 1375 .maxdisplayable = 0x1000000, 1376 .accelID = FB_ACCEL_MATROX_MGAG200, 1377 .lowlevel = &matrox_G100 1378 }; 1379 static struct video_board vbG200eW = { 1380 .maxvram = 0x1000000, 1381 .maxdisplayable = 0x0800000, 1382 .accelID = FB_ACCEL_MATROX_MGAG200, 1383 .lowlevel = &matrox_G100 1384 }; 1385 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for 1386 whole 32MB */ 1387 static struct video_board vbG400 = { 1388 .maxvram = 0x2000000, 1389 .maxdisplayable = 0x1000000, 1390 .accelID = FB_ACCEL_MATROX_MGAG400, 1391 .lowlevel = &matrox_G100 1392 }; 1393 #endif 1394 1395 #define DEVF_VIDEO64BIT 0x0001 1396 #define DEVF_SWAPS 0x0002 1397 #define DEVF_SRCORG 0x0004 1398 #define DEVF_DUALHEAD 0x0008 1399 #define DEVF_CROSS4MB 0x0010 1400 #define DEVF_TEXT4B 0x0020 1401 /* #define DEVF_recycled 0x0040 */ 1402 /* #define DEVF_recycled 0x0080 */ 1403 #define DEVF_SUPPORT32MB 0x0100 1404 #define DEVF_ANY_VXRES 0x0200 1405 #define DEVF_TEXT16B 0x0400 1406 #define DEVF_CRTC2 0x0800 1407 #define DEVF_MAVEN_CAPABLE 0x1000 1408 #define DEVF_PANELLINK_CAPABLE 0x2000 1409 #define DEVF_G450DAC 0x4000 1410 1411 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB) 1412 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD) 1413 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */ 1414 #define DEVF_G200 (DEVF_G2CORE) 1415 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2) 1416 /* if you'll find how to drive DFP... */ 1417 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD) 1418 #define DEVF_G550 (DEVF_G450) 1419 1420 static struct board { 1421 unsigned short vendor, device, rev, svid, sid; 1422 unsigned int flags; 1423 unsigned int maxclk; 1424 enum mga_chip chip; 1425 struct video_board* base; 1426 const char* name; 1427 } dev_list[] = { 1428 #ifdef CONFIG_FB_MATROX_MILLENIUM 1429 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF, 1430 0, 0, 1431 DEVF_TEXT4B, 1432 230000, 1433 MGA_2064, 1434 &vbMillennium, 1435 "Millennium (PCI)"}, 1436 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF, 1437 0, 0, 1438 DEVF_SWAPS, 1439 220000, 1440 MGA_2164, 1441 &vbMillennium2, 1442 "Millennium II (PCI)"}, 1443 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF, 1444 0, 0, 1445 DEVF_SWAPS, 1446 250000, 1447 MGA_2164, 1448 &vbMillennium2A, 1449 "Millennium II (AGP)"}, 1450 #endif 1451 #ifdef CONFIG_FB_MATROX_MYSTIQUE 1452 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02, 1453 0, 0, 1454 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1455 180000, 1456 MGA_1064, 1457 &vbMystique, 1458 "Mystique (PCI)"}, 1459 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF, 1460 0, 0, 1461 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1462 220000, 1463 MGA_1164, 1464 &vbMystique, 1465 "Mystique 220 (PCI)"}, 1466 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02, 1467 0, 0, 1468 DEVF_VIDEO64BIT | DEVF_CROSS4MB, 1469 180000, 1470 MGA_1064, 1471 &vbMystique, 1472 "Mystique (AGP)"}, 1473 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF, 1474 0, 0, 1475 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB, 1476 220000, 1477 MGA_1164, 1478 &vbMystique, 1479 "Mystique 220 (AGP)"}, 1480 #endif 1481 #ifdef CONFIG_FB_MATROX_G 1482 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF, 1483 0, 0, 1484 DEVF_G100, 1485 230000, 1486 MGA_G100, 1487 &vbG100, 1488 "MGA-G100 (PCI)"}, 1489 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF, 1490 0, 0, 1491 DEVF_G100, 1492 230000, 1493 MGA_G100, 1494 &vbG100, 1495 "MGA-G100 (AGP)"}, 1496 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF, 1497 0, 0, 1498 DEVF_G200, 1499 250000, 1500 MGA_G200, 1501 &vbG200, 1502 "MGA-G200 (PCI)"}, 1503 {PCI_VENDOR_ID_MATROX, 0x0532, 0xFF, 1504 0, 0, 1505 DEVF_G200, 1506 250000, 1507 MGA_G200, 1508 &vbG200eW, 1509 "MGA-G200eW (PCI)"}, 1510 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1511 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC, 1512 DEVF_G200, 1513 220000, 1514 MGA_G200, 1515 &vbG200, 1516 "MGA-G200 (AGP)"}, 1517 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1518 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP, 1519 DEVF_G200, 1520 230000, 1521 MGA_G200, 1522 &vbG200, 1523 "Mystique G200 (AGP)"}, 1524 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1525 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP, 1526 DEVF_G200, 1527 250000, 1528 MGA_G200, 1529 &vbG200, 1530 "Millennium G200 (AGP)"}, 1531 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1532 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP, 1533 DEVF_G200, 1534 230000, 1535 MGA_G200, 1536 &vbG200, 1537 "Marvel G200 (AGP)"}, 1538 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1539 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP, 1540 DEVF_G200, 1541 230000, 1542 MGA_G200, 1543 &vbG200, 1544 "MGA-G200 (AGP)"}, 1545 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF, 1546 0, 0, 1547 DEVF_G200, 1548 230000, 1549 MGA_G200, 1550 &vbG200, 1551 "G200 (AGP)"}, 1552 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1553 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP, 1554 DEVF_G400, 1555 360000, 1556 MGA_G400, 1557 &vbG400, 1558 "Millennium G400 MAX (AGP)"}, 1559 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80, 1560 0, 0, 1561 DEVF_G400, 1562 300000, 1563 MGA_G400, 1564 &vbG400, 1565 "G400 (AGP)"}, 1566 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF, 1567 0, 0, 1568 DEVF_G450, 1569 360000, 1570 MGA_G450, 1571 &vbG400, 1572 "G450"}, 1573 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF, 1574 0, 0, 1575 DEVF_G550, 1576 360000, 1577 MGA_G550, 1578 &vbG400, 1579 "G550"}, 1580 #endif 1581 {0, 0, 0xFF, 1582 0, 0, 1583 0, 1584 0, 1585 0, 1586 NULL, 1587 NULL}}; 1588 1589 #ifndef MODULE 1590 static const struct fb_videomode defaultmode = { 1591 /* 640x480 @ 60Hz, 31.5 kHz */ 1592 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2, 1593 0, FB_VMODE_NONINTERLACED 1594 }; 1595 1596 static int hotplug = 0; 1597 #endif /* !MODULE */ 1598 1599 static void setDefaultOutputs(struct matrox_fb_info *minfo) 1600 { 1601 unsigned int i; 1602 const char* ptr; 1603 1604 minfo->outputs[0].default_src = MATROXFB_SRC_CRTC1; 1605 if (minfo->devflags.g450dac) { 1606 minfo->outputs[1].default_src = MATROXFB_SRC_CRTC1; 1607 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1608 } else if (dfp) { 1609 minfo->outputs[2].default_src = MATROXFB_SRC_CRTC1; 1610 } 1611 ptr = outputs; 1612 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) { 1613 char c = *ptr++; 1614 1615 if (c == 0) { 1616 break; 1617 } 1618 if (c == '0') { 1619 minfo->outputs[i].default_src = MATROXFB_SRC_NONE; 1620 } else if (c == '1') { 1621 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC1; 1622 } else if (c == '2' && minfo->devflags.crtc2) { 1623 minfo->outputs[i].default_src = MATROXFB_SRC_CRTC2; 1624 } else { 1625 printk(KERN_ERR "matroxfb: Unknown outputs setting\n"); 1626 break; 1627 } 1628 } 1629 /* Nullify this option for subsequent adapters */ 1630 outputs[0] = 0; 1631 } 1632 1633 static int initMatrox2(struct matrox_fb_info *minfo, struct board *b) 1634 { 1635 unsigned long ctrlptr_phys = 0; 1636 unsigned long video_base_phys = 0; 1637 unsigned int memsize; 1638 int err; 1639 1640 static const struct pci_device_id intel_82437[] = { 1641 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82437) }, 1642 { } 1643 }; 1644 1645 DBG(__func__) 1646 1647 /* set default values... */ 1648 vesafb_defined.accel_flags = FB_ACCELF_TEXT; 1649 1650 minfo->hw_switch = b->base->lowlevel; 1651 minfo->devflags.accelerator = b->base->accelID; 1652 minfo->max_pixel_clock = b->maxclk; 1653 1654 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name); 1655 minfo->capable.plnwt = 1; 1656 minfo->chip = b->chip; 1657 minfo->capable.srcorg = b->flags & DEVF_SRCORG; 1658 minfo->devflags.video64bits = b->flags & DEVF_VIDEO64BIT; 1659 if (b->flags & DEVF_TEXT4B) { 1660 minfo->devflags.vgastep = 4; 1661 minfo->devflags.textmode = 4; 1662 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1663 } else if (b->flags & DEVF_TEXT16B) { 1664 minfo->devflags.vgastep = 16; 1665 minfo->devflags.textmode = 1; 1666 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP16; 1667 } else { 1668 minfo->devflags.vgastep = 8; 1669 minfo->devflags.textmode = 1; 1670 minfo->devflags.text_type_aux = FB_AUX_TEXT_MGA_STEP8; 1671 } 1672 minfo->devflags.support32MB = (b->flags & DEVF_SUPPORT32MB) != 0; 1673 minfo->devflags.precise_width = !(b->flags & DEVF_ANY_VXRES); 1674 minfo->devflags.crtc2 = (b->flags & DEVF_CRTC2) != 0; 1675 minfo->devflags.maven_capable = (b->flags & DEVF_MAVEN_CAPABLE) != 0; 1676 minfo->devflags.dualhead = (b->flags & DEVF_DUALHEAD) != 0; 1677 minfo->devflags.dfp_type = dfp_type; 1678 minfo->devflags.g450dac = (b->flags & DEVF_G450DAC) != 0; 1679 minfo->devflags.textstep = minfo->devflags.vgastep * minfo->devflags.textmode; 1680 minfo->devflags.textvram = 65536 / minfo->devflags.textmode; 1681 setDefaultOutputs(minfo); 1682 if (b->flags & DEVF_PANELLINK_CAPABLE) { 1683 minfo->outputs[2].data = minfo; 1684 minfo->outputs[2].output = &panellink_output; 1685 minfo->outputs[2].src = minfo->outputs[2].default_src; 1686 minfo->outputs[2].mode = MATROXFB_OUTPUT_MODE_MONITOR; 1687 minfo->devflags.panellink = 1; 1688 } 1689 1690 if (minfo->capable.cross4MB < 0) 1691 minfo->capable.cross4MB = b->flags & DEVF_CROSS4MB; 1692 if (b->flags & DEVF_SWAPS) { 1693 ctrlptr_phys = pci_resource_start(minfo->pcidev, 1); 1694 video_base_phys = pci_resource_start(minfo->pcidev, 0); 1695 minfo->devflags.fbResource = PCI_BASE_ADDRESS_0; 1696 } else { 1697 ctrlptr_phys = pci_resource_start(minfo->pcidev, 0); 1698 video_base_phys = pci_resource_start(minfo->pcidev, 1); 1699 minfo->devflags.fbResource = PCI_BASE_ADDRESS_1; 1700 } 1701 err = -EINVAL; 1702 if (!ctrlptr_phys) { 1703 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n"); 1704 goto fail; 1705 } 1706 if (!video_base_phys) { 1707 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n"); 1708 goto fail; 1709 } 1710 memsize = b->base->maxvram; 1711 if (!devm_request_mem_region(&minfo->pcidev->dev, ctrlptr_phys, 16384, 1712 "matroxfb MMIO")) { 1713 goto fail; 1714 } 1715 if (!devm_request_mem_region(&minfo->pcidev->dev, video_base_phys, 1716 memsize, "matroxfb FB")) { 1717 goto fail; 1718 } 1719 minfo->video.len_maximum = memsize; 1720 /* convert mem (autodetect k, M) */ 1721 if (mem < 1024) mem *= 1024; 1722 if (mem < 0x00100000) mem *= 1024; 1723 1724 if (mem && (mem < memsize)) 1725 memsize = mem; 1726 err = -ENOMEM; 1727 1728 minfo->mmio.vbase.vaddr = devm_ioremap(&minfo->pcidev->dev, ctrlptr_phys, 16384); 1729 if (!minfo->mmio.vbase.vaddr) { 1730 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys); 1731 goto fail; 1732 } 1733 minfo->mmio.base = ctrlptr_phys; 1734 minfo->mmio.len = 16384; 1735 minfo->video.base = video_base_phys; 1736 minfo->video.vbase.vaddr = devm_ioremap_wc(&minfo->pcidev->dev, video_base_phys, memsize); 1737 if (!minfo->video.vbase.vaddr) { 1738 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n", 1739 video_base_phys, memsize); 1740 goto fail; 1741 } 1742 { 1743 u_int32_t cmd; 1744 u_int32_t mga_option; 1745 1746 pci_read_config_dword(minfo->pcidev, PCI_OPTION_REG, &mga_option); 1747 pci_read_config_dword(minfo->pcidev, PCI_COMMAND, &cmd); 1748 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */ 1749 mga_option |= MX_OPTION_BSWAP; 1750 /* disable palette snooping */ 1751 cmd &= ~PCI_COMMAND_VGA_PALETTE; 1752 if (pci_dev_present(intel_82437)) { 1753 if (!(mga_option & 0x20000000) && !minfo->devflags.nopciretry) { 1754 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n"); 1755 } 1756 mga_option |= 0x20000000; 1757 minfo->devflags.nopciretry = 1; 1758 } 1759 pci_write_config_dword(minfo->pcidev, PCI_COMMAND, cmd); 1760 pci_write_config_dword(minfo->pcidev, PCI_OPTION_REG, mga_option); 1761 minfo->hw.MXoptionReg = mga_option; 1762 1763 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */ 1764 /* maybe preinit() candidate, but it is same... for all devices... at this time... */ 1765 pci_write_config_dword(minfo->pcidev, PCI_MGA_INDEX, 0x00003C00); 1766 } 1767 1768 err = -ENXIO; 1769 matroxfb_read_pins(minfo); 1770 if (minfo->hw_switch->preinit(minfo)) { 1771 goto failVideoIO; 1772 } 1773 1774 err = -ENOMEM; 1775 if (!matroxfb_getmemory(minfo, memsize, &minfo->video.len) || !minfo->video.len) { 1776 printk(KERN_ERR "matroxfb: cannot determine memory size\n"); 1777 goto failVideoIO; 1778 } 1779 minfo->devflags.ydstorg = 0; 1780 1781 minfo->video.base = video_base_phys; 1782 minfo->video.len_usable = minfo->video.len; 1783 if (minfo->video.len_usable > b->base->maxdisplayable) 1784 minfo->video.len_usable = b->base->maxdisplayable; 1785 if (mtrr) 1786 minfo->wc_cookie = arch_phys_wc_add(video_base_phys, 1787 minfo->video.len); 1788 1789 if (!minfo->devflags.novga) 1790 request_region(0x3C0, 32, "matrox"); 1791 matroxfb_g450_connect(minfo); 1792 minfo->hw_switch->reset(minfo); 1793 1794 minfo->fbcon.monspecs.hfmin = 0; 1795 minfo->fbcon.monspecs.hfmax = fh; 1796 minfo->fbcon.monspecs.vfmin = 0; 1797 minfo->fbcon.monspecs.vfmax = fv; 1798 minfo->fbcon.monspecs.dpms = 0; /* TBD */ 1799 1800 /* static settings */ 1801 vesafb_defined.red = colors[depth-1].red; 1802 vesafb_defined.green = colors[depth-1].green; 1803 vesafb_defined.blue = colors[depth-1].blue; 1804 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel; 1805 vesafb_defined.grayscale = grayscale; 1806 vesafb_defined.vmode = 0; 1807 if (noaccel) 1808 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT; 1809 1810 minfo->fbops = matroxfb_ops; 1811 minfo->fbcon.fbops = &minfo->fbops; 1812 minfo->fbcon.pseudo_palette = minfo->cmap; 1813 minfo->fbcon.flags = FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */ 1814 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */ 1815 FBINFO_HWACCEL_FILLRECT | /* And fillrect */ 1816 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */ 1817 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */ 1818 FBINFO_HWACCEL_YPAN | /* And vertical panning */ 1819 FBINFO_READS_FAST; 1820 minfo->video.len_usable &= PAGE_MASK; 1821 fb_alloc_cmap(&minfo->fbcon.cmap, 256, 1); 1822 1823 #ifndef MODULE 1824 /* mode database is marked __init!!! */ 1825 if (!hotplug) { 1826 fb_find_mode(&vesafb_defined, &minfo->fbcon, videomode[0] ? videomode : NULL, 1827 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel); 1828 } 1829 #endif /* !MODULE */ 1830 1831 /* mode modifiers */ 1832 if (hslen) 1833 vesafb_defined.hsync_len = hslen; 1834 if (vslen) 1835 vesafb_defined.vsync_len = vslen; 1836 if (left != ~0) 1837 vesafb_defined.left_margin = left; 1838 if (right != ~0) 1839 vesafb_defined.right_margin = right; 1840 if (upper != ~0) 1841 vesafb_defined.upper_margin = upper; 1842 if (lower != ~0) 1843 vesafb_defined.lower_margin = lower; 1844 if (xres) 1845 vesafb_defined.xres = xres; 1846 if (yres) 1847 vesafb_defined.yres = yres; 1848 if (sync != -1) 1849 vesafb_defined.sync = sync; 1850 else if (vesafb_defined.sync == ~0) { 1851 vesafb_defined.sync = 0; 1852 if (yres < 400) 1853 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT; 1854 else if (yres < 480) 1855 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT; 1856 } 1857 1858 /* fv, fh, maxclk limits was specified */ 1859 { 1860 unsigned int tmp; 1861 1862 if (fv) { 1863 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres 1864 + vesafb_defined.lower_margin + vesafb_defined.vsync_len); 1865 if ((tmp < fh) || (fh == 0)) fh = tmp; 1866 } 1867 if (fh) { 1868 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres 1869 + vesafb_defined.right_margin + vesafb_defined.hsync_len); 1870 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp; 1871 } 1872 tmp = (maxclk + 499) / 500; 1873 if (tmp) { 1874 tmp = (2000000000 + tmp) / tmp; 1875 if (tmp > pixclock) pixclock = tmp; 1876 } 1877 } 1878 if (pixclock) { 1879 if (pixclock < 2000) /* > 500MHz */ 1880 pixclock = 4000; /* 250MHz */ 1881 if (pixclock > 1000000) 1882 pixclock = 1000000; /* 1MHz */ 1883 vesafb_defined.pixclock = pixclock; 1884 } 1885 1886 /* FIXME: Where to move this?! */ 1887 #if defined(CONFIG_PPC_PMAC) 1888 #ifndef MODULE 1889 if (machine_is(powermac)) { 1890 struct fb_var_screeninfo var; 1891 1892 if (default_vmode <= 0 || default_vmode > VMODE_MAX) 1893 default_vmode = VMODE_640_480_60; 1894 #if defined(CONFIG_PPC32) 1895 if (IS_REACHABLE(CONFIG_NVRAM) && default_cmode == CMODE_NVRAM) 1896 default_cmode = nvram_read_byte(NV_CMODE); 1897 #endif 1898 if (default_cmode < CMODE_8 || default_cmode > CMODE_32) 1899 default_cmode = CMODE_8; 1900 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) { 1901 var.accel_flags = vesafb_defined.accel_flags; 1902 var.xoffset = var.yoffset = 0; 1903 /* Note: mac_vmode_to_var() does not set all parameters */ 1904 vesafb_defined = var; 1905 } 1906 } 1907 #endif /* !MODULE */ 1908 #endif /* CONFIG_PPC_PMAC */ 1909 vesafb_defined.xres_virtual = vesafb_defined.xres; 1910 if (nopan) { 1911 vesafb_defined.yres_virtual = vesafb_defined.yres; 1912 } else { 1913 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough 1914 to yres_virtual * xres_virtual < 2^32 */ 1915 } 1916 matroxfb_init_fix(minfo); 1917 minfo->fbcon.screen_base = vaddr_va(minfo->video.vbase); 1918 /* Normalize values (namely yres_virtual) */ 1919 matroxfb_check_var(&vesafb_defined, &minfo->fbcon); 1920 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over 1921 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var, 1922 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work 1923 * anyway. But we at least tried... */ 1924 minfo->fbcon.var = vesafb_defined; 1925 err = -EINVAL; 1926 1927 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n", 1928 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel, 1929 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual); 1930 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n", 1931 minfo->video.base, vaddr_va(minfo->video.vbase), minfo->video.len); 1932 1933 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console 1934 * and we do not want currcon == 0 for subsequent framebuffers */ 1935 1936 minfo->fbcon.device = &minfo->pcidev->dev; 1937 if (register_framebuffer(&minfo->fbcon) < 0) { 1938 goto failVideoIO; 1939 } 1940 fb_info(&minfo->fbcon, "%s frame buffer device\n", minfo->fbcon.fix.id); 1941 1942 /* there is no console on this fb... but we have to initialize hardware 1943 * until someone tells me what is proper thing to do */ 1944 if (!minfo->initialized) { 1945 fb_info(&minfo->fbcon, "initializing hardware\n"); 1946 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var 1947 * already before, so register_framebuffer works correctly. */ 1948 vesafb_defined.activate |= FB_ACTIVATE_FORCE; 1949 fb_set_var(&minfo->fbcon, &vesafb_defined); 1950 } 1951 1952 return 0; 1953 failVideoIO:; 1954 matroxfb_g450_shutdown(minfo); 1955 fail:; 1956 return err; 1957 } 1958 1959 static LIST_HEAD(matroxfb_list); 1960 static LIST_HEAD(matroxfb_driver_list); 1961 1962 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb) 1963 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node) 1964 int matroxfb_register_driver(struct matroxfb_driver* drv) { 1965 struct matrox_fb_info* minfo; 1966 1967 list_add(&drv->node, &matroxfb_driver_list); 1968 list_for_each_entry(minfo, &matroxfb_list, next_fb) { 1969 void* p; 1970 1971 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS) 1972 continue; 1973 p = drv->probe(minfo); 1974 if (p) { 1975 minfo->drivers_data[minfo->drivers_count] = p; 1976 minfo->drivers[minfo->drivers_count++] = drv; 1977 } 1978 } 1979 return 0; 1980 } 1981 1982 void matroxfb_unregister_driver(struct matroxfb_driver* drv) { 1983 struct matrox_fb_info* minfo; 1984 1985 list_del(&drv->node); 1986 list_for_each_entry(minfo, &matroxfb_list, next_fb) { 1987 int i; 1988 1989 for (i = 0; i < minfo->drivers_count; ) { 1990 if (minfo->drivers[i] == drv) { 1991 if (drv && drv->remove) 1992 drv->remove(minfo, minfo->drivers_data[i]); 1993 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count]; 1994 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count]; 1995 } else 1996 i++; 1997 } 1998 } 1999 } 2000 2001 static void matroxfb_register_device(struct matrox_fb_info* minfo) { 2002 struct matroxfb_driver* drv; 2003 int i = 0; 2004 list_add(&minfo->next_fb, &matroxfb_list); 2005 for (drv = matroxfb_driver_l(matroxfb_driver_list.next); 2006 drv != matroxfb_driver_l(&matroxfb_driver_list); 2007 drv = matroxfb_driver_l(drv->node.next)) { 2008 if (drv->probe) { 2009 void *p = drv->probe(minfo); 2010 if (p) { 2011 minfo->drivers_data[i] = p; 2012 minfo->drivers[i++] = drv; 2013 if (i == MATROXFB_MAX_FB_DRIVERS) 2014 break; 2015 } 2016 } 2017 } 2018 minfo->drivers_count = i; 2019 } 2020 2021 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) { 2022 int i; 2023 2024 list_del(&minfo->next_fb); 2025 for (i = 0; i < minfo->drivers_count; i++) { 2026 struct matroxfb_driver* drv = minfo->drivers[i]; 2027 2028 if (drv && drv->remove) 2029 drv->remove(minfo, minfo->drivers_data[i]); 2030 } 2031 } 2032 2033 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) { 2034 struct board* b; 2035 u_int16_t svid; 2036 u_int16_t sid; 2037 struct matrox_fb_info* minfo; 2038 int err; 2039 u_int32_t cmd; 2040 DBG(__func__) 2041 2042 err = aperture_remove_conflicting_pci_devices(pdev, "matroxfb"); 2043 if (err) 2044 return err; 2045 2046 svid = pdev->subsystem_vendor; 2047 sid = pdev->subsystem_device; 2048 for (b = dev_list; b->vendor; b++) { 2049 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < pdev->revision)) continue; 2050 if (b->svid) 2051 if ((b->svid != svid) || (b->sid != sid)) continue; 2052 break; 2053 } 2054 /* not match... */ 2055 if (!b->vendor) 2056 return -ENODEV; 2057 if (dev > 0) { 2058 /* not requested one... */ 2059 dev--; 2060 return -ENODEV; 2061 } 2062 pci_read_config_dword(pdev, PCI_COMMAND, &cmd); 2063 if (pcim_enable_device(pdev)) 2064 return -1; 2065 2066 minfo = kzalloc_obj(*minfo); 2067 if (!minfo) 2068 return -ENOMEM; 2069 2070 minfo->pcidev = pdev; 2071 minfo->dead = 0; 2072 minfo->usecount = 0; 2073 minfo->userusecount = 0; 2074 2075 pci_set_drvdata(pdev, minfo); 2076 /* DEVFLAGS */ 2077 minfo->devflags.memtype = memtype; 2078 if (memtype != -1) 2079 noinit = 0; 2080 if (cmd & PCI_COMMAND_MEMORY) { 2081 minfo->devflags.novga = novga; 2082 minfo->devflags.nobios = nobios; 2083 minfo->devflags.noinit = noinit; 2084 /* subsequent heads always needs initialization and must not enable BIOS */ 2085 novga = 1; 2086 nobios = 1; 2087 noinit = 0; 2088 } else { 2089 minfo->devflags.novga = 1; 2090 minfo->devflags.nobios = 1; 2091 minfo->devflags.noinit = 0; 2092 } 2093 2094 minfo->devflags.nopciretry = no_pci_retry; 2095 minfo->devflags.mga_24bpp_fix = inv24; 2096 minfo->devflags.precise_width = option_precise_width; 2097 minfo->devflags.sgram = sgram; 2098 minfo->capable.cross4MB = cross4MB; 2099 2100 spin_lock_init(&minfo->lock.DAC); 2101 spin_lock_init(&minfo->lock.accel); 2102 init_rwsem(&minfo->crtc2.lock); 2103 init_rwsem(&minfo->altout.lock); 2104 mutex_init(&minfo->fbcon.mm_lock); 2105 minfo->irq_flags = 0; 2106 init_waitqueue_head(&minfo->crtc1.vsync.wait); 2107 init_waitqueue_head(&minfo->crtc2.vsync.wait); 2108 minfo->crtc1.panpos = -1; 2109 2110 err = initMatrox2(minfo, b); 2111 if (!err) { 2112 matroxfb_register_device(minfo); 2113 return 0; 2114 } 2115 kfree(minfo); 2116 return -1; 2117 } 2118 2119 static void pci_remove_matrox(struct pci_dev* pdev) { 2120 struct matrox_fb_info* minfo; 2121 2122 minfo = pci_get_drvdata(pdev); 2123 matroxfb_remove(minfo, 1); 2124 } 2125 2126 static const struct pci_device_id matroxfb_devices[] = { 2127 #ifdef CONFIG_FB_MATROX_MILLENIUM 2128 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_MIL) }, 2129 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_MIL_2) }, 2130 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP) }, 2131 #endif 2132 #ifdef CONFIG_FB_MATROX_MYSTIQUE 2133 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_MYS) }, 2134 #endif 2135 #ifdef CONFIG_FB_MATROX_G 2136 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G100_MM) }, 2137 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G100_AGP) }, 2138 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G200_PCI) }, 2139 { PCI_VDEVICE(MATROX, 0x0532) }, 2140 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G200_AGP) }, 2141 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G400) }, 2142 { PCI_VDEVICE(MATROX, PCI_DEVICE_ID_MATROX_G550) }, 2143 #endif 2144 { } 2145 }; 2146 2147 MODULE_DEVICE_TABLE(pci, matroxfb_devices); 2148 2149 2150 static struct pci_driver matroxfb_driver = { 2151 .name = "matroxfb", 2152 .id_table = matroxfb_devices, 2153 .probe = matroxfb_probe, 2154 .remove = pci_remove_matrox, 2155 }; 2156 2157 /* **************************** init-time only **************************** */ 2158 2159 #define RSResolution(X) ((X) & 0x0F) 2160 #define RS640x400 1 2161 #define RS640x480 2 2162 #define RS800x600 3 2163 #define RS1024x768 4 2164 #define RS1280x1024 5 2165 #define RS1600x1200 6 2166 #define RS768x576 7 2167 #define RS960x720 8 2168 #define RS1152x864 9 2169 #define RS1408x1056 10 2170 #define RS640x350 11 2171 #define RS1056x344 12 /* 132 x 43 text */ 2172 #define RS1056x400 13 /* 132 x 50 text */ 2173 #define RS1056x480 14 /* 132 x 60 text */ 2174 #define RSNoxNo 15 2175 /* 10-FF */ 2176 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = { 2177 { 640, 400, 48, 16, 39, 8, 96, 2, 70 }, 2178 { 640, 480, 48, 16, 33, 10, 96, 2, 60 }, 2179 { 800, 600, 144, 24, 28, 8, 112, 6, 60 }, 2180 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 }, 2181 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 }, 2182 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 }, 2183 { 768, 576, 144, 16, 28, 6, 112, 4, 60 }, 2184 { 960, 720, 144, 24, 28, 8, 112, 4, 60 }, 2185 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 }, 2186 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 }, 2187 { 640, 350, 48, 16, 39, 8, 96, 2, 70 }, 2188 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 }, 2189 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 }, 2190 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 }, 2191 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 } 2192 }; 2193 2194 #define RSCreate(X,Y) ((X) | ((Y) << 8)) 2195 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = { 2196 /* default must be first */ 2197 { ~0, RSCreate(RSNoxNo, RS8bpp ) }, 2198 { 0x101, RSCreate(RS640x480, RS8bpp ) }, 2199 { 0x100, RSCreate(RS640x400, RS8bpp ) }, 2200 { 0x180, RSCreate(RS768x576, RS8bpp ) }, 2201 { 0x103, RSCreate(RS800x600, RS8bpp ) }, 2202 { 0x188, RSCreate(RS960x720, RS8bpp ) }, 2203 { 0x105, RSCreate(RS1024x768, RS8bpp ) }, 2204 { 0x190, RSCreate(RS1152x864, RS8bpp ) }, 2205 { 0x107, RSCreate(RS1280x1024, RS8bpp ) }, 2206 { 0x198, RSCreate(RS1408x1056, RS8bpp ) }, 2207 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) }, 2208 { 0x110, RSCreate(RS640x480, RS15bpp) }, 2209 { 0x181, RSCreate(RS768x576, RS15bpp) }, 2210 { 0x113, RSCreate(RS800x600, RS15bpp) }, 2211 { 0x189, RSCreate(RS960x720, RS15bpp) }, 2212 { 0x116, RSCreate(RS1024x768, RS15bpp) }, 2213 { 0x191, RSCreate(RS1152x864, RS15bpp) }, 2214 { 0x119, RSCreate(RS1280x1024, RS15bpp) }, 2215 { 0x199, RSCreate(RS1408x1056, RS15bpp) }, 2216 { 0x11D, RSCreate(RS1600x1200, RS15bpp) }, 2217 { 0x111, RSCreate(RS640x480, RS16bpp) }, 2218 { 0x182, RSCreate(RS768x576, RS16bpp) }, 2219 { 0x114, RSCreate(RS800x600, RS16bpp) }, 2220 { 0x18A, RSCreate(RS960x720, RS16bpp) }, 2221 { 0x117, RSCreate(RS1024x768, RS16bpp) }, 2222 { 0x192, RSCreate(RS1152x864, RS16bpp) }, 2223 { 0x11A, RSCreate(RS1280x1024, RS16bpp) }, 2224 { 0x19A, RSCreate(RS1408x1056, RS16bpp) }, 2225 { 0x11E, RSCreate(RS1600x1200, RS16bpp) }, 2226 { 0x1B2, RSCreate(RS640x480, RS24bpp) }, 2227 { 0x184, RSCreate(RS768x576, RS24bpp) }, 2228 { 0x1B5, RSCreate(RS800x600, RS24bpp) }, 2229 { 0x18C, RSCreate(RS960x720, RS24bpp) }, 2230 { 0x1B8, RSCreate(RS1024x768, RS24bpp) }, 2231 { 0x194, RSCreate(RS1152x864, RS24bpp) }, 2232 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) }, 2233 { 0x19C, RSCreate(RS1408x1056, RS24bpp) }, 2234 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) }, 2235 { 0x112, RSCreate(RS640x480, RS32bpp) }, 2236 { 0x183, RSCreate(RS768x576, RS32bpp) }, 2237 { 0x115, RSCreate(RS800x600, RS32bpp) }, 2238 { 0x18B, RSCreate(RS960x720, RS32bpp) }, 2239 { 0x118, RSCreate(RS1024x768, RS32bpp) }, 2240 { 0x193, RSCreate(RS1152x864, RS32bpp) }, 2241 { 0x11B, RSCreate(RS1280x1024, RS32bpp) }, 2242 { 0x19B, RSCreate(RS1408x1056, RS32bpp) }, 2243 { 0x11F, RSCreate(RS1600x1200, RS32bpp) }, 2244 { 0x010, RSCreate(RS640x350, RS4bpp ) }, 2245 { 0x012, RSCreate(RS640x480, RS4bpp ) }, 2246 { 0x102, RSCreate(RS800x600, RS4bpp ) }, 2247 { 0x104, RSCreate(RS1024x768, RS4bpp ) }, 2248 { 0x106, RSCreate(RS1280x1024, RS4bpp ) }, 2249 { 0, 0 }}; 2250 2251 static void __init matroxfb_init_params(void) { 2252 /* fh from kHz to Hz */ 2253 if (fh < 1000) 2254 fh *= 1000; /* 1kHz minimum */ 2255 /* maxclk */ 2256 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */ 2257 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */ 2258 /* fix VESA number */ 2259 if (vesa != ~0) 2260 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */ 2261 2262 /* static settings */ 2263 for (RSptr = vesamap; RSptr->vesa; RSptr++) { 2264 if (RSptr->vesa == vesa) break; 2265 } 2266 if (!RSptr->vesa) { 2267 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa); 2268 RSptr = vesamap; 2269 } 2270 { 2271 int res = RSResolution(RSptr->info)-1; 2272 if (left == ~0) 2273 left = timmings[res].left; 2274 if (!xres) 2275 xres = timmings[res].xres; 2276 if (right == ~0) 2277 right = timmings[res].right; 2278 if (!hslen) 2279 hslen = timmings[res].hslen; 2280 if (upper == ~0) 2281 upper = timmings[res].upper; 2282 if (!yres) 2283 yres = timmings[res].yres; 2284 if (lower == ~0) 2285 lower = timmings[res].lower; 2286 if (!vslen) 2287 vslen = timmings[res].vslen; 2288 if (!(fv||fh||maxclk||pixclock)) 2289 fv = timmings[res].vfreq; 2290 if (depth == -1) 2291 depth = RSDepth(RSptr->info); 2292 } 2293 } 2294 2295 static int __init matrox_init(void) { 2296 int err; 2297 2298 if (fb_modesetting_disabled("matroxfb")) 2299 return -ENODEV; 2300 2301 matroxfb_init_params(); 2302 err = pci_register_driver(&matroxfb_driver); 2303 dev = -1; /* accept all new devices... */ 2304 return err; 2305 } 2306 2307 /* **************************** exit-time only **************************** */ 2308 2309 static void __exit matrox_done(void) { 2310 pci_unregister_driver(&matroxfb_driver); 2311 } 2312 2313 #ifndef MODULE 2314 2315 /* ************************* init in-kernel code ************************** */ 2316 2317 static int __init matroxfb_setup(char *options) { 2318 char *this_opt; 2319 2320 DBG(__func__) 2321 2322 if (!options || !*options) 2323 return 0; 2324 2325 while ((this_opt = strsep(&options, ",")) != NULL) { 2326 if (!*this_opt) continue; 2327 2328 dprintk("matroxfb_setup: option %s\n", this_opt); 2329 2330 if (!strncmp(this_opt, "dev:", 4)) 2331 dev = simple_strtoul(this_opt+4, NULL, 0); 2332 else if (!strncmp(this_opt, "depth:", 6)) { 2333 switch (simple_strtoul(this_opt+6, NULL, 0)) { 2334 case 0: depth = RSText; break; 2335 case 4: depth = RS4bpp; break; 2336 case 8: depth = RS8bpp; break; 2337 case 15:depth = RS15bpp; break; 2338 case 16:depth = RS16bpp; break; 2339 case 24:depth = RS24bpp; break; 2340 case 32:depth = RS32bpp; break; 2341 default: 2342 printk(KERN_ERR "matroxfb: unsupported color depth\n"); 2343 } 2344 } else if (!strncmp(this_opt, "xres:", 5)) 2345 xres = simple_strtoul(this_opt+5, NULL, 0); 2346 else if (!strncmp(this_opt, "yres:", 5)) 2347 yres = simple_strtoul(this_opt+5, NULL, 0); 2348 else if (!strncmp(this_opt, "vslen:", 6)) 2349 vslen = simple_strtoul(this_opt+6, NULL, 0); 2350 else if (!strncmp(this_opt, "hslen:", 6)) 2351 hslen = simple_strtoul(this_opt+6, NULL, 0); 2352 else if (!strncmp(this_opt, "left:", 5)) 2353 left = simple_strtoul(this_opt+5, NULL, 0); 2354 else if (!strncmp(this_opt, "right:", 6)) 2355 right = simple_strtoul(this_opt+6, NULL, 0); 2356 else if (!strncmp(this_opt, "upper:", 6)) 2357 upper = simple_strtoul(this_opt+6, NULL, 0); 2358 else if (!strncmp(this_opt, "lower:", 6)) 2359 lower = simple_strtoul(this_opt+6, NULL, 0); 2360 else if (!strncmp(this_opt, "pixclock:", 9)) 2361 pixclock = simple_strtoul(this_opt+9, NULL, 0); 2362 else if (!strncmp(this_opt, "sync:", 5)) 2363 sync = simple_strtoul(this_opt+5, NULL, 0); 2364 else if (!strncmp(this_opt, "vesa:", 5)) 2365 vesa = simple_strtoul(this_opt+5, NULL, 0); 2366 else if (!strncmp(this_opt, "maxclk:", 7)) 2367 maxclk = simple_strtoul(this_opt+7, NULL, 0); 2368 else if (!strncmp(this_opt, "fh:", 3)) 2369 fh = simple_strtoul(this_opt+3, NULL, 0); 2370 else if (!strncmp(this_opt, "fv:", 3)) 2371 fv = simple_strtoul(this_opt+3, NULL, 0); 2372 else if (!strncmp(this_opt, "mem:", 4)) 2373 mem = simple_strtoul(this_opt+4, NULL, 0); 2374 else if (!strncmp(this_opt, "mode:", 5)) 2375 strscpy(videomode, this_opt + 5, sizeof(videomode)); 2376 else if (!strncmp(this_opt, "outputs:", 8)) 2377 strscpy(outputs, this_opt + 8, sizeof(outputs)); 2378 else if (!strncmp(this_opt, "dfp:", 4)) { 2379 dfp_type = simple_strtoul(this_opt+4, NULL, 0); 2380 dfp = 1; 2381 } 2382 #ifdef CONFIG_PPC_PMAC 2383 else if (!strncmp(this_opt, "vmode:", 6)) { 2384 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0); 2385 if (vmode > 0 && vmode <= VMODE_MAX) 2386 default_vmode = vmode; 2387 } else if (!strncmp(this_opt, "cmode:", 6)) { 2388 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0); 2389 switch (cmode) { 2390 case 0: 2391 case 8: 2392 default_cmode = CMODE_8; 2393 break; 2394 case 15: 2395 case 16: 2396 default_cmode = CMODE_16; 2397 break; 2398 case 24: 2399 case 32: 2400 default_cmode = CMODE_32; 2401 break; 2402 } 2403 } 2404 #endif 2405 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */ 2406 disabled = 1; 2407 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */ 2408 disabled = 0; 2409 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */ 2410 sgram = 1; 2411 else if (!strcmp(this_opt, "sdram")) 2412 sgram = 0; 2413 else if (!strncmp(this_opt, "memtype:", 8)) 2414 memtype = simple_strtoul(this_opt+8, NULL, 0); 2415 else { 2416 int value = 1; 2417 2418 if (!strncmp(this_opt, "no", 2)) { 2419 value = 0; 2420 this_opt += 2; 2421 } 2422 if (! strcmp(this_opt, "inverse")) 2423 inverse = value; 2424 else if (!strcmp(this_opt, "accel")) 2425 noaccel = !value; 2426 else if (!strcmp(this_opt, "pan")) 2427 nopan = !value; 2428 else if (!strcmp(this_opt, "pciretry")) 2429 no_pci_retry = !value; 2430 else if (!strcmp(this_opt, "vga")) 2431 novga = !value; 2432 else if (!strcmp(this_opt, "bios")) 2433 nobios = !value; 2434 else if (!strcmp(this_opt, "init")) 2435 noinit = !value; 2436 else if (!strcmp(this_opt, "mtrr")) 2437 mtrr = value; 2438 else if (!strcmp(this_opt, "inv24")) 2439 inv24 = value; 2440 else if (!strcmp(this_opt, "cross4MB")) 2441 cross4MB = value; 2442 else if (!strcmp(this_opt, "grayscale")) 2443 grayscale = value; 2444 else if (!strcmp(this_opt, "dfp")) 2445 dfp = value; 2446 else { 2447 strscpy(videomode, this_opt, sizeof(videomode)); 2448 } 2449 } 2450 } 2451 return 0; 2452 } 2453 2454 static int __initdata initialized = 0; 2455 2456 static int __init matroxfb_init(void) 2457 { 2458 char *option = NULL; 2459 int err = 0; 2460 2461 DBG(__func__) 2462 2463 if (fb_get_options("matroxfb", &option)) 2464 return -ENODEV; 2465 matroxfb_setup(option); 2466 2467 if (disabled) 2468 return -ENXIO; 2469 if (!initialized) { 2470 initialized = 1; 2471 err = matrox_init(); 2472 } 2473 hotplug = 1; 2474 /* never return failure, user can hotplug matrox later... */ 2475 return err; 2476 } 2477 2478 #else 2479 2480 /* *************************** init module code **************************** */ 2481 2482 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>"); 2483 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550"); 2484 MODULE_LICENSE("GPL"); 2485 2486 module_param(mem, int, 0); 2487 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)"); 2488 module_param(disabled, int, 0); 2489 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)"); 2490 module_param(noaccel, int, 0); 2491 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)"); 2492 module_param(nopan, int, 0); 2493 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)"); 2494 module_param(no_pci_retry, int, 0); 2495 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)"); 2496 module_param(novga, int, 0); 2497 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)"); 2498 module_param(nobios, int, 0); 2499 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)"); 2500 module_param(noinit, int, 0); 2501 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)"); 2502 module_param(memtype, int, 0); 2503 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.rst for explanation) (default=3 for G200, 0 for G400)"); 2504 module_param(mtrr, int, 0); 2505 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)"); 2506 module_param(sgram, int, 0); 2507 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)"); 2508 module_param(inv24, int, 0); 2509 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)"); 2510 module_param(inverse, int, 0); 2511 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)"); 2512 module_param(dev, int, 0); 2513 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)"); 2514 module_param(vesa, int, 0); 2515 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)"); 2516 module_param(xres, int, 0); 2517 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)"); 2518 module_param(yres, int, 0); 2519 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)"); 2520 module_param(upper, int, 0); 2521 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)"); 2522 module_param(lower, int, 0); 2523 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)"); 2524 module_param(vslen, int, 0); 2525 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)"); 2526 module_param(left, int, 0); 2527 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)"); 2528 module_param(right, int, 0); 2529 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)"); 2530 module_param(hslen, int, 0); 2531 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)"); 2532 module_param(pixclock, int, 0); 2533 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)"); 2534 module_param(sync, int, 0); 2535 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)"); 2536 module_param(depth, int, 0); 2537 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)"); 2538 module_param(maxclk, int, 0); 2539 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz"); 2540 module_param(fh, int, 0); 2541 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz"); 2542 module_param(fv, int, 0); 2543 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n" 2544 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\""); 2545 module_param(grayscale, int, 0); 2546 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)"); 2547 module_param(cross4MB, int, 0); 2548 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)"); 2549 module_param(dfp, int, 0); 2550 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)"); 2551 module_param(dfp_type, int, 0); 2552 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)"); 2553 module_param_string(outputs, outputs, sizeof(outputs), 0); 2554 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)"); 2555 #ifdef CONFIG_PPC_PMAC 2556 module_param_named(vmode, default_vmode, int, 0); 2557 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)"); 2558 module_param_named(cmode, default_cmode, int, 0); 2559 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)"); 2560 #endif 2561 2562 static int __init matroxfb_init(void){ 2563 2564 DBG(__func__) 2565 2566 if (disabled) 2567 return -ENXIO; 2568 2569 if (depth == 0) 2570 depth = RSText; 2571 else if (depth == 4) 2572 depth = RS4bpp; 2573 else if (depth == 8) 2574 depth = RS8bpp; 2575 else if (depth == 15) 2576 depth = RS15bpp; 2577 else if (depth == 16) 2578 depth = RS16bpp; 2579 else if (depth == 24) 2580 depth = RS24bpp; 2581 else if (depth == 32) 2582 depth = RS32bpp; 2583 else if (depth != -1) { 2584 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth); 2585 depth = -1; 2586 } 2587 matrox_init(); 2588 /* never return failure; user can hotplug matrox later... */ 2589 return 0; 2590 } 2591 #endif /* MODULE */ 2592 2593 module_init(matroxfb_init); 2594 module_exit(matrox_done); 2595 EXPORT_SYMBOL(matroxfb_register_driver); 2596 EXPORT_SYMBOL(matroxfb_unregister_driver); 2597 EXPORT_SYMBOL(matroxfb_wait_for_sync); 2598 EXPORT_SYMBOL(matroxfb_enable_irq); 2599