xref: /linux/drivers/video/fbdev/geode/gxfb_core.c (revision dd5b2498d845f925904cb2afabb6ba11bfc317c5)
1 /*
2  * Geode GX framebuffer driver.
3  *
4  *   Copyright (C) 2006 Arcom Control Systems Ltd.
5  *
6  *   This program is free software; you can redistribute it and/or modify it
7  *   under the terms of the GNU General Public License as published by the
8  *   Free Software Foundation; either version 2 of the License, or (at your
9  *   option) any later version.
10  *
11  *
12  * This driver assumes that the BIOS has created a virtual PCI device header
13  * for the video device. The PCI header is assumed to contain the following
14  * BARs:
15  *
16  *    BAR0 - framebuffer memory
17  *    BAR1 - graphics processor registers
18  *    BAR2 - display controller registers
19  *    BAR3 - video processor and flat panel control registers.
20  *
21  * 16 MiB of framebuffer memory is assumed to be available.
22  */
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/delay.h>
29 #include <linux/fb.h>
30 #include <linux/console.h>
31 #include <linux/suspend.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/cs5535.h>
35 
36 #include <asm/olpc.h>
37 
38 #include "gxfb.h"
39 
40 static char *mode_option;
41 static int vram;
42 static int vt_switch;
43 
44 /* Modes relevant to the GX (taken from modedb.c) */
45 static struct fb_videomode gx_modedb[] = {
46 	/* 640x480-60 VESA */
47 	{ NULL, 60, 640, 480, 39682,  48, 16, 33, 10, 96, 2,
48 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
49 	/* 640x480-75 VESA */
50 	{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
51 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
52 	/* 640x480-85 VESA */
53 	{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
54 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
55 	/* 800x600-60 VESA */
56 	{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
57 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
58 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
59 	/* 800x600-75 VESA */
60 	{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
61 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
62 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
63 	/* 800x600-85 VESA */
64 	{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
65 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
66 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
67 	/* 1024x768-60 VESA */
68 	{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
69 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
70 	/* 1024x768-75 VESA */
71 	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
72 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
73 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
74 	/* 1024x768-85 VESA */
75 	{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
76 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
77 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
78 	/* 1280x960-60 VESA */
79 	{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
80 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
81 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
82 	/* 1280x960-85 VESA */
83 	{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
84 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
85 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
86 	/* 1280x1024-60 VESA */
87 	{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
88 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
89 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
90 	/* 1280x1024-75 VESA */
91 	{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
92 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
93 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
94 	/* 1280x1024-85 VESA */
95 	{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
96 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
97 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
98 	/* 1600x1200-60 VESA */
99 	{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
100 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
101 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
102 	/* 1600x1200-75 VESA */
103 	{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
104 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
105 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
106 	/* 1600x1200-85 VESA */
107 	{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
108 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
109 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
110 };
111 
112 static struct fb_videomode gx_dcon_modedb[] = {
113 	/* The only mode the DCON has is 1200x900 */
114 	{ NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
115 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
116 	  FB_VMODE_NONINTERLACED, 0 }
117 };
118 
119 static void get_modedb(struct fb_videomode **modedb, unsigned int *size)
120 {
121 	if (olpc_has_dcon()) {
122 		*modedb = (struct fb_videomode *) gx_dcon_modedb;
123 		*size = ARRAY_SIZE(gx_dcon_modedb);
124 	} else {
125 		*modedb = (struct fb_videomode *) gx_modedb;
126 		*size = ARRAY_SIZE(gx_modedb);
127 	}
128 }
129 
130 static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
131 {
132 	if (var->xres > 1600 || var->yres > 1200)
133 		return -EINVAL;
134 	if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
135 		return -EINVAL;
136 
137 	if (var->bits_per_pixel == 32) {
138 		var->red.offset   = 16; var->red.length   = 8;
139 		var->green.offset =  8; var->green.length = 8;
140 		var->blue.offset  =  0; var->blue.length  = 8;
141 	} else if (var->bits_per_pixel == 16) {
142 		var->red.offset   = 11; var->red.length   = 5;
143 		var->green.offset =  5; var->green.length = 6;
144 		var->blue.offset  =  0; var->blue.length  = 5;
145 	} else if (var->bits_per_pixel == 8) {
146 		var->red.offset   = 0; var->red.length   = 8;
147 		var->green.offset = 0; var->green.length = 8;
148 		var->blue.offset  = 0; var->blue.length  = 8;
149 	} else
150 		return -EINVAL;
151 	var->transp.offset = 0; var->transp.length = 0;
152 
153 	/* Enough video memory? */
154 	if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
155 		return -EINVAL;
156 
157 	/* FIXME: Check timing parameters here? */
158 
159 	return 0;
160 }
161 
162 static int gxfb_set_par(struct fb_info *info)
163 {
164 	if (info->var.bits_per_pixel > 8)
165 		info->fix.visual = FB_VISUAL_TRUECOLOR;
166 	else
167 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
168 
169 	info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
170 
171 	gx_set_mode(info);
172 
173 	return 0;
174 }
175 
176 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
177 {
178 	chan &= 0xffff;
179 	chan >>= 16 - bf->length;
180 	return chan << bf->offset;
181 }
182 
183 static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
184 			   unsigned blue, unsigned transp,
185 			   struct fb_info *info)
186 {
187 	if (info->var.grayscale) {
188 		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
189 		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
190 	}
191 
192 	/* Truecolor has hardware independent palette */
193 	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
194 		u32 *pal = info->pseudo_palette;
195 		u32 v;
196 
197 		if (regno >= 16)
198 			return -EINVAL;
199 
200 		v  = chan_to_field(red, &info->var.red);
201 		v |= chan_to_field(green, &info->var.green);
202 		v |= chan_to_field(blue, &info->var.blue);
203 
204 		pal[regno] = v;
205 	} else {
206 		if (regno >= 256)
207 			return -EINVAL;
208 
209 		gx_set_hw_palette_reg(info, regno, red, green, blue);
210 	}
211 
212 	return 0;
213 }
214 
215 static int gxfb_blank(int blank_mode, struct fb_info *info)
216 {
217 	return gx_blank_display(info, blank_mode);
218 }
219 
220 static int gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
221 {
222 	struct gxfb_par *par = info->par;
223 	int ret;
224 
225 	ret = pci_enable_device(dev);
226 	if (ret < 0)
227 		return ret;
228 
229 	ret = pci_request_region(dev, 3, "gxfb (video processor)");
230 	if (ret < 0)
231 		return ret;
232 	par->vid_regs = pci_ioremap_bar(dev, 3);
233 	if (!par->vid_regs)
234 		return -ENOMEM;
235 
236 	ret = pci_request_region(dev, 2, "gxfb (display controller)");
237 	if (ret < 0)
238 		return ret;
239 	par->dc_regs = pci_ioremap_bar(dev, 2);
240 	if (!par->dc_regs)
241 		return -ENOMEM;
242 
243 	ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
244 	if (ret < 0)
245 		return ret;
246 	par->gp_regs = pci_ioremap_bar(dev, 1);
247 
248 	if (!par->gp_regs)
249 		return -ENOMEM;
250 
251 	ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
252 	if (ret < 0)
253 		return ret;
254 
255 	info->fix.smem_start = pci_resource_start(dev, 0);
256 	info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
257 	info->screen_base = ioremap_wc(info->fix.smem_start,
258 				       info->fix.smem_len);
259 	if (!info->screen_base)
260 		return -ENOMEM;
261 
262 	/* Set the 16MiB aligned base address of the graphics memory region
263 	 * in the display controller */
264 
265 	write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
266 
267 	dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
268 		 info->fix.smem_len / 1024, info->fix.smem_start);
269 
270 	return 0;
271 }
272 
273 static struct fb_ops gxfb_ops = {
274 	.owner		= THIS_MODULE,
275 	.fb_check_var	= gxfb_check_var,
276 	.fb_set_par	= gxfb_set_par,
277 	.fb_setcolreg	= gxfb_setcolreg,
278 	.fb_blank       = gxfb_blank,
279 	/* No HW acceleration for now. */
280 	.fb_fillrect	= cfb_fillrect,
281 	.fb_copyarea	= cfb_copyarea,
282 	.fb_imageblit	= cfb_imageblit,
283 };
284 
285 static struct fb_info *gxfb_init_fbinfo(struct device *dev)
286 {
287 	struct gxfb_par *par;
288 	struct fb_info *info;
289 
290 	/* Alloc enough space for the pseudo palette. */
291 	info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
292 			dev);
293 	if (!info)
294 		return NULL;
295 
296 	par = info->par;
297 
298 	strcpy(info->fix.id, "Geode GX");
299 
300 	info->fix.type		= FB_TYPE_PACKED_PIXELS;
301 	info->fix.type_aux	= 0;
302 	info->fix.xpanstep	= 0;
303 	info->fix.ypanstep	= 0;
304 	info->fix.ywrapstep	= 0;
305 	info->fix.accel		= FB_ACCEL_NONE;
306 
307 	info->var.nonstd	= 0;
308 	info->var.activate	= FB_ACTIVATE_NOW;
309 	info->var.height	= -1;
310 	info->var.width	= -1;
311 	info->var.accel_flags = 0;
312 	info->var.vmode	= FB_VMODE_NONINTERLACED;
313 
314 	info->fbops		= &gxfb_ops;
315 	info->flags		= FBINFO_DEFAULT;
316 	info->node		= -1;
317 
318 	info->pseudo_palette	= (void *)par + sizeof(struct gxfb_par);
319 
320 	info->var.grayscale	= 0;
321 
322 	if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
323 		framebuffer_release(info);
324 		return NULL;
325 	}
326 
327 	return info;
328 }
329 
330 #ifdef CONFIG_PM
331 static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
332 {
333 	struct fb_info *info = pci_get_drvdata(pdev);
334 
335 	if (state.event == PM_EVENT_SUSPEND) {
336 		console_lock();
337 		gx_powerdown(info);
338 		fb_set_suspend(info, 1);
339 		console_unlock();
340 	}
341 
342 	/* there's no point in setting PCI states; we emulate PCI, so
343 	 * we don't end up getting power savings anyways */
344 
345 	return 0;
346 }
347 
348 static int gxfb_resume(struct pci_dev *pdev)
349 {
350 	struct fb_info *info = pci_get_drvdata(pdev);
351 	int ret;
352 
353 	console_lock();
354 	ret = gx_powerup(info);
355 	if (ret) {
356 		printk(KERN_ERR "gxfb:  power up failed!\n");
357 		return ret;
358 	}
359 
360 	fb_set_suspend(info, 0);
361 	console_unlock();
362 	return 0;
363 }
364 #endif
365 
366 static int gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
367 {
368 	struct gxfb_par *par;
369 	struct fb_info *info;
370 	int ret;
371 	unsigned long val;
372 
373 	struct fb_videomode *modedb_ptr;
374 	unsigned int modedb_size;
375 
376 	info = gxfb_init_fbinfo(&pdev->dev);
377 	if (!info)
378 		return -ENOMEM;
379 	par = info->par;
380 
381 	if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
382 		dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
383 		goto err;
384 	}
385 
386 	/* Figure out if this is a TFT or CRT part */
387 
388 	rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
389 
390 	if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
391 		par->enable_crt = 0;
392 	else
393 		par->enable_crt = 1;
394 
395 	get_modedb(&modedb_ptr, &modedb_size);
396 	ret = fb_find_mode(&info->var, info, mode_option,
397 			   modedb_ptr, modedb_size, NULL, 16);
398 	if (ret == 0 || ret == 4) {
399 		dev_err(&pdev->dev, "could not find valid video mode\n");
400 		ret = -EINVAL;
401 		goto err;
402 	}
403 
404 
405 	/* Clear the frame buffer of garbage. */
406         memset_io(info->screen_base, 0, info->fix.smem_len);
407 
408 	gxfb_check_var(&info->var, info);
409 	gxfb_set_par(info);
410 
411 	pm_set_vt_switch(vt_switch);
412 
413 	if (register_framebuffer(info) < 0) {
414 		ret = -EINVAL;
415 		goto err;
416 	}
417 	pci_set_drvdata(pdev, info);
418 	fb_info(info, "%s frame buffer device\n", info->fix.id);
419 	return 0;
420 
421   err:
422 	if (info->screen_base) {
423 		iounmap(info->screen_base);
424 		pci_release_region(pdev, 0);
425 	}
426 	if (par->vid_regs) {
427 		iounmap(par->vid_regs);
428 		pci_release_region(pdev, 3);
429 	}
430 	if (par->dc_regs) {
431 		iounmap(par->dc_regs);
432 		pci_release_region(pdev, 2);
433 	}
434 	if (par->gp_regs) {
435 		iounmap(par->gp_regs);
436 		pci_release_region(pdev, 1);
437 	}
438 
439 	fb_dealloc_cmap(&info->cmap);
440 	framebuffer_release(info);
441 	return ret;
442 }
443 
444 static void gxfb_remove(struct pci_dev *pdev)
445 {
446 	struct fb_info *info = pci_get_drvdata(pdev);
447 	struct gxfb_par *par = info->par;
448 
449 	unregister_framebuffer(info);
450 
451 	iounmap((void __iomem *)info->screen_base);
452 	pci_release_region(pdev, 0);
453 
454 	iounmap(par->vid_regs);
455 	pci_release_region(pdev, 3);
456 
457 	iounmap(par->dc_regs);
458 	pci_release_region(pdev, 2);
459 
460 	iounmap(par->gp_regs);
461 	pci_release_region(pdev, 1);
462 
463 	fb_dealloc_cmap(&info->cmap);
464 
465 	framebuffer_release(info);
466 }
467 
468 static const struct pci_device_id gxfb_id_table[] = {
469 	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
470 	{ 0, }
471 };
472 
473 MODULE_DEVICE_TABLE(pci, gxfb_id_table);
474 
475 static struct pci_driver gxfb_driver = {
476 	.name		= "gxfb",
477 	.id_table	= gxfb_id_table,
478 	.probe		= gxfb_probe,
479 	.remove		= gxfb_remove,
480 #ifdef CONFIG_PM
481 	.suspend	= gxfb_suspend,
482 	.resume		= gxfb_resume,
483 #endif
484 };
485 
486 #ifndef MODULE
487 static int __init gxfb_setup(char *options)
488 {
489 
490 	char *opt;
491 
492 	if (!options || !*options)
493 		return 0;
494 
495 	while ((opt = strsep(&options, ",")) != NULL) {
496 		if (!*opt)
497 			continue;
498 
499 		mode_option = opt;
500 	}
501 
502 	return 0;
503 }
504 #endif
505 
506 static int __init gxfb_init(void)
507 {
508 #ifndef MODULE
509 	char *option = NULL;
510 
511 	if (fb_get_options("gxfb", &option))
512 		return -ENODEV;
513 
514 	gxfb_setup(option);
515 #endif
516 	return pci_register_driver(&gxfb_driver);
517 }
518 
519 static void __exit gxfb_cleanup(void)
520 {
521 	pci_unregister_driver(&gxfb_driver);
522 }
523 
524 module_init(gxfb_init);
525 module_exit(gxfb_cleanup);
526 
527 module_param(mode_option, charp, 0);
528 MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
529 
530 module_param(vram, int, 0);
531 MODULE_PARM_DESC(vram, "video memory size");
532 
533 module_param(vt_switch, int, 0);
534 MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
535 
536 MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
537 MODULE_LICENSE("GPL");
538