xref: /linux/drivers/video/fbdev/geode/gxfb_core.c (revision 93df8a1ed6231727c5db94a80b1a6bd5ee67cec3)
1 /*
2  * Geode GX framebuffer driver.
3  *
4  *   Copyright (C) 2006 Arcom Control Systems Ltd.
5  *
6  *   This program is free software; you can redistribute it and/or modify it
7  *   under the terms of the GNU General Public License as published by the
8  *   Free Software Foundation; either version 2 of the License, or (at your
9  *   option) any later version.
10  *
11  *
12  * This driver assumes that the BIOS has created a virtual PCI device header
13  * for the video device. The PCI header is assumed to contain the following
14  * BARs:
15  *
16  *    BAR0 - framebuffer memory
17  *    BAR1 - graphics processor registers
18  *    BAR2 - display controller registers
19  *    BAR3 - video processor and flat panel control registers.
20  *
21  * 16 MiB of framebuffer memory is assumed to be available.
22  */
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/delay.h>
29 #include <linux/fb.h>
30 #include <linux/console.h>
31 #include <linux/suspend.h>
32 #include <linux/init.h>
33 #include <linux/pci.h>
34 #include <linux/cs5535.h>
35 
36 #include "gxfb.h"
37 
38 static char *mode_option;
39 static int vram;
40 static int vt_switch;
41 
42 /* Modes relevant to the GX (taken from modedb.c) */
43 static struct fb_videomode gx_modedb[] = {
44 	/* 640x480-60 VESA */
45 	{ NULL, 60, 640, 480, 39682,  48, 16, 33, 10, 96, 2,
46 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
47 	/* 640x480-75 VESA */
48 	{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
49 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
50 	/* 640x480-85 VESA */
51 	{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
52 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
53 	/* 800x600-60 VESA */
54 	{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
55 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
56 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
57 	/* 800x600-75 VESA */
58 	{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
59 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
60 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
61 	/* 800x600-85 VESA */
62 	{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
63 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
64 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
65 	/* 1024x768-60 VESA */
66 	{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
67 	  0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
68 	/* 1024x768-75 VESA */
69 	{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
70 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
71 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
72 	/* 1024x768-85 VESA */
73 	{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
74 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
75 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
76 	/* 1280x960-60 VESA */
77 	{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
78 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
79 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
80 	/* 1280x960-85 VESA */
81 	{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
82 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
83 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
84 	/* 1280x1024-60 VESA */
85 	{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
86 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
87 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
88 	/* 1280x1024-75 VESA */
89 	{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
90 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
91 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
92 	/* 1280x1024-85 VESA */
93 	{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
94 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
95 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
96 	/* 1600x1200-60 VESA */
97 	{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
98 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
99 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
100 	/* 1600x1200-75 VESA */
101 	{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
102 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
103 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
104 	/* 1600x1200-85 VESA */
105 	{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
106 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
107 	  FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
108 };
109 
110 #ifdef CONFIG_OLPC
111 #include <asm/olpc.h>
112 
113 static struct fb_videomode gx_dcon_modedb[] = {
114 	/* The only mode the DCON has is 1200x900 */
115 	{ NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
116 	  FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
117 	  FB_VMODE_NONINTERLACED, 0 }
118 };
119 
120 static void get_modedb(struct fb_videomode **modedb, unsigned int *size)
121 {
122 	if (olpc_has_dcon()) {
123 		*modedb = (struct fb_videomode *) gx_dcon_modedb;
124 		*size = ARRAY_SIZE(gx_dcon_modedb);
125 	} else {
126 		*modedb = (struct fb_videomode *) gx_modedb;
127 		*size = ARRAY_SIZE(gx_modedb);
128 	}
129 }
130 
131 #else
132 static void get_modedb(struct fb_videomode **modedb, unsigned int *size)
133 {
134 	*modedb = (struct fb_videomode *) gx_modedb;
135 	*size = ARRAY_SIZE(gx_modedb);
136 }
137 #endif
138 
139 static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
140 {
141 	if (var->xres > 1600 || var->yres > 1200)
142 		return -EINVAL;
143 	if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
144 		return -EINVAL;
145 
146 	if (var->bits_per_pixel == 32) {
147 		var->red.offset   = 16; var->red.length   = 8;
148 		var->green.offset =  8; var->green.length = 8;
149 		var->blue.offset  =  0; var->blue.length  = 8;
150 	} else if (var->bits_per_pixel == 16) {
151 		var->red.offset   = 11; var->red.length   = 5;
152 		var->green.offset =  5; var->green.length = 6;
153 		var->blue.offset  =  0; var->blue.length  = 5;
154 	} else if (var->bits_per_pixel == 8) {
155 		var->red.offset   = 0; var->red.length   = 8;
156 		var->green.offset = 0; var->green.length = 8;
157 		var->blue.offset  = 0; var->blue.length  = 8;
158 	} else
159 		return -EINVAL;
160 	var->transp.offset = 0; var->transp.length = 0;
161 
162 	/* Enough video memory? */
163 	if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
164 		return -EINVAL;
165 
166 	/* FIXME: Check timing parameters here? */
167 
168 	return 0;
169 }
170 
171 static int gxfb_set_par(struct fb_info *info)
172 {
173 	if (info->var.bits_per_pixel > 8)
174 		info->fix.visual = FB_VISUAL_TRUECOLOR;
175 	else
176 		info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
177 
178 	info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
179 
180 	gx_set_mode(info);
181 
182 	return 0;
183 }
184 
185 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
186 {
187 	chan &= 0xffff;
188 	chan >>= 16 - bf->length;
189 	return chan << bf->offset;
190 }
191 
192 static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
193 			   unsigned blue, unsigned transp,
194 			   struct fb_info *info)
195 {
196 	if (info->var.grayscale) {
197 		/* grayscale = 0.30*R + 0.59*G + 0.11*B */
198 		red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
199 	}
200 
201 	/* Truecolor has hardware independent palette */
202 	if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
203 		u32 *pal = info->pseudo_palette;
204 		u32 v;
205 
206 		if (regno >= 16)
207 			return -EINVAL;
208 
209 		v  = chan_to_field(red, &info->var.red);
210 		v |= chan_to_field(green, &info->var.green);
211 		v |= chan_to_field(blue, &info->var.blue);
212 
213 		pal[regno] = v;
214 	} else {
215 		if (regno >= 256)
216 			return -EINVAL;
217 
218 		gx_set_hw_palette_reg(info, regno, red, green, blue);
219 	}
220 
221 	return 0;
222 }
223 
224 static int gxfb_blank(int blank_mode, struct fb_info *info)
225 {
226 	return gx_blank_display(info, blank_mode);
227 }
228 
229 static int gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
230 {
231 	struct gxfb_par *par = info->par;
232 	int ret;
233 
234 	ret = pci_enable_device(dev);
235 	if (ret < 0)
236 		return ret;
237 
238 	ret = pci_request_region(dev, 3, "gxfb (video processor)");
239 	if (ret < 0)
240 		return ret;
241 	par->vid_regs = pci_ioremap_bar(dev, 3);
242 	if (!par->vid_regs)
243 		return -ENOMEM;
244 
245 	ret = pci_request_region(dev, 2, "gxfb (display controller)");
246 	if (ret < 0)
247 		return ret;
248 	par->dc_regs = pci_ioremap_bar(dev, 2);
249 	if (!par->dc_regs)
250 		return -ENOMEM;
251 
252 	ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
253 	if (ret < 0)
254 		return ret;
255 	par->gp_regs = pci_ioremap_bar(dev, 1);
256 
257 	if (!par->gp_regs)
258 		return -ENOMEM;
259 
260 	ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
261 	if (ret < 0)
262 		return ret;
263 
264 	info->fix.smem_start = pci_resource_start(dev, 0);
265 	info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
266 	info->screen_base = ioremap_wc(info->fix.smem_start,
267 				       info->fix.smem_len);
268 	if (!info->screen_base)
269 		return -ENOMEM;
270 
271 	/* Set the 16MiB aligned base address of the graphics memory region
272 	 * in the display controller */
273 
274 	write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
275 
276 	dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
277 		 info->fix.smem_len / 1024, info->fix.smem_start);
278 
279 	return 0;
280 }
281 
282 static struct fb_ops gxfb_ops = {
283 	.owner		= THIS_MODULE,
284 	.fb_check_var	= gxfb_check_var,
285 	.fb_set_par	= gxfb_set_par,
286 	.fb_setcolreg	= gxfb_setcolreg,
287 	.fb_blank       = gxfb_blank,
288 	/* No HW acceleration for now. */
289 	.fb_fillrect	= cfb_fillrect,
290 	.fb_copyarea	= cfb_copyarea,
291 	.fb_imageblit	= cfb_imageblit,
292 };
293 
294 static struct fb_info *gxfb_init_fbinfo(struct device *dev)
295 {
296 	struct gxfb_par *par;
297 	struct fb_info *info;
298 
299 	/* Alloc enough space for the pseudo palette. */
300 	info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
301 			dev);
302 	if (!info)
303 		return NULL;
304 
305 	par = info->par;
306 
307 	strcpy(info->fix.id, "Geode GX");
308 
309 	info->fix.type		= FB_TYPE_PACKED_PIXELS;
310 	info->fix.type_aux	= 0;
311 	info->fix.xpanstep	= 0;
312 	info->fix.ypanstep	= 0;
313 	info->fix.ywrapstep	= 0;
314 	info->fix.accel		= FB_ACCEL_NONE;
315 
316 	info->var.nonstd	= 0;
317 	info->var.activate	= FB_ACTIVATE_NOW;
318 	info->var.height	= -1;
319 	info->var.width	= -1;
320 	info->var.accel_flags = 0;
321 	info->var.vmode	= FB_VMODE_NONINTERLACED;
322 
323 	info->fbops		= &gxfb_ops;
324 	info->flags		= FBINFO_DEFAULT;
325 	info->node		= -1;
326 
327 	info->pseudo_palette	= (void *)par + sizeof(struct gxfb_par);
328 
329 	info->var.grayscale	= 0;
330 
331 	if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
332 		framebuffer_release(info);
333 		return NULL;
334 	}
335 
336 	return info;
337 }
338 
339 #ifdef CONFIG_PM
340 static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
341 {
342 	struct fb_info *info = pci_get_drvdata(pdev);
343 
344 	if (state.event == PM_EVENT_SUSPEND) {
345 		console_lock();
346 		gx_powerdown(info);
347 		fb_set_suspend(info, 1);
348 		console_unlock();
349 	}
350 
351 	/* there's no point in setting PCI states; we emulate PCI, so
352 	 * we don't end up getting power savings anyways */
353 
354 	return 0;
355 }
356 
357 static int gxfb_resume(struct pci_dev *pdev)
358 {
359 	struct fb_info *info = pci_get_drvdata(pdev);
360 	int ret;
361 
362 	console_lock();
363 	ret = gx_powerup(info);
364 	if (ret) {
365 		printk(KERN_ERR "gxfb:  power up failed!\n");
366 		return ret;
367 	}
368 
369 	fb_set_suspend(info, 0);
370 	console_unlock();
371 	return 0;
372 }
373 #endif
374 
375 static int gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
376 {
377 	struct gxfb_par *par;
378 	struct fb_info *info;
379 	int ret;
380 	unsigned long val;
381 
382 	struct fb_videomode *modedb_ptr;
383 	unsigned int modedb_size;
384 
385 	info = gxfb_init_fbinfo(&pdev->dev);
386 	if (!info)
387 		return -ENOMEM;
388 	par = info->par;
389 
390 	if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
391 		dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
392 		goto err;
393 	}
394 
395 	/* Figure out if this is a TFT or CRT part */
396 
397 	rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
398 
399 	if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
400 		par->enable_crt = 0;
401 	else
402 		par->enable_crt = 1;
403 
404 	get_modedb(&modedb_ptr, &modedb_size);
405 	ret = fb_find_mode(&info->var, info, mode_option,
406 			   modedb_ptr, modedb_size, NULL, 16);
407 	if (ret == 0 || ret == 4) {
408 		dev_err(&pdev->dev, "could not find valid video mode\n");
409 		ret = -EINVAL;
410 		goto err;
411 	}
412 
413 
414 	/* Clear the frame buffer of garbage. */
415         memset_io(info->screen_base, 0, info->fix.smem_len);
416 
417 	gxfb_check_var(&info->var, info);
418 	gxfb_set_par(info);
419 
420 	pm_set_vt_switch(vt_switch);
421 
422 	if (register_framebuffer(info) < 0) {
423 		ret = -EINVAL;
424 		goto err;
425 	}
426 	pci_set_drvdata(pdev, info);
427 	fb_info(info, "%s frame buffer device\n", info->fix.id);
428 	return 0;
429 
430   err:
431 	if (info->screen_base) {
432 		iounmap(info->screen_base);
433 		pci_release_region(pdev, 0);
434 	}
435 	if (par->vid_regs) {
436 		iounmap(par->vid_regs);
437 		pci_release_region(pdev, 3);
438 	}
439 	if (par->dc_regs) {
440 		iounmap(par->dc_regs);
441 		pci_release_region(pdev, 2);
442 	}
443 	if (par->gp_regs) {
444 		iounmap(par->gp_regs);
445 		pci_release_region(pdev, 1);
446 	}
447 
448 	fb_dealloc_cmap(&info->cmap);
449 	framebuffer_release(info);
450 	return ret;
451 }
452 
453 static void gxfb_remove(struct pci_dev *pdev)
454 {
455 	struct fb_info *info = pci_get_drvdata(pdev);
456 	struct gxfb_par *par = info->par;
457 
458 	unregister_framebuffer(info);
459 
460 	iounmap((void __iomem *)info->screen_base);
461 	pci_release_region(pdev, 0);
462 
463 	iounmap(par->vid_regs);
464 	pci_release_region(pdev, 3);
465 
466 	iounmap(par->dc_regs);
467 	pci_release_region(pdev, 2);
468 
469 	iounmap(par->gp_regs);
470 	pci_release_region(pdev, 1);
471 
472 	fb_dealloc_cmap(&info->cmap);
473 
474 	framebuffer_release(info);
475 }
476 
477 static struct pci_device_id gxfb_id_table[] = {
478 	{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
479 	{ 0, }
480 };
481 
482 MODULE_DEVICE_TABLE(pci, gxfb_id_table);
483 
484 static struct pci_driver gxfb_driver = {
485 	.name		= "gxfb",
486 	.id_table	= gxfb_id_table,
487 	.probe		= gxfb_probe,
488 	.remove		= gxfb_remove,
489 #ifdef CONFIG_PM
490 	.suspend	= gxfb_suspend,
491 	.resume		= gxfb_resume,
492 #endif
493 };
494 
495 #ifndef MODULE
496 static int __init gxfb_setup(char *options)
497 {
498 
499 	char *opt;
500 
501 	if (!options || !*options)
502 		return 0;
503 
504 	while ((opt = strsep(&options, ",")) != NULL) {
505 		if (!*opt)
506 			continue;
507 
508 		mode_option = opt;
509 	}
510 
511 	return 0;
512 }
513 #endif
514 
515 static int __init gxfb_init(void)
516 {
517 #ifndef MODULE
518 	char *option = NULL;
519 
520 	if (fb_get_options("gxfb", &option))
521 		return -ENODEV;
522 
523 	gxfb_setup(option);
524 #endif
525 	return pci_register_driver(&gxfb_driver);
526 }
527 
528 static void __exit gxfb_cleanup(void)
529 {
530 	pci_unregister_driver(&gxfb_driver);
531 }
532 
533 module_init(gxfb_init);
534 module_exit(gxfb_cleanup);
535 
536 module_param(mode_option, charp, 0);
537 MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
538 
539 module_param(vram, int, 0);
540 MODULE_PARM_DESC(vram, "video memory size");
541 
542 module_param(vt_switch, int, 0);
543 MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
544 
545 MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
546 MODULE_LICENSE("GPL");
547