xref: /linux/drivers/video/fbdev/dnfb.c (revision 0ea5c948cb64bab5bc7a5516774eb8536f05aa0d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 #include <linux/kernel.h>
3 #include <linux/errno.h>
4 #include <linux/string.h>
5 #include <linux/mm.h>
6 #include <linux/delay.h>
7 #include <linux/interrupt.h>
8 #include <linux/platform_device.h>
9 
10 #include <asm/setup.h>
11 #include <asm/irq.h>
12 #include <asm/amigahw.h>
13 #include <asm/amigaints.h>
14 #include <asm/apollohw.h>
15 #include <linux/fb.h>
16 #include <linux/module.h>
17 
18 /* apollo video HW definitions */
19 
20 /*
21  * Control Registers.   IOBASE + $x
22  *
23  * Note: these are the Memory/IO BASE definitions for a mono card set to the
24  * alternate address
25  *
26  * Control 3A and 3B serve identical functions except that 3A
27  * deals with control 1 and 3b deals with Color LUT reg.
28  */
29 
30 #define AP_IOBASE       0x3b0	/* Base address of 1 plane board. */
31 #define AP_STATUS       isaIO2mem(AP_IOBASE+0)	/* Status register.  Read */
32 #define AP_WRITE_ENABLE isaIO2mem(AP_IOBASE+0)	/* Write Enable Register Write */
33 #define AP_DEVICE_ID    isaIO2mem(AP_IOBASE+1)	/* Device ID Register. Read */
34 #define AP_ROP_1        isaIO2mem(AP_IOBASE+2)	/* Raster Operation reg. Write Word */
35 #define AP_DIAG_MEM_REQ isaIO2mem(AP_IOBASE+4)	/* Diagnostic Memory Request. Write Word */
36 #define AP_CONTROL_0    isaIO2mem(AP_IOBASE+8)	/* Control Register 0.  Read/Write */
37 #define AP_CONTROL_1    isaIO2mem(AP_IOBASE+0xa)	/* Control Register 1.  Read/Write */
38 #define AP_CONTROL_3A   isaIO2mem(AP_IOBASE+0xe)	/* Control Register 3a. Read/Write */
39 #define AP_CONTROL_2    isaIO2mem(AP_IOBASE+0xc)	/* Control Register 2. Read/Write */
40 
41 
42 #define FRAME_BUFFER_START 0x0FA0000
43 #define FRAME_BUFFER_LEN 0x40000
44 
45 /* CREG 0 */
46 #define VECTOR_MODE 0x40	/* 010x.xxxx */
47 #define DBLT_MODE   0x80	/* 100x.xxxx */
48 #define NORMAL_MODE 0xE0	/* 111x.xxxx */
49 #define SHIFT_BITS  0x1F	/* xxx1.1111 */
50 	/* other bits are Shift value */
51 
52 /* CREG 1 */
53 #define AD_BLT      0x80	/* 1xxx.xxxx */
54 #define NORMAL      0x80 /* 1xxx.xxxx */	/* What is happening here ?? */
55 #define INVERSE     0x00 /* 0xxx.xxxx */	/* Clearing this reverses the screen */
56 #define PIX_BLT     0x00	/* 0xxx.xxxx */
57 
58 #define AD_HIBIT        0x40	/* xIxx.xxxx */
59 
60 #define ROP_EN          0x10	/* xxx1.xxxx */
61 #define DST_EQ_SRC      0x00	/* xxx0.xxxx */
62 #define nRESET_SYNC     0x08	/* xxxx.1xxx */
63 #define SYNC_ENAB       0x02	/* xxxx.xx1x */
64 
65 #define BLANK_DISP      0x00	/* xxxx.xxx0 */
66 #define ENAB_DISP       0x01	/* xxxx.xxx1 */
67 
68 #define NORM_CREG1      (nRESET_SYNC | SYNC_ENAB | ENAB_DISP)	/* no reset sync */
69 
70 /* CREG 2 */
71 
72 /*
73  * Following 3 defines are common to 1, 4 and 8 plane.
74  */
75 
76 #define S_DATA_1s   0x00 /* 00xx.xxxx */	/* set source to all 1's -- vector drawing */
77 #define S_DATA_PIX  0x40 /* 01xx.xxxx */	/* takes source from ls-bits and replicates over 16 bits */
78 #define S_DATA_PLN  0xC0 /* 11xx.xxxx */	/* normal, each data access =16-bits in
79 						   one plane of image mem */
80 
81 /* CREG 3A/CREG 3B */
82 #       define RESET_CREG 0x80	/* 1000.0000 */
83 
84 /* ROP REG  -  all one nibble */
85 /*      ********* NOTE : this is used r0,r1,r2,r3 *********** */
86 #define ROP(r2,r3,r0,r1) ( (U_SHORT)((r0)|((r1)<<4)|((r2)<<8)|((r3)<<12)) )
87 #define DEST_ZERO               0x0
88 #define SRC_AND_DEST    0x1
89 #define SRC_AND_nDEST   0x2
90 #define SRC                             0x3
91 #define nSRC_AND_DEST   0x4
92 #define DEST                    0x5
93 #define SRC_XOR_DEST    0x6
94 #define SRC_OR_DEST             0x7
95 #define SRC_NOR_DEST    0x8
96 #define SRC_XNOR_DEST   0x9
97 #define nDEST                   0xA
98 #define SRC_OR_nDEST    0xB
99 #define nSRC                    0xC
100 #define nSRC_OR_DEST    0xD
101 #define SRC_NAND_DEST   0xE
102 #define DEST_ONE                0xF
103 
104 #define SWAP(A) ((A>>8) | ((A&0xff) <<8))
105 
106 /* frame buffer operations */
107 
108 static int dnfb_blank(int blank, struct fb_info *info);
109 static void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area);
110 
111 static const struct fb_ops dn_fb_ops = {
112 	.owner		= THIS_MODULE,
113 	__FB_DEFAULT_IOMEM_OPS_RDWR,
114 	.fb_blank	= dnfb_blank,
115 	.fb_fillrect	= cfb_fillrect,
116 	.fb_copyarea	= dnfb_copyarea,
117 	.fb_imageblit	= cfb_imageblit,
118 	__FB_DEFAULT_IOMEM_OPS_MMAP,
119 };
120 
121 static const struct fb_var_screeninfo dnfb_var = {
122 	.xres		= 1280,
123 	.yres		= 1024,
124 	.xres_virtual	= 2048,
125 	.yres_virtual	= 1024,
126 	.bits_per_pixel	= 1,
127 	.height		= -1,
128 	.width		= -1,
129 	.vmode		= FB_VMODE_NONINTERLACED,
130 };
131 
132 static const struct fb_fix_screeninfo dnfb_fix = {
133 	.id		= "Apollo Mono",
134 	.smem_start	= (FRAME_BUFFER_START + IO_BASE),
135 	.smem_len	= FRAME_BUFFER_LEN,
136 	.type		= FB_TYPE_PACKED_PIXELS,
137 	.visual		= FB_VISUAL_MONO10,
138 	.line_length	= 256,
139 };
140 
dnfb_blank(int blank,struct fb_info * info)141 static int dnfb_blank(int blank, struct fb_info *info)
142 {
143 	if (blank)
144 		out_8(AP_CONTROL_3A, 0x0);
145 	else
146 		out_8(AP_CONTROL_3A, 0x1);
147 	return 0;
148 }
149 
150 static
dnfb_copyarea(struct fb_info * info,const struct fb_copyarea * area)151 void dnfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
152 {
153 
154 	int incr, y_delta, pre_read = 0, x_end, x_word_count;
155 	uint start_mask, end_mask, dest;
156 	ushort *src, dummy;
157 	short i, j;
158 
159 	incr = (area->dy <= area->sy) ? 1 : -1;
160 
161 	src = (ushort *)(info->screen_base + area->sy * info->fix.line_length +
162 			(area->sx >> 4));
163 	dest = area->dy * (info->fix.line_length >> 1) + (area->dx >> 4);
164 
165 	if (incr > 0) {
166 		y_delta = (info->fix.line_length * 8) - area->sx - area->width;
167 		x_end = area->dx + area->width - 1;
168 		x_word_count = (x_end >> 4) - (area->dx >> 4) + 1;
169 		start_mask = 0xffff0000 >> (area->dx & 0xf);
170 		end_mask = 0x7ffff >> (x_end & 0xf);
171 		out_8(AP_CONTROL_0,
172 		     (((area->dx & 0xf) - (area->sx & 0xf)) % 16) | (0x4 << 5));
173 		if ((area->dx & 0xf) < (area->sx & 0xf))
174 			pre_read = 1;
175 	} else {
176 		y_delta = -((info->fix.line_length * 8) - area->sx - area->width);
177 		x_end = area->dx - area->width + 1;
178 		x_word_count = (area->dx >> 4) - (x_end >> 4) + 1;
179 		start_mask = 0x7ffff >> (area->dx & 0xf);
180 		end_mask = 0xffff0000 >> (x_end & 0xf);
181 		out_8(AP_CONTROL_0,
182 		     ((-((area->sx & 0xf) - (area->dx & 0xf))) % 16) |
183 		     (0x4 << 5));
184 		if ((area->dx & 0xf) > (area->sx & 0xf))
185 			pre_read = 1;
186 	}
187 
188 	for (i = 0; i < area->height; i++) {
189 
190 		out_8(AP_CONTROL_3A, 0xc | (dest >> 16));
191 
192 		if (pre_read) {
193 			dummy = *src;
194 			src += incr;
195 		}
196 
197 		if (x_word_count) {
198 			out_8(AP_WRITE_ENABLE, start_mask);
199 			*src = dest;
200 			src += incr;
201 			dest += incr;
202 			out_8(AP_WRITE_ENABLE, 0);
203 
204 			for (j = 1; j < (x_word_count - 1); j++) {
205 				*src = dest;
206 				src += incr;
207 				dest += incr;
208 			}
209 
210 			out_8(AP_WRITE_ENABLE, start_mask);
211 			*src = dest;
212 			dest += incr;
213 			src += incr;
214 		} else {
215 			out_8(AP_WRITE_ENABLE, start_mask | end_mask);
216 			*src = dest;
217 			dest += incr;
218 			src += incr;
219 		}
220 		src += (y_delta / 16);
221 		dest += (y_delta / 16);
222 	}
223 	out_8(AP_CONTROL_0, NORMAL_MODE);
224 }
225 
226 /*
227  * Initialization
228  */
229 
dnfb_probe(struct platform_device * dev)230 static int dnfb_probe(struct platform_device *dev)
231 {
232 	struct fb_info *info;
233 	int err = 0;
234 
235 	info = framebuffer_alloc(0, &dev->dev);
236 	if (!info)
237 		return -ENOMEM;
238 
239 	info->fbops = &dn_fb_ops;
240 	info->fix = dnfb_fix;
241 	info->var = dnfb_var;
242 	info->var.red.length = 1;
243 	info->var.red.offset = 0;
244 	info->var.green = info->var.blue = info->var.red;
245 	info->screen_base = (u_char *) info->fix.smem_start;
246 
247 	err = fb_alloc_cmap(&info->cmap, 2, 0);
248 	if (err < 0)
249 		goto release_framebuffer;
250 
251 	err = register_framebuffer(info);
252 	if (err < 0) {
253 		fb_dealloc_cmap(&info->cmap);
254 		goto release_framebuffer;
255 	}
256 	platform_set_drvdata(dev, info);
257 
258 	/* now we have registered we can safely setup the hardware */
259 	out_8(AP_CONTROL_3A, RESET_CREG);
260 	out_be16(AP_WRITE_ENABLE, 0x0);
261 	out_8(AP_CONTROL_0, NORMAL_MODE);
262 	out_8(AP_CONTROL_1, (AD_BLT | DST_EQ_SRC | NORM_CREG1));
263 	out_8(AP_CONTROL_2, S_DATA_PLN);
264 	out_be16(AP_ROP_1, SWAP(0x3));
265 
266 	printk("apollo frame buffer alive and kicking !\n");
267 	return err;
268 
269 release_framebuffer:
270 	framebuffer_release(info);
271 	return err;
272 }
273 
274 static struct platform_driver dnfb_driver = {
275 	.probe	= dnfb_probe,
276 	.driver	= {
277 		.name	= "dnfb",
278 	},
279 };
280 
281 static struct platform_device dnfb_device = {
282 	.name	= "dnfb",
283 };
284 
dnfb_init(void)285 static int __init dnfb_init(void)
286 {
287 	int ret;
288 
289 	if (!MACH_IS_APOLLO)
290 		return -ENODEV;
291 
292 	if (fb_get_options("dnfb", NULL))
293 		return -ENODEV;
294 
295 	ret = platform_driver_register(&dnfb_driver);
296 
297 	if (!ret) {
298 		ret = platform_device_register(&dnfb_device);
299 		if (ret)
300 			platform_driver_unregister(&dnfb_driver);
301 	}
302 	return ret;
303 }
304 
305 module_init(dnfb_init);
306 
307 MODULE_LICENSE("GPL");
308