1 // SPDX-License-Identifier: GPL-2.0-only 2 /* bw2.c: BWTWO frame buffer driver 3 * 4 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net) 5 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz) 6 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx) 7 * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 8 * 9 * Driver layout based loosely on tgafb.c, see that file for credits. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/errno.h> 15 #include <linux/string.h> 16 #include <linux/delay.h> 17 #include <linux/init.h> 18 #include <linux/fb.h> 19 #include <linux/mm.h> 20 #include <linux/of.h> 21 #include <linux/platform_device.h> 22 23 #include <asm/io.h> 24 #include <asm/fbio.h> 25 26 #include "sbuslib.h" 27 28 /* 29 * Local functions. 30 */ 31 32 static int bw2_blank(int, struct fb_info *); 33 34 static int bw2_mmap(struct fb_info *, struct vm_area_struct *); 35 static int bw2_ioctl(struct fb_info *, unsigned int, unsigned long); 36 37 /* 38 * Frame buffer operations 39 */ 40 41 static const struct fb_ops bw2_ops = { 42 .owner = THIS_MODULE, 43 .fb_blank = bw2_blank, 44 .fb_fillrect = cfb_fillrect, 45 .fb_copyarea = cfb_copyarea, 46 .fb_imageblit = cfb_imageblit, 47 .fb_mmap = bw2_mmap, 48 .fb_ioctl = bw2_ioctl, 49 #ifdef CONFIG_COMPAT 50 .fb_compat_ioctl = sbusfb_compat_ioctl, 51 #endif 52 }; 53 54 /* OBio addresses for the bwtwo registers */ 55 #define BWTWO_REGISTER_OFFSET 0x400000 56 57 struct bt_regs { 58 u32 addr; 59 u32 color_map; 60 u32 control; 61 u32 cursor; 62 }; 63 64 struct bw2_regs { 65 struct bt_regs cmap; 66 u8 control; 67 u8 status; 68 u8 cursor_start; 69 u8 cursor_end; 70 u8 h_blank_start; 71 u8 h_blank_end; 72 u8 h_sync_start; 73 u8 h_sync_end; 74 u8 comp_sync_end; 75 u8 v_blank_start_high; 76 u8 v_blank_start_low; 77 u8 v_blank_end; 78 u8 v_sync_start; 79 u8 v_sync_end; 80 u8 xfer_holdoff_start; 81 u8 xfer_holdoff_end; 82 }; 83 84 /* Status Register Constants */ 85 #define BWTWO_SR_RES_MASK 0x70 86 #define BWTWO_SR_1600_1280 0x50 87 #define BWTWO_SR_1152_900_76_A 0x40 88 #define BWTWO_SR_1152_900_76_B 0x60 89 #define BWTWO_SR_ID_MASK 0x0f 90 #define BWTWO_SR_ID_MONO 0x02 91 #define BWTWO_SR_ID_MONO_ECL 0x03 92 #define BWTWO_SR_ID_MSYNC 0x04 93 #define BWTWO_SR_ID_NOCONN 0x0a 94 95 /* Control Register Constants */ 96 #define BWTWO_CTL_ENABLE_INTS 0x80 97 #define BWTWO_CTL_ENABLE_VIDEO 0x40 98 #define BWTWO_CTL_ENABLE_TIMING 0x20 99 #define BWTWO_CTL_ENABLE_CURCMP 0x10 100 #define BWTWO_CTL_XTAL_MASK 0x0C 101 #define BWTWO_CTL_DIVISOR_MASK 0x03 102 103 /* Status Register Constants */ 104 #define BWTWO_STAT_PENDING_INT 0x80 105 #define BWTWO_STAT_MSENSE_MASK 0x70 106 #define BWTWO_STAT_ID_MASK 0x0f 107 108 struct bw2_par { 109 spinlock_t lock; 110 struct bw2_regs __iomem *regs; 111 112 u32 flags; 113 #define BW2_FLAG_BLANKED 0x00000001 114 115 unsigned long which_io; 116 }; 117 118 /** 119 * bw2_blank - Optional function. Blanks the display. 120 * @blank: the blank mode we want. 121 * @info: frame buffer structure that represents a single frame buffer 122 */ 123 static int 124 bw2_blank(int blank, struct fb_info *info) 125 { 126 struct bw2_par *par = (struct bw2_par *) info->par; 127 struct bw2_regs __iomem *regs = par->regs; 128 unsigned long flags; 129 u8 val; 130 131 spin_lock_irqsave(&par->lock, flags); 132 133 switch (blank) { 134 case FB_BLANK_UNBLANK: /* Unblanking */ 135 val = sbus_readb(®s->control); 136 val |= BWTWO_CTL_ENABLE_VIDEO; 137 sbus_writeb(val, ®s->control); 138 par->flags &= ~BW2_FLAG_BLANKED; 139 break; 140 141 case FB_BLANK_NORMAL: /* Normal blanking */ 142 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */ 143 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */ 144 case FB_BLANK_POWERDOWN: /* Poweroff */ 145 val = sbus_readb(®s->control); 146 val &= ~BWTWO_CTL_ENABLE_VIDEO; 147 sbus_writeb(val, ®s->control); 148 par->flags |= BW2_FLAG_BLANKED; 149 break; 150 } 151 152 spin_unlock_irqrestore(&par->lock, flags); 153 154 return 0; 155 } 156 157 static struct sbus_mmap_map bw2_mmap_map[] = { 158 { 159 .size = SBUS_MMAP_FBSIZE(1) 160 }, 161 { .size = 0 } 162 }; 163 164 static int bw2_mmap(struct fb_info *info, struct vm_area_struct *vma) 165 { 166 struct bw2_par *par = (struct bw2_par *)info->par; 167 168 return sbusfb_mmap_helper(bw2_mmap_map, 169 info->fix.smem_start, info->fix.smem_len, 170 par->which_io, 171 vma); 172 } 173 174 static int bw2_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) 175 { 176 return sbusfb_ioctl_helper(cmd, arg, info, 177 FBTYPE_SUN2BW, 1, info->fix.smem_len); 178 } 179 180 /* 181 * Initialisation 182 */ 183 184 static void bw2_init_fix(struct fb_info *info, int linebytes) 185 { 186 strscpy(info->fix.id, "bwtwo", sizeof(info->fix.id)); 187 188 info->fix.type = FB_TYPE_PACKED_PIXELS; 189 info->fix.visual = FB_VISUAL_MONO01; 190 191 info->fix.line_length = linebytes; 192 193 info->fix.accel = FB_ACCEL_SUN_BWTWO; 194 } 195 196 static u8 bw2regs_1600[] = { 197 0x14, 0x8b, 0x15, 0x28, 0x16, 0x03, 0x17, 0x13, 198 0x18, 0x7b, 0x19, 0x05, 0x1a, 0x34, 0x1b, 0x2e, 199 0x1c, 0x00, 0x1d, 0x0a, 0x1e, 0xff, 0x1f, 0x01, 200 0x10, 0x21, 0 201 }; 202 203 static u8 bw2regs_ecl[] = { 204 0x14, 0x65, 0x15, 0x1e, 0x16, 0x04, 0x17, 0x0c, 205 0x18, 0x5e, 0x19, 0x03, 0x1a, 0xa7, 0x1b, 0x23, 206 0x1c, 0x00, 0x1d, 0x08, 0x1e, 0xff, 0x1f, 0x01, 207 0x10, 0x20, 0 208 }; 209 210 static u8 bw2regs_analog[] = { 211 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x03, 0x17, 0x13, 212 0x18, 0xb0, 0x19, 0x03, 0x1a, 0xa6, 0x1b, 0x22, 213 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01, 214 0x10, 0x20, 0 215 }; 216 217 static u8 bw2regs_76hz[] = { 218 0x14, 0xb7, 0x15, 0x27, 0x16, 0x03, 0x17, 0x0f, 219 0x18, 0xae, 0x19, 0x03, 0x1a, 0xae, 0x1b, 0x2a, 220 0x1c, 0x01, 0x1d, 0x09, 0x1e, 0xff, 0x1f, 0x01, 221 0x10, 0x24, 0 222 }; 223 224 static u8 bw2regs_66hz[] = { 225 0x14, 0xbb, 0x15, 0x2b, 0x16, 0x04, 0x17, 0x14, 226 0x18, 0xae, 0x19, 0x03, 0x1a, 0xa8, 0x1b, 0x24, 227 0x1c, 0x01, 0x1d, 0x05, 0x1e, 0xff, 0x1f, 0x01, 228 0x10, 0x20, 0 229 }; 230 231 static int bw2_do_default_mode(struct bw2_par *par, struct fb_info *info, 232 int *linebytes) 233 { 234 u8 status, mon; 235 u8 *p; 236 237 status = sbus_readb(&par->regs->status); 238 mon = status & BWTWO_SR_RES_MASK; 239 switch (status & BWTWO_SR_ID_MASK) { 240 case BWTWO_SR_ID_MONO_ECL: 241 if (mon == BWTWO_SR_1600_1280) { 242 p = bw2regs_1600; 243 info->var.xres = info->var.xres_virtual = 1600; 244 info->var.yres = info->var.yres_virtual = 1280; 245 *linebytes = 1600 / 8; 246 } else 247 p = bw2regs_ecl; 248 break; 249 250 case BWTWO_SR_ID_MONO: 251 p = bw2regs_analog; 252 break; 253 254 case BWTWO_SR_ID_MSYNC: 255 if (mon == BWTWO_SR_1152_900_76_A || 256 mon == BWTWO_SR_1152_900_76_B) 257 p = bw2regs_76hz; 258 else 259 p = bw2regs_66hz; 260 break; 261 262 case BWTWO_SR_ID_NOCONN: 263 return 0; 264 265 default: 266 printk(KERN_ERR "bw2: can't handle SR %02x\n", 267 status); 268 return -EINVAL; 269 } 270 for ( ; *p; p += 2) { 271 u8 __iomem *regp = &((u8 __iomem *)par->regs)[p[0]]; 272 sbus_writeb(p[1], regp); 273 } 274 return 0; 275 } 276 277 static int bw2_probe(struct platform_device *op) 278 { 279 struct device_node *dp = op->dev.of_node; 280 struct fb_info *info; 281 struct bw2_par *par; 282 int linebytes, err; 283 284 info = framebuffer_alloc(sizeof(struct bw2_par), &op->dev); 285 286 err = -ENOMEM; 287 if (!info) 288 goto out_err; 289 par = info->par; 290 291 spin_lock_init(&par->lock); 292 293 info->fix.smem_start = op->resource[0].start; 294 par->which_io = op->resource[0].flags & IORESOURCE_BITS; 295 296 sbusfb_fill_var(&info->var, dp, 1); 297 linebytes = of_getintprop_default(dp, "linebytes", 298 info->var.xres); 299 300 info->var.red.length = info->var.green.length = 301 info->var.blue.length = info->var.bits_per_pixel; 302 info->var.red.offset = info->var.green.offset = 303 info->var.blue.offset = 0; 304 305 par->regs = of_ioremap(&op->resource[0], BWTWO_REGISTER_OFFSET, 306 sizeof(struct bw2_regs), "bw2 regs"); 307 if (!par->regs) 308 goto out_release_fb; 309 310 if (!of_property_present(dp, "width")) { 311 err = bw2_do_default_mode(par, info, &linebytes); 312 if (err) 313 goto out_unmap_regs; 314 } 315 316 info->fix.smem_len = PAGE_ALIGN(linebytes * info->var.yres); 317 318 info->fbops = &bw2_ops; 319 320 info->screen_base = of_ioremap(&op->resource[0], 0, 321 info->fix.smem_len, "bw2 ram"); 322 if (!info->screen_base) { 323 err = -ENOMEM; 324 goto out_unmap_regs; 325 } 326 327 bw2_blank(FB_BLANK_UNBLANK, info); 328 329 bw2_init_fix(info, linebytes); 330 331 err = register_framebuffer(info); 332 if (err < 0) 333 goto out_unmap_screen; 334 335 dev_set_drvdata(&op->dev, info); 336 337 printk(KERN_INFO "%pOF: bwtwo at %lx:%lx\n", 338 dp, par->which_io, info->fix.smem_start); 339 340 return 0; 341 342 out_unmap_screen: 343 of_iounmap(&op->resource[0], info->screen_base, info->fix.smem_len); 344 345 out_unmap_regs: 346 of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs)); 347 348 out_release_fb: 349 framebuffer_release(info); 350 351 out_err: 352 return err; 353 } 354 355 static void bw2_remove(struct platform_device *op) 356 { 357 struct fb_info *info = dev_get_drvdata(&op->dev); 358 struct bw2_par *par = info->par; 359 360 unregister_framebuffer(info); 361 362 of_iounmap(&op->resource[0], par->regs, sizeof(struct bw2_regs)); 363 of_iounmap(&op->resource[0], info->screen_base, info->fix.smem_len); 364 365 framebuffer_release(info); 366 } 367 368 static const struct of_device_id bw2_match[] = { 369 { 370 .name = "bwtwo", 371 }, 372 {}, 373 }; 374 MODULE_DEVICE_TABLE(of, bw2_match); 375 376 static struct platform_driver bw2_driver = { 377 .driver = { 378 .name = "bw2", 379 .of_match_table = bw2_match, 380 }, 381 .probe = bw2_probe, 382 .remove_new = bw2_remove, 383 }; 384 385 static int __init bw2_init(void) 386 { 387 if (fb_get_options("bw2fb", NULL)) 388 return -ENODEV; 389 390 return platform_driver_register(&bw2_driver); 391 } 392 393 static void __exit bw2_exit(void) 394 { 395 platform_driver_unregister(&bw2_driver); 396 } 397 398 module_init(bw2_init); 399 module_exit(bw2_exit); 400 401 MODULE_DESCRIPTION("framebuffer driver for BWTWO chipsets"); 402 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>"); 403 MODULE_VERSION("2.0"); 404 MODULE_LICENSE("GPL"); 405