1 /* 2 * Driver for AT91 LCD Controller 3 * 4 * Copyright (C) 2007 Atmel Corporation 5 * 6 * This file is subject to the terms and conditions of the GNU General Public 7 * License. See the file COPYING in the main directory of this archive for 8 * more details. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/platform_device.h> 13 #include <linux/dma-mapping.h> 14 #include <linux/interrupt.h> 15 #include <linux/clk.h> 16 #include <linux/fb.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/backlight.h> 20 #include <linux/gfp.h> 21 #include <linux/gpio/consumer.h> 22 #include <linux/module.h> 23 #include <linux/of.h> 24 #include <video/of_videomode.h> 25 #include <video/of_display_timing.h> 26 #include <linux/regulator/consumer.h> 27 #include <video/videomode.h> 28 29 #include <video/atmel_lcdc.h> 30 31 struct atmel_lcdfb_config { 32 bool have_alt_pixclock; 33 bool have_hozval; 34 bool have_intensity_bit; 35 }; 36 37 /* LCD Controller info data structure, stored in device platform_data */ 38 struct atmel_lcdfb_info { 39 spinlock_t lock; 40 struct fb_info *info; 41 void __iomem *mmio; 42 int irq_base; 43 struct work_struct task; 44 45 unsigned int smem_len; 46 struct platform_device *pdev; 47 struct clk *bus_clk; 48 struct clk *lcdc_clk; 49 50 struct backlight_device *backlight; 51 u8 saved_lcdcon; 52 53 u32 pseudo_palette[16]; 54 bool have_intensity_bit; 55 56 struct atmel_lcdfb_pdata pdata; 57 58 const struct atmel_lcdfb_config *config; 59 struct regulator *reg_lcd; 60 }; 61 62 struct atmel_lcdfb_power_ctrl_gpio { 63 struct gpio_desc *gpiod; 64 65 struct list_head list; 66 }; 67 68 #define lcdc_readl(sinfo, reg) __raw_readl((sinfo)->mmio+(reg)) 69 #define lcdc_writel(sinfo, reg, val) __raw_writel((val), (sinfo)->mmio+(reg)) 70 71 /* configurable parameters */ 72 #define ATMEL_LCDC_CVAL_DEFAULT 0xc8 73 #define ATMEL_LCDC_DMA_BURST_LEN 8 /* words */ 74 #define ATMEL_LCDC_FIFO_SIZE 512 /* words */ 75 76 static struct atmel_lcdfb_config at91sam9261_config = { 77 .have_hozval = true, 78 .have_intensity_bit = true, 79 }; 80 81 static struct atmel_lcdfb_config at91sam9263_config = { 82 .have_intensity_bit = true, 83 }; 84 85 static struct atmel_lcdfb_config at91sam9g10_config = { 86 .have_hozval = true, 87 }; 88 89 static struct atmel_lcdfb_config at91sam9g45_config = { 90 .have_alt_pixclock = true, 91 }; 92 93 static struct atmel_lcdfb_config at91sam9g45es_config = { 94 }; 95 96 static struct atmel_lcdfb_config at91sam9rl_config = { 97 .have_intensity_bit = true, 98 }; 99 100 static u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 101 | ATMEL_LCDC_POL_POSITIVE 102 | ATMEL_LCDC_ENA_PWMENABLE; 103 104 #ifdef CONFIG_BACKLIGHT_ATMEL_LCDC 105 106 /* some bl->props field just changed */ 107 static int atmel_bl_update_status(struct backlight_device *bl) 108 { 109 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 110 int brightness = backlight_get_brightness(bl); 111 112 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness); 113 if (contrast_ctr & ATMEL_LCDC_POL_POSITIVE) 114 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 115 brightness ? contrast_ctr : 0); 116 else 117 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 118 119 return 0; 120 } 121 122 static int atmel_bl_get_brightness(struct backlight_device *bl) 123 { 124 struct atmel_lcdfb_info *sinfo = bl_get_data(bl); 125 126 return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); 127 } 128 129 static const struct backlight_ops atmel_lcdc_bl_ops = { 130 .update_status = atmel_bl_update_status, 131 .get_brightness = atmel_bl_get_brightness, 132 }; 133 134 static void init_backlight(struct atmel_lcdfb_info *sinfo) 135 { 136 struct backlight_properties props; 137 struct backlight_device *bl; 138 139 if (sinfo->backlight) 140 return; 141 142 memset(&props, 0, sizeof(struct backlight_properties)); 143 props.type = BACKLIGHT_RAW; 144 props.max_brightness = 0xff; 145 bl = backlight_device_register("backlight", &sinfo->pdev->dev, sinfo, 146 &atmel_lcdc_bl_ops, &props); 147 if (IS_ERR(bl)) { 148 dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n", 149 PTR_ERR(bl)); 150 return; 151 } 152 sinfo->backlight = bl; 153 154 bl->props.power = BACKLIGHT_POWER_ON; 155 bl->props.brightness = atmel_bl_get_brightness(bl); 156 } 157 158 static void exit_backlight(struct atmel_lcdfb_info *sinfo) 159 { 160 if (!sinfo->backlight) 161 return; 162 163 if (sinfo->backlight->ops) { 164 sinfo->backlight->props.power = BACKLIGHT_POWER_OFF; 165 sinfo->backlight->ops->update_status(sinfo->backlight); 166 } 167 backlight_device_unregister(sinfo->backlight); 168 } 169 170 #else 171 172 static void init_backlight(struct atmel_lcdfb_info *sinfo) 173 { 174 dev_warn(&sinfo->pdev->dev, "backlight control is not available\n"); 175 } 176 177 static void exit_backlight(struct atmel_lcdfb_info *sinfo) 178 { 179 } 180 181 #endif 182 183 static void init_contrast(struct atmel_lcdfb_info *sinfo) 184 { 185 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 186 187 /* contrast pwm can be 'inverted' */ 188 if (pdata->lcdcon_pol_negative) 189 contrast_ctr &= ~(ATMEL_LCDC_POL_POSITIVE); 190 191 /* have some default contrast/backlight settings */ 192 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); 193 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); 194 195 if (pdata->lcdcon_is_backlight) 196 init_backlight(sinfo); 197 } 198 199 static inline void atmel_lcdfb_power_control(struct atmel_lcdfb_info *sinfo, int on) 200 { 201 int ret; 202 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 203 204 if (pdata->atmel_lcdfb_power_control) 205 pdata->atmel_lcdfb_power_control(pdata, on); 206 else if (sinfo->reg_lcd) { 207 if (on) { 208 ret = regulator_enable(sinfo->reg_lcd); 209 if (ret) 210 dev_err(&sinfo->pdev->dev, 211 "lcd regulator enable failed: %d\n", ret); 212 } else { 213 ret = regulator_disable(sinfo->reg_lcd); 214 if (ret) 215 dev_err(&sinfo->pdev->dev, 216 "lcd regulator disable failed: %d\n", ret); 217 } 218 } 219 } 220 221 static const struct fb_fix_screeninfo atmel_lcdfb_fix = { 222 .type = FB_TYPE_PACKED_PIXELS, 223 .visual = FB_VISUAL_TRUECOLOR, 224 .xpanstep = 0, 225 .ypanstep = 1, 226 .ywrapstep = 0, 227 .accel = FB_ACCEL_NONE, 228 }; 229 230 static unsigned long compute_hozval(struct atmel_lcdfb_info *sinfo, 231 unsigned long xres) 232 { 233 unsigned long lcdcon2; 234 unsigned long value; 235 236 if (!sinfo->config->have_hozval) 237 return xres; 238 239 lcdcon2 = lcdc_readl(sinfo, ATMEL_LCDC_LCDCON2); 240 value = xres; 241 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) != ATMEL_LCDC_DISTYPE_TFT) { 242 /* STN display */ 243 if ((lcdcon2 & ATMEL_LCDC_DISTYPE) == ATMEL_LCDC_DISTYPE_STNCOLOR) { 244 value *= 3; 245 } 246 if ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_4 247 || ( (lcdcon2 & ATMEL_LCDC_IFWIDTH) == ATMEL_LCDC_IFWIDTH_8 248 && (lcdcon2 & ATMEL_LCDC_SCANMOD) == ATMEL_LCDC_SCANMOD_DUAL )) 249 value = DIV_ROUND_UP(value, 4); 250 else 251 value = DIV_ROUND_UP(value, 8); 252 } 253 254 return value; 255 } 256 257 static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) 258 { 259 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 260 261 /* Turn off the LCD controller and the DMA controller */ 262 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 263 pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET); 264 265 /* Wait for the LCDC core to become idle */ 266 while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) 267 msleep(10); 268 269 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); 270 } 271 272 static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) 273 { 274 atmel_lcdfb_stop_nowait(sinfo); 275 276 /* Wait for DMA engine to become idle... */ 277 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 278 msleep(10); 279 } 280 281 static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) 282 { 283 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 284 285 lcdc_writel(sinfo, ATMEL_LCDC_DMACON, pdata->default_dmacon); 286 lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, 287 (pdata->guard_time << ATMEL_LCDC_GUARDT_OFFSET) 288 | ATMEL_LCDC_PWR); 289 } 290 291 static void atmel_lcdfb_update_dma(struct fb_info *info, 292 struct fb_var_screeninfo *var) 293 { 294 struct atmel_lcdfb_info *sinfo = info->par; 295 struct fb_fix_screeninfo *fix = &info->fix; 296 unsigned long dma_addr; 297 298 dma_addr = (fix->smem_start + var->yoffset * fix->line_length 299 + var->xoffset * info->var.bits_per_pixel / 8); 300 301 dma_addr &= ~3UL; 302 303 /* Set framebuffer DMA base address and pixel offset */ 304 lcdc_writel(sinfo, ATMEL_LCDC_DMABADDR1, dma_addr); 305 } 306 307 static inline void atmel_lcdfb_free_video_memory(struct atmel_lcdfb_info *sinfo) 308 { 309 struct fb_info *info = sinfo->info; 310 311 dma_free_wc(info->device, info->fix.smem_len, info->screen_base, 312 info->fix.smem_start); 313 } 314 315 /** 316 * atmel_lcdfb_alloc_video_memory - Allocate framebuffer memory 317 * @sinfo: the frame buffer to allocate memory for 318 * 319 * This function is called only from the atmel_lcdfb_probe() 320 * so no locking by fb_info->mm_lock around smem_len setting is needed. 321 */ 322 static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) 323 { 324 struct fb_info *info = sinfo->info; 325 struct fb_var_screeninfo *var = &info->var; 326 unsigned int smem_len; 327 328 smem_len = (var->xres_virtual * var->yres_virtual 329 * ((var->bits_per_pixel + 7) / 8)); 330 info->fix.smem_len = max(smem_len, sinfo->smem_len); 331 332 info->screen_base = dma_alloc_wc(info->device, info->fix.smem_len, 333 (dma_addr_t *)&info->fix.smem_start, 334 GFP_KERNEL); 335 336 if (!info->screen_base) { 337 return -ENOMEM; 338 } 339 340 memset(info->screen_base, 0, info->fix.smem_len); 341 342 return 0; 343 } 344 345 static const struct fb_videomode *atmel_lcdfb_choose_mode(struct fb_var_screeninfo *var, 346 struct fb_info *info) 347 { 348 struct fb_videomode varfbmode; 349 const struct fb_videomode *fbmode = NULL; 350 351 fb_var_to_videomode(&varfbmode, var); 352 fbmode = fb_find_nearest_mode(&varfbmode, &info->modelist); 353 if (fbmode) 354 fb_videomode_to_var(var, fbmode); 355 return fbmode; 356 } 357 358 359 /** 360 * atmel_lcdfb_check_var - Validates a var passed in. 361 * @var: frame buffer variable screen structure 362 * @info: frame buffer structure that represents a single frame buffer 363 * 364 * Checks to see if the hardware supports the state requested by 365 * var passed in. This function does not alter the hardware 366 * state!!! This means the data stored in struct fb_info and 367 * struct atmel_lcdfb_info do not change. This includes the var 368 * inside of struct fb_info. Do NOT change these. This function 369 * can be called on its own if we intent to only test a mode and 370 * not actually set it. The stuff in modedb.c is a example of 371 * this. If the var passed in is slightly off by what the 372 * hardware can support then we alter the var PASSED in to what 373 * we can do. If the hardware doesn't support mode change a 374 * -EINVAL will be returned by the upper layers. You don't need 375 * to implement this function then. If you hardware doesn't 376 * support changing the resolution then this function is not 377 * needed. In this case the driver would just provide a var that 378 * represents the static state the screen is in. 379 * 380 * Returns negative errno on error, or zero on success. 381 */ 382 static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, 383 struct fb_info *info) 384 { 385 struct device *dev = info->device; 386 struct atmel_lcdfb_info *sinfo = info->par; 387 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 388 unsigned long clk_value_khz; 389 390 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 391 392 dev_dbg(dev, "%s:\n", __func__); 393 394 if (!(var->pixclock && var->bits_per_pixel)) { 395 /* choose a suitable mode if possible */ 396 if (!atmel_lcdfb_choose_mode(var, info)) { 397 dev_err(dev, "needed value not specified\n"); 398 return -EINVAL; 399 } 400 } 401 402 dev_dbg(dev, " resolution: %ux%u\n", var->xres, var->yres); 403 dev_dbg(dev, " pixclk: %lu KHz\n", PICOS2KHZ(var->pixclock)); 404 dev_dbg(dev, " bpp: %u\n", var->bits_per_pixel); 405 dev_dbg(dev, " clk: %lu KHz\n", clk_value_khz); 406 407 if (PICOS2KHZ(var->pixclock) > clk_value_khz) { 408 dev_err(dev, "%lu KHz pixel clock is too fast\n", PICOS2KHZ(var->pixclock)); 409 return -EINVAL; 410 } 411 412 /* Do not allow to have real resoulution larger than virtual */ 413 if (var->xres > var->xres_virtual) 414 var->xres_virtual = var->xres; 415 416 if (var->yres > var->yres_virtual) 417 var->yres_virtual = var->yres; 418 419 /* Force same alignment for each line */ 420 var->xres = (var->xres + 3) & ~3UL; 421 var->xres_virtual = (var->xres_virtual + 3) & ~3UL; 422 423 var->red.msb_right = var->green.msb_right = var->blue.msb_right = 0; 424 var->transp.msb_right = 0; 425 var->transp.offset = var->transp.length = 0; 426 var->xoffset = var->yoffset = 0; 427 428 if (info->fix.smem_len) { 429 unsigned int smem_len = (var->xres_virtual * var->yres_virtual 430 * ((var->bits_per_pixel + 7) / 8)); 431 if (smem_len > info->fix.smem_len) { 432 dev_err(dev, "Frame buffer is too small (%u) for screen size (need at least %u)\n", 433 info->fix.smem_len, smem_len); 434 return -EINVAL; 435 } 436 } 437 438 /* Saturate vertical and horizontal timings at maximum values */ 439 var->vsync_len = min_t(u32, var->vsync_len, 440 (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); 441 var->upper_margin = min_t(u32, var->upper_margin, 442 ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); 443 var->lower_margin = min_t(u32, var->lower_margin, 444 ATMEL_LCDC_VFP); 445 var->right_margin = min_t(u32, var->right_margin, 446 (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); 447 var->hsync_len = min_t(u32, var->hsync_len, 448 (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); 449 var->left_margin = min_t(u32, var->left_margin, 450 ATMEL_LCDC_HBP + 1); 451 452 /* Some parameters can't be zero */ 453 var->vsync_len = max_t(u32, var->vsync_len, 1); 454 var->right_margin = max_t(u32, var->right_margin, 1); 455 var->hsync_len = max_t(u32, var->hsync_len, 1); 456 var->left_margin = max_t(u32, var->left_margin, 1); 457 458 switch (var->bits_per_pixel) { 459 case 1: 460 case 2: 461 case 4: 462 case 8: 463 var->red.offset = var->green.offset = var->blue.offset = 0; 464 var->red.length = var->green.length = var->blue.length 465 = var->bits_per_pixel; 466 break; 467 case 16: 468 /* Older SOCs use IBGR:555 rather than BGR:565. */ 469 if (sinfo->config->have_intensity_bit) 470 var->green.length = 5; 471 else 472 var->green.length = 6; 473 474 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 475 /* RGB:5X5 mode */ 476 var->red.offset = var->green.length + 5; 477 var->blue.offset = 0; 478 } else { 479 /* BGR:5X5 mode */ 480 var->red.offset = 0; 481 var->blue.offset = var->green.length + 5; 482 } 483 var->green.offset = 5; 484 var->red.length = var->blue.length = 5; 485 break; 486 case 32: 487 var->transp.offset = 24; 488 var->transp.length = 8; 489 fallthrough; 490 case 24: 491 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 492 /* RGB:888 mode */ 493 var->red.offset = 16; 494 var->blue.offset = 0; 495 } else { 496 /* BGR:888 mode */ 497 var->red.offset = 0; 498 var->blue.offset = 16; 499 } 500 var->green.offset = 8; 501 var->red.length = var->green.length = var->blue.length = 8; 502 break; 503 default: 504 dev_err(dev, "color depth %d not supported\n", 505 var->bits_per_pixel); 506 return -EINVAL; 507 } 508 509 return 0; 510 } 511 512 /* 513 * LCD reset sequence 514 */ 515 static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) 516 { 517 might_sleep(); 518 519 atmel_lcdfb_stop(sinfo); 520 atmel_lcdfb_start(sinfo); 521 } 522 523 /** 524 * atmel_lcdfb_set_par - Alters the hardware state. 525 * @info: frame buffer structure that represents a single frame buffer 526 * 527 * Using the fb_var_screeninfo in fb_info we set the resolution 528 * of the this particular framebuffer. This function alters the 529 * par AND the fb_fix_screeninfo stored in fb_info. It doesn't 530 * not alter var in fb_info since we are using that data. This 531 * means we depend on the data in var inside fb_info to be 532 * supported by the hardware. atmel_lcdfb_check_var is always called 533 * before atmel_lcdfb_set_par to ensure this. Again if you can't 534 * change the resolution you don't need this function. 535 * 536 */ 537 static int atmel_lcdfb_set_par(struct fb_info *info) 538 { 539 struct atmel_lcdfb_info *sinfo = info->par; 540 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 541 unsigned long hozval_linesz; 542 unsigned long value; 543 unsigned long clk_value_khz; 544 unsigned long bits_per_line; 545 unsigned long pix_factor = 2; 546 547 might_sleep(); 548 549 dev_dbg(info->device, "%s:\n", __func__); 550 dev_dbg(info->device, " * resolution: %ux%u (%ux%u virtual)\n", 551 info->var.xres, info->var.yres, 552 info->var.xres_virtual, info->var.yres_virtual); 553 554 atmel_lcdfb_stop_nowait(sinfo); 555 556 if (info->var.bits_per_pixel == 1) 557 info->fix.visual = FB_VISUAL_MONO01; 558 else if (info->var.bits_per_pixel <= 8) 559 info->fix.visual = FB_VISUAL_PSEUDOCOLOR; 560 else 561 info->fix.visual = FB_VISUAL_TRUECOLOR; 562 563 bits_per_line = info->var.xres_virtual * info->var.bits_per_pixel; 564 info->fix.line_length = DIV_ROUND_UP(bits_per_line, 8); 565 566 /* Re-initialize the DMA engine... */ 567 dev_dbg(info->device, " * update DMA engine\n"); 568 atmel_lcdfb_update_dma(info, &info->var); 569 570 /* ...set frame size and burst length = 8 words (?) */ 571 value = (info->var.yres * info->var.xres * info->var.bits_per_pixel) / 32; 572 value |= ((ATMEL_LCDC_DMA_BURST_LEN - 1) << ATMEL_LCDC_BLENGTH_OFFSET); 573 lcdc_writel(sinfo, ATMEL_LCDC_DMAFRMCFG, value); 574 575 /* Now, the LCDC core... */ 576 577 /* Set pixel clock */ 578 if (sinfo->config->have_alt_pixclock) 579 pix_factor = 1; 580 581 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 582 583 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 584 585 if (value < pix_factor) { 586 dev_notice(info->device, "Bypassing pixel clock divider\n"); 587 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 588 } else { 589 value = (value / pix_factor) - 1; 590 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 591 value); 592 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 593 value << ATMEL_LCDC_CLKVAL_OFFSET); 594 info->var.pixclock = 595 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); 596 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 597 PICOS2KHZ(info->var.pixclock)); 598 } 599 600 601 /* Initialize control register 2 */ 602 value = pdata->default_lcdcon2; 603 604 if (!(info->var.sync & FB_SYNC_HOR_HIGH_ACT)) 605 value |= ATMEL_LCDC_INVLINE_INVERTED; 606 if (!(info->var.sync & FB_SYNC_VERT_HIGH_ACT)) 607 value |= ATMEL_LCDC_INVFRAME_INVERTED; 608 609 switch (info->var.bits_per_pixel) { 610 case 1: value |= ATMEL_LCDC_PIXELSIZE_1; break; 611 case 2: value |= ATMEL_LCDC_PIXELSIZE_2; break; 612 case 4: value |= ATMEL_LCDC_PIXELSIZE_4; break; 613 case 8: value |= ATMEL_LCDC_PIXELSIZE_8; break; 614 case 15: fallthrough; 615 case 16: value |= ATMEL_LCDC_PIXELSIZE_16; break; 616 case 24: value |= ATMEL_LCDC_PIXELSIZE_24; break; 617 case 32: value |= ATMEL_LCDC_PIXELSIZE_32; break; 618 default: BUG(); break; 619 } 620 dev_dbg(info->device, " * LCDCON2 = %08lx\n", value); 621 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON2, value); 622 623 /* Vertical timing */ 624 value = (info->var.vsync_len - 1) << ATMEL_LCDC_VPW_OFFSET; 625 value |= info->var.upper_margin << ATMEL_LCDC_VBP_OFFSET; 626 value |= info->var.lower_margin; 627 dev_dbg(info->device, " * LCDTIM1 = %08lx\n", value); 628 lcdc_writel(sinfo, ATMEL_LCDC_TIM1, value); 629 630 /* Horizontal timing */ 631 value = (info->var.right_margin - 1) << ATMEL_LCDC_HFP_OFFSET; 632 value |= (info->var.hsync_len - 1) << ATMEL_LCDC_HPW_OFFSET; 633 value |= (info->var.left_margin - 1); 634 dev_dbg(info->device, " * LCDTIM2 = %08lx\n", value); 635 lcdc_writel(sinfo, ATMEL_LCDC_TIM2, value); 636 637 /* Horizontal value (aka line size) */ 638 hozval_linesz = compute_hozval(sinfo, info->var.xres); 639 640 /* Display size */ 641 value = (hozval_linesz - 1) << ATMEL_LCDC_HOZVAL_OFFSET; 642 value |= info->var.yres - 1; 643 dev_dbg(info->device, " * LCDFRMCFG = %08lx\n", value); 644 lcdc_writel(sinfo, ATMEL_LCDC_LCDFRMCFG, value); 645 646 /* FIFO Threshold: Use formula from data sheet */ 647 value = ATMEL_LCDC_FIFO_SIZE - (2 * ATMEL_LCDC_DMA_BURST_LEN + 3); 648 lcdc_writel(sinfo, ATMEL_LCDC_FIFO, value); 649 650 /* Toggle LCD_MODE every frame */ 651 lcdc_writel(sinfo, ATMEL_LCDC_MVAL, 0); 652 653 /* Disable all interrupts */ 654 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); 655 /* Enable FIFO & DMA errors */ 656 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 657 658 /* ...wait for DMA engine to become idle... */ 659 while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) 660 msleep(10); 661 662 atmel_lcdfb_start(sinfo); 663 664 dev_dbg(info->device, " * DONE\n"); 665 666 return 0; 667 } 668 669 static inline unsigned int chan_to_field(unsigned int chan, const struct fb_bitfield *bf) 670 { 671 chan &= 0xffff; 672 chan >>= 16 - bf->length; 673 return chan << bf->offset; 674 } 675 676 /** 677 * atmel_lcdfb_setcolreg - Optional function. Sets a color register. 678 * @regno: Which register in the CLUT we are programming 679 * @red: The red value which can be up to 16 bits wide 680 * @green: The green value which can be up to 16 bits wide 681 * @blue: The blue value which can be up to 16 bits wide. 682 * @transp: If supported the alpha value which can be up to 16 bits wide. 683 * @info: frame buffer info structure 684 * 685 * Set a single color register. The values supplied have a 16 bit 686 * magnitude which needs to be scaled in this function for the hardware. 687 * Things to take into consideration are how many color registers, if 688 * any, are supported with the current color visual. With truecolor mode 689 * no color palettes are supported. Here a pseudo palette is created 690 * which we store the value in pseudo_palette in struct fb_info. For 691 * pseudocolor mode we have a limited color palette. To deal with this 692 * we can program what color is displayed for a particular pixel value. 693 * DirectColor is similar in that we can program each color field. If 694 * we have a static colormap we don't need to implement this function. 695 * 696 * Returns negative errno on error, or zero on success. In an 697 * ideal world, this would have been the case, but as it turns 698 * out, the other drivers return 1 on failure, so that's what 699 * we're going to do. 700 */ 701 static int atmel_lcdfb_setcolreg(unsigned int regno, unsigned int red, 702 unsigned int green, unsigned int blue, 703 unsigned int transp, struct fb_info *info) 704 { 705 struct atmel_lcdfb_info *sinfo = info->par; 706 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 707 unsigned int val; 708 u32 *pal; 709 int ret = 1; 710 711 if (info->var.grayscale) 712 red = green = blue = (19595 * red + 38470 * green 713 + 7471 * blue) >> 16; 714 715 switch (info->fix.visual) { 716 case FB_VISUAL_TRUECOLOR: 717 if (regno < 16) { 718 pal = info->pseudo_palette; 719 720 val = chan_to_field(red, &info->var.red); 721 val |= chan_to_field(green, &info->var.green); 722 val |= chan_to_field(blue, &info->var.blue); 723 724 pal[regno] = val; 725 ret = 0; 726 } 727 break; 728 729 case FB_VISUAL_PSEUDOCOLOR: 730 if (regno < 256) { 731 if (sinfo->config->have_intensity_bit) { 732 /* old style I+BGR:555 */ 733 val = ((red >> 11) & 0x001f); 734 val |= ((green >> 6) & 0x03e0); 735 val |= ((blue >> 1) & 0x7c00); 736 737 /* 738 * TODO: intensity bit. Maybe something like 739 * ~(red[10] ^ green[10] ^ blue[10]) & 1 740 */ 741 } else { 742 /* new style BGR:565 / RGB:565 */ 743 if (pdata->lcd_wiring_mode == ATMEL_LCDC_WIRING_RGB) { 744 val = ((blue >> 11) & 0x001f); 745 val |= ((red >> 0) & 0xf800); 746 } else { 747 val = ((red >> 11) & 0x001f); 748 val |= ((blue >> 0) & 0xf800); 749 } 750 751 val |= ((green >> 5) & 0x07e0); 752 } 753 754 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 755 ret = 0; 756 } 757 break; 758 759 case FB_VISUAL_MONO01: 760 if (regno < 2) { 761 val = (regno == 0) ? 0x00 : 0x1F; 762 lcdc_writel(sinfo, ATMEL_LCDC_LUT(regno), val); 763 ret = 0; 764 } 765 break; 766 767 } 768 769 return ret; 770 } 771 772 static int atmel_lcdfb_pan_display(struct fb_var_screeninfo *var, 773 struct fb_info *info) 774 { 775 dev_dbg(info->device, "%s\n", __func__); 776 777 atmel_lcdfb_update_dma(info, var); 778 779 return 0; 780 } 781 782 static int atmel_lcdfb_blank(int blank_mode, struct fb_info *info) 783 { 784 struct atmel_lcdfb_info *sinfo = info->par; 785 786 switch (blank_mode) { 787 case FB_BLANK_UNBLANK: 788 case FB_BLANK_NORMAL: 789 atmel_lcdfb_start(sinfo); 790 break; 791 case FB_BLANK_VSYNC_SUSPEND: 792 case FB_BLANK_HSYNC_SUSPEND: 793 break; 794 case FB_BLANK_POWERDOWN: 795 atmel_lcdfb_stop(sinfo); 796 break; 797 default: 798 return -EINVAL; 799 } 800 801 /* let fbcon do a soft blank for us */ 802 return ((blank_mode == FB_BLANK_NORMAL) ? 1 : 0); 803 } 804 805 static const struct fb_ops atmel_lcdfb_ops = { 806 .owner = THIS_MODULE, 807 FB_DEFAULT_IOMEM_OPS, 808 .fb_check_var = atmel_lcdfb_check_var, 809 .fb_set_par = atmel_lcdfb_set_par, 810 .fb_setcolreg = atmel_lcdfb_setcolreg, 811 .fb_blank = atmel_lcdfb_blank, 812 .fb_pan_display = atmel_lcdfb_pan_display, 813 }; 814 815 static irqreturn_t atmel_lcdfb_interrupt(int irq, void *dev_id) 816 { 817 struct fb_info *info = dev_id; 818 struct atmel_lcdfb_info *sinfo = info->par; 819 u32 status; 820 821 status = lcdc_readl(sinfo, ATMEL_LCDC_ISR); 822 if (status & ATMEL_LCDC_UFLWI) { 823 dev_warn(info->device, "FIFO underflow %#x\n", status); 824 /* reset DMA and FIFO to avoid screen shifting */ 825 schedule_work(&sinfo->task); 826 } 827 lcdc_writel(sinfo, ATMEL_LCDC_ICR, status); 828 return IRQ_HANDLED; 829 } 830 831 /* 832 * LCD controller task (to reset the LCD) 833 */ 834 static void atmel_lcdfb_task(struct work_struct *work) 835 { 836 struct atmel_lcdfb_info *sinfo = 837 container_of(work, struct atmel_lcdfb_info, task); 838 839 atmel_lcdfb_reset(sinfo); 840 } 841 842 static int atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) 843 { 844 struct fb_info *info = sinfo->info; 845 int ret = 0; 846 847 info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; 848 849 dev_info(info->device, 850 "%luKiB frame buffer at %08lx (mapped at %p)\n", 851 (unsigned long)info->fix.smem_len / 1024, 852 (unsigned long)info->fix.smem_start, 853 info->screen_base); 854 855 /* Allocate colormap */ 856 ret = fb_alloc_cmap(&info->cmap, 256, 0); 857 if (ret < 0) 858 dev_err(info->device, "Alloc color map failed\n"); 859 860 return ret; 861 } 862 863 static void atmel_lcdfb_start_clock(struct atmel_lcdfb_info *sinfo) 864 { 865 clk_prepare_enable(sinfo->bus_clk); 866 clk_prepare_enable(sinfo->lcdc_clk); 867 } 868 869 static void atmel_lcdfb_stop_clock(struct atmel_lcdfb_info *sinfo) 870 { 871 clk_disable_unprepare(sinfo->bus_clk); 872 clk_disable_unprepare(sinfo->lcdc_clk); 873 } 874 875 static const struct of_device_id atmel_lcdfb_dt_ids[] = { 876 { .compatible = "atmel,at91sam9261-lcdc" , .data = &at91sam9261_config, }, 877 { .compatible = "atmel,at91sam9263-lcdc" , .data = &at91sam9263_config, }, 878 { .compatible = "atmel,at91sam9g10-lcdc" , .data = &at91sam9g10_config, }, 879 { .compatible = "atmel,at91sam9g45-lcdc" , .data = &at91sam9g45_config, }, 880 { .compatible = "atmel,at91sam9g45es-lcdc" , .data = &at91sam9g45es_config, }, 881 { .compatible = "atmel,at91sam9rl-lcdc" , .data = &at91sam9rl_config, }, 882 { /* sentinel */ } 883 }; 884 885 MODULE_DEVICE_TABLE(of, atmel_lcdfb_dt_ids); 886 887 static const char *atmel_lcdfb_wiring_modes[] = { 888 [ATMEL_LCDC_WIRING_BGR] = "BRG", 889 [ATMEL_LCDC_WIRING_RGB] = "RGB", 890 }; 891 892 static int atmel_lcdfb_get_of_wiring_modes(struct device_node *np) 893 { 894 const char *mode; 895 int err, i; 896 897 err = of_property_read_string(np, "atmel,lcd-wiring-mode", &mode); 898 if (err < 0) 899 return ATMEL_LCDC_WIRING_BGR; 900 901 for (i = 0; i < ARRAY_SIZE(atmel_lcdfb_wiring_modes); i++) 902 if (!strcasecmp(mode, atmel_lcdfb_wiring_modes[i])) 903 return i; 904 905 return -ENODEV; 906 } 907 908 static void atmel_lcdfb_power_control_gpio(struct atmel_lcdfb_pdata *pdata, int on) 909 { 910 struct atmel_lcdfb_power_ctrl_gpio *og; 911 912 list_for_each_entry(og, &pdata->pwr_gpios, list) 913 gpiod_set_value(og->gpiod, on); 914 } 915 916 static int atmel_lcdfb_of_init(struct atmel_lcdfb_info *sinfo) 917 { 918 struct fb_info *info = sinfo->info; 919 struct atmel_lcdfb_pdata *pdata = &sinfo->pdata; 920 struct fb_var_screeninfo *var = &info->var; 921 struct device *dev = &sinfo->pdev->dev; 922 struct device_node *np =dev->of_node; 923 struct device_node *display_np; 924 struct atmel_lcdfb_power_ctrl_gpio *og; 925 bool is_gpio_power = false; 926 struct fb_videomode fb_vm; 927 struct gpio_desc *gpiod; 928 struct videomode vm; 929 int ret; 930 int i; 931 932 sinfo->config = of_device_get_match_data(dev); 933 934 display_np = of_parse_phandle(np, "display", 0); 935 if (!display_np) { 936 dev_err(dev, "failed to find display phandle\n"); 937 return -ENOENT; 938 } 939 940 ret = of_property_read_u32(display_np, "bits-per-pixel", &var->bits_per_pixel); 941 if (ret < 0) { 942 dev_err(dev, "failed to get property bits-per-pixel\n"); 943 goto put_display_node; 944 } 945 946 ret = of_property_read_u32(display_np, "atmel,guard-time", &pdata->guard_time); 947 if (ret < 0) { 948 dev_err(dev, "failed to get property atmel,guard-time\n"); 949 goto put_display_node; 950 } 951 952 ret = of_property_read_u32(display_np, "atmel,lcdcon2", &pdata->default_lcdcon2); 953 if (ret < 0) { 954 dev_err(dev, "failed to get property atmel,lcdcon2\n"); 955 goto put_display_node; 956 } 957 958 ret = of_property_read_u32(display_np, "atmel,dmacon", &pdata->default_dmacon); 959 if (ret < 0) { 960 dev_err(dev, "failed to get property bits-per-pixel\n"); 961 goto put_display_node; 962 } 963 964 INIT_LIST_HEAD(&pdata->pwr_gpios); 965 for (i = 0; i < gpiod_count(dev, "atmel,power-control"); i++) { 966 ret = -ENOMEM; 967 gpiod = devm_gpiod_get_index(dev, "atmel,power-control", 968 i, GPIOD_ASIS); 969 if (IS_ERR(gpiod)) 970 continue; 971 972 og = devm_kzalloc(dev, sizeof(*og), GFP_KERNEL); 973 if (!og) 974 goto put_display_node; 975 976 og->gpiod = gpiod; 977 is_gpio_power = true; 978 979 ret = gpiod_direction_output(gpiod, gpiod_is_active_low(gpiod)); 980 if (ret) { 981 dev_err(dev, "set direction output gpio atmel,power-control[%d] failed\n", i); 982 goto put_display_node; 983 } 984 list_add(&og->list, &pdata->pwr_gpios); 985 } 986 987 if (is_gpio_power) 988 pdata->atmel_lcdfb_power_control = atmel_lcdfb_power_control_gpio; 989 990 ret = atmel_lcdfb_get_of_wiring_modes(display_np); 991 if (ret < 0) { 992 dev_err(dev, "invalid atmel,lcd-wiring-mode\n"); 993 goto put_display_node; 994 } 995 pdata->lcd_wiring_mode = ret; 996 997 pdata->lcdcon_is_backlight = of_property_read_bool(display_np, "atmel,lcdcon-backlight"); 998 pdata->lcdcon_pol_negative = of_property_read_bool(display_np, "atmel,lcdcon-backlight-inverted"); 999 1000 ret = of_get_videomode(display_np, &vm, OF_USE_NATIVE_MODE); 1001 if (ret) { 1002 dev_err(dev, "failed to get videomode from DT\n"); 1003 goto put_display_node; 1004 } 1005 1006 ret = fb_videomode_from_videomode(&vm, &fb_vm); 1007 if (ret < 0) 1008 goto put_display_node; 1009 1010 fb_add_videomode(&fb_vm, &info->modelist); 1011 1012 put_display_node: 1013 of_node_put(display_np); 1014 return ret; 1015 } 1016 1017 static int atmel_lcdfb_probe(struct platform_device *pdev) 1018 { 1019 struct device *dev = &pdev->dev; 1020 struct fb_info *info; 1021 struct atmel_lcdfb_info *sinfo; 1022 struct resource *regs = NULL; 1023 struct resource *map = NULL; 1024 struct fb_modelist *modelist; 1025 int ret; 1026 1027 dev_dbg(dev, "%s BEGIN\n", __func__); 1028 1029 ret = -ENOMEM; 1030 info = framebuffer_alloc(sizeof(struct atmel_lcdfb_info), dev); 1031 if (!info) 1032 goto out; 1033 1034 sinfo = info->par; 1035 sinfo->pdev = pdev; 1036 sinfo->info = info; 1037 1038 INIT_LIST_HEAD(&info->modelist); 1039 1040 if (!pdev->dev.of_node) { 1041 dev_err(dev, "cannot get default configuration\n"); 1042 goto free_info; 1043 } 1044 1045 ret = atmel_lcdfb_of_init(sinfo); 1046 if (ret) 1047 goto free_info; 1048 1049 ret = -ENODEV; 1050 if (!sinfo->config) 1051 goto free_info; 1052 1053 sinfo->reg_lcd = devm_regulator_get(&pdev->dev, "lcd"); 1054 if (IS_ERR(sinfo->reg_lcd)) 1055 sinfo->reg_lcd = NULL; 1056 1057 info->flags = FBINFO_PARTIAL_PAN_OK | 1058 FBINFO_HWACCEL_YPAN; 1059 info->pseudo_palette = sinfo->pseudo_palette; 1060 info->fbops = &atmel_lcdfb_ops; 1061 1062 info->fix = atmel_lcdfb_fix; 1063 strscpy(info->fix.id, sinfo->pdev->name); 1064 1065 /* Enable LCDC Clocks */ 1066 sinfo->bus_clk = clk_get(dev, "hclk"); 1067 if (IS_ERR(sinfo->bus_clk)) { 1068 ret = PTR_ERR(sinfo->bus_clk); 1069 goto free_info; 1070 } 1071 sinfo->lcdc_clk = clk_get(dev, "lcdc_clk"); 1072 if (IS_ERR(sinfo->lcdc_clk)) { 1073 ret = PTR_ERR(sinfo->lcdc_clk); 1074 goto put_bus_clk; 1075 } 1076 atmel_lcdfb_start_clock(sinfo); 1077 1078 modelist = list_first_entry(&info->modelist, 1079 struct fb_modelist, list); 1080 fb_videomode_to_var(&info->var, &modelist->mode); 1081 1082 atmel_lcdfb_check_var(&info->var, info); 1083 1084 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1085 if (!regs) { 1086 dev_err(dev, "resources unusable\n"); 1087 ret = -ENXIO; 1088 goto stop_clk; 1089 } 1090 1091 sinfo->irq_base = platform_get_irq(pdev, 0); 1092 if (sinfo->irq_base < 0) { 1093 ret = sinfo->irq_base; 1094 goto stop_clk; 1095 } 1096 1097 /* Initialize video memory */ 1098 map = platform_get_resource(pdev, IORESOURCE_MEM, 1); 1099 if (map) { 1100 /* use a pre-allocated memory buffer */ 1101 info->fix.smem_start = map->start; 1102 info->fix.smem_len = resource_size(map); 1103 if (!request_mem_region(info->fix.smem_start, 1104 info->fix.smem_len, pdev->name)) { 1105 ret = -EBUSY; 1106 goto stop_clk; 1107 } 1108 1109 info->screen_base = ioremap_wc(info->fix.smem_start, 1110 info->fix.smem_len); 1111 if (!info->screen_base) { 1112 ret = -ENOMEM; 1113 goto release_intmem; 1114 } 1115 1116 /* 1117 * Don't clear the framebuffer -- someone may have set 1118 * up a splash image. 1119 */ 1120 } else { 1121 /* allocate memory buffer */ 1122 ret = atmel_lcdfb_alloc_video_memory(sinfo); 1123 if (ret < 0) { 1124 dev_err(dev, "cannot allocate framebuffer: %d\n", ret); 1125 goto stop_clk; 1126 } 1127 } 1128 1129 /* LCDC registers */ 1130 info->fix.mmio_start = regs->start; 1131 info->fix.mmio_len = resource_size(regs); 1132 1133 if (!request_mem_region(info->fix.mmio_start, 1134 info->fix.mmio_len, pdev->name)) { 1135 ret = -EBUSY; 1136 goto free_fb; 1137 } 1138 1139 sinfo->mmio = ioremap(info->fix.mmio_start, info->fix.mmio_len); 1140 if (!sinfo->mmio) { 1141 dev_err(dev, "cannot map LCDC registers\n"); 1142 ret = -ENOMEM; 1143 goto release_mem; 1144 } 1145 1146 /* Initialize PWM for contrast or backlight ("off") */ 1147 init_contrast(sinfo); 1148 1149 /* interrupt */ 1150 ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); 1151 if (ret) { 1152 dev_err(dev, "request_irq failed: %d\n", ret); 1153 goto unmap_mmio; 1154 } 1155 1156 /* Some operations on the LCDC might sleep and 1157 * require a preemptible task context */ 1158 INIT_WORK(&sinfo->task, atmel_lcdfb_task); 1159 1160 ret = atmel_lcdfb_init_fbinfo(sinfo); 1161 if (ret < 0) { 1162 dev_err(dev, "init fbinfo failed: %d\n", ret); 1163 goto unregister_irqs; 1164 } 1165 1166 ret = atmel_lcdfb_set_par(info); 1167 if (ret < 0) { 1168 dev_err(dev, "set par failed: %d\n", ret); 1169 goto unregister_irqs; 1170 } 1171 1172 dev_set_drvdata(dev, info); 1173 1174 /* 1175 * Tell the world that we're ready to go 1176 */ 1177 ret = register_framebuffer(info); 1178 if (ret < 0) { 1179 dev_err(dev, "failed to register framebuffer device: %d\n", ret); 1180 goto reset_drvdata; 1181 } 1182 1183 /* Power up the LCDC screen */ 1184 atmel_lcdfb_power_control(sinfo, 1); 1185 1186 dev_info(dev, "fb%d: Atmel LCDC at 0x%08lx (mapped at %p), irq %d\n", 1187 info->node, info->fix.mmio_start, sinfo->mmio, sinfo->irq_base); 1188 1189 return 0; 1190 1191 reset_drvdata: 1192 dev_set_drvdata(dev, NULL); 1193 fb_dealloc_cmap(&info->cmap); 1194 unregister_irqs: 1195 cancel_work_sync(&sinfo->task); 1196 free_irq(sinfo->irq_base, info); 1197 unmap_mmio: 1198 exit_backlight(sinfo); 1199 iounmap(sinfo->mmio); 1200 release_mem: 1201 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1202 free_fb: 1203 if (map) 1204 iounmap(info->screen_base); 1205 else 1206 atmel_lcdfb_free_video_memory(sinfo); 1207 1208 release_intmem: 1209 if (map) 1210 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1211 stop_clk: 1212 atmel_lcdfb_stop_clock(sinfo); 1213 clk_put(sinfo->lcdc_clk); 1214 put_bus_clk: 1215 clk_put(sinfo->bus_clk); 1216 free_info: 1217 framebuffer_release(info); 1218 out: 1219 dev_dbg(dev, "%s FAILED\n", __func__); 1220 return ret; 1221 } 1222 1223 static void atmel_lcdfb_remove(struct platform_device *pdev) 1224 { 1225 struct device *dev = &pdev->dev; 1226 struct fb_info *info = dev_get_drvdata(dev); 1227 struct atmel_lcdfb_info *sinfo; 1228 1229 if (!info || !info->par) 1230 return; 1231 sinfo = info->par; 1232 1233 cancel_work_sync(&sinfo->task); 1234 exit_backlight(sinfo); 1235 atmel_lcdfb_power_control(sinfo, 0); 1236 unregister_framebuffer(info); 1237 atmel_lcdfb_stop_clock(sinfo); 1238 clk_put(sinfo->lcdc_clk); 1239 clk_put(sinfo->bus_clk); 1240 fb_dealloc_cmap(&info->cmap); 1241 free_irq(sinfo->irq_base, info); 1242 iounmap(sinfo->mmio); 1243 release_mem_region(info->fix.mmio_start, info->fix.mmio_len); 1244 if (platform_get_resource(pdev, IORESOURCE_MEM, 1)) { 1245 iounmap(info->screen_base); 1246 release_mem_region(info->fix.smem_start, info->fix.smem_len); 1247 } else { 1248 atmel_lcdfb_free_video_memory(sinfo); 1249 } 1250 1251 framebuffer_release(info); 1252 } 1253 1254 #ifdef CONFIG_PM 1255 1256 static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) 1257 { 1258 struct fb_info *info = platform_get_drvdata(pdev); 1259 struct atmel_lcdfb_info *sinfo = info->par; 1260 1261 /* 1262 * We don't want to handle interrupts while the clock is 1263 * stopped. It may take forever. 1264 */ 1265 lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0U); 1266 1267 sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_CTR); 1268 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); 1269 atmel_lcdfb_power_control(sinfo, 0); 1270 atmel_lcdfb_stop(sinfo); 1271 atmel_lcdfb_stop_clock(sinfo); 1272 1273 return 0; 1274 } 1275 1276 static int atmel_lcdfb_resume(struct platform_device *pdev) 1277 { 1278 struct fb_info *info = platform_get_drvdata(pdev); 1279 struct atmel_lcdfb_info *sinfo = info->par; 1280 1281 atmel_lcdfb_start_clock(sinfo); 1282 atmel_lcdfb_start(sinfo); 1283 atmel_lcdfb_power_control(sinfo, 1); 1284 lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); 1285 1286 /* Enable FIFO & DMA errors */ 1287 lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI 1288 | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); 1289 1290 return 0; 1291 } 1292 1293 #else 1294 #define atmel_lcdfb_suspend NULL 1295 #define atmel_lcdfb_resume NULL 1296 #endif 1297 1298 static struct platform_driver atmel_lcdfb_driver = { 1299 .probe = atmel_lcdfb_probe, 1300 .remove = atmel_lcdfb_remove, 1301 .suspend = atmel_lcdfb_suspend, 1302 .resume = atmel_lcdfb_resume, 1303 .driver = { 1304 .name = "atmel_lcdfb", 1305 .of_match_table = atmel_lcdfb_dt_ids, 1306 }, 1307 }; 1308 module_platform_driver(atmel_lcdfb_driver); 1309 1310 MODULE_DESCRIPTION("AT91 LCD Controller framebuffer driver"); 1311 MODULE_AUTHOR("Nicolas Ferre <nicolas.ferre@atmel.com>"); 1312 MODULE_LICENSE("GPL"); 1313