1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels 4 * 5 * Copyright (C) 2008 Marvell International Ltd. 6 * Eric Miao <eric.miao@marvell.com> 7 */ 8 9 #include <linux/module.h> 10 #include <linux/kernel.h> 11 #include <linux/init.h> 12 #include <linux/device.h> 13 #include <linux/spi/spi.h> 14 #include <linux/spi/tdo24m.h> 15 #include <linux/lcd.h> 16 #include <linux/slab.h> 17 18 #define POWER_IS_ON(pwr) ((pwr) <= LCD_POWER_REDUCED) 19 20 #define TDO24M_SPI_BUFF_SIZE (4) 21 #define MODE_QVGA 0 22 #define MODE_VGA 1 23 24 struct tdo24m { 25 struct spi_device *spi_dev; 26 struct lcd_device *lcd_dev; 27 28 struct spi_message msg; 29 struct spi_transfer xfer; 30 uint8_t *buf; 31 32 int (*adj_mode)(struct tdo24m *lcd, int mode); 33 int color_invert; 34 35 int power; 36 int mode; 37 }; 38 39 /* use bit 30, 31 as the indicator of command parameter number */ 40 #define CMD0(x) ((0 << 30) | (x)) 41 #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1)) 42 #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\ 43 ((x1) << 9) | 0x100 | (x2)) 44 #define CMD_NULL (-1) 45 46 static const uint32_t lcd_panel_reset[] = { 47 CMD0(0x1), /* reset */ 48 CMD0(0x0), /* nop */ 49 CMD0(0x0), /* nop */ 50 CMD0(0x0), /* nop */ 51 CMD_NULL, 52 }; 53 54 static const uint32_t lcd_panel_on[] = { 55 CMD0(0x29), /* Display ON */ 56 CMD2(0xB8, 0xFF, 0xF9), /* Output Control */ 57 CMD0(0x11), /* Sleep out */ 58 CMD1(0xB0, 0x16), /* Wake */ 59 CMD_NULL, 60 }; 61 62 static const uint32_t lcd_panel_off[] = { 63 CMD0(0x28), /* Display OFF */ 64 CMD2(0xB8, 0x80, 0x02), /* Output Control */ 65 CMD0(0x10), /* Sleep in */ 66 CMD1(0xB0, 0x00), /* Deep stand by in */ 67 CMD_NULL, 68 }; 69 70 static const uint32_t lcd_vga_pass_through_tdo24m[] = { 71 CMD1(0xB0, 0x16), 72 CMD1(0xBC, 0x80), 73 CMD1(0xE1, 0x00), 74 CMD1(0x36, 0x50), 75 CMD1(0x3B, 0x00), 76 CMD_NULL, 77 }; 78 79 static const uint32_t lcd_qvga_pass_through_tdo24m[] = { 80 CMD1(0xB0, 0x16), 81 CMD1(0xBC, 0x81), 82 CMD1(0xE1, 0x00), 83 CMD1(0x36, 0x50), 84 CMD1(0x3B, 0x22), 85 CMD_NULL, 86 }; 87 88 static const uint32_t lcd_vga_transfer_tdo24m[] = { 89 CMD1(0xcf, 0x02), /* Blanking period control (1) */ 90 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ 91 CMD1(0xd1, 0x01), /* CKV timing control on/off */ 92 CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */ 93 CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */ 94 CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */ 95 CMD1(0xd5, 0x14), /* ASW timing control (2) */ 96 CMD0(0x21), /* Invert for normally black display */ 97 CMD0(0x29), /* Display on */ 98 CMD_NULL, 99 }; 100 101 static const uint32_t lcd_qvga_transfer[] = { 102 CMD1(0xd6, 0x02), /* Blanking period control (1) */ 103 CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */ 104 CMD1(0xd8, 0x01), /* CKV timing control on/off */ 105 CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */ 106 CMD2(0xde, 0x05, 0x0a), /* OEV timing control */ 107 CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */ 108 CMD1(0xe0, 0x0a), /* ASW timing control (2) */ 109 CMD0(0x21), /* Invert for normally black display */ 110 CMD0(0x29), /* Display on */ 111 CMD_NULL, 112 }; 113 114 static const uint32_t lcd_vga_pass_through_tdo35s[] = { 115 CMD1(0xB0, 0x16), 116 CMD1(0xBC, 0x80), 117 CMD1(0xE1, 0x00), 118 CMD1(0x3B, 0x00), 119 CMD_NULL, 120 }; 121 122 static const uint32_t lcd_qvga_pass_through_tdo35s[] = { 123 CMD1(0xB0, 0x16), 124 CMD1(0xBC, 0x81), 125 CMD1(0xE1, 0x00), 126 CMD1(0x3B, 0x22), 127 CMD_NULL, 128 }; 129 130 static const uint32_t lcd_vga_transfer_tdo35s[] = { 131 CMD1(0xcf, 0x02), /* Blanking period control (1) */ 132 CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */ 133 CMD1(0xd1, 0x01), /* CKV timing control on/off */ 134 CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */ 135 CMD2(0xd3, 0x14, 0x28), /* OEV timing control */ 136 CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */ 137 CMD1(0xd5, 0x28), /* ASW timing control (2) */ 138 CMD0(0x21), /* Invert for normally black display */ 139 CMD0(0x29), /* Display on */ 140 CMD_NULL, 141 }; 142 143 static const uint32_t lcd_panel_config[] = { 144 CMD2(0xb8, 0xff, 0xf9), /* Output control */ 145 CMD0(0x11), /* sleep out */ 146 CMD1(0xba, 0x01), /* Display mode (1) */ 147 CMD1(0xbb, 0x00), /* Display mode (2) */ 148 CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */ 149 CMD1(0xbf, 0x10), /* Drive system change control */ 150 CMD1(0xb1, 0x56), /* Booster operation setup */ 151 CMD1(0xb2, 0x33), /* Booster mode setup */ 152 CMD1(0xb3, 0x11), /* Booster frequency setup */ 153 CMD1(0xb4, 0x02), /* Op amp/system clock */ 154 CMD1(0xb5, 0x35), /* VCS voltage */ 155 CMD1(0xb6, 0x40), /* VCOM voltage */ 156 CMD1(0xb7, 0x03), /* External display signal */ 157 CMD1(0xbd, 0x00), /* ASW slew rate */ 158 CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */ 159 CMD1(0xc0, 0x11), /* Sleep out FR count (A) */ 160 CMD1(0xc1, 0x11), /* Sleep out FR count (B) */ 161 CMD1(0xc2, 0x11), /* Sleep out FR count (C) */ 162 CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */ 163 CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */ 164 CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */ 165 CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */ 166 CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */ 167 CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */ 168 CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */ 169 CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */ 170 CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */ 171 CMD_NULL, 172 }; 173 174 static int tdo24m_writes(struct tdo24m *lcd, const uint32_t *array) 175 { 176 struct spi_transfer *x = &lcd->xfer; 177 const uint32_t *p = array; 178 uint32_t data; 179 int nparams, err = 0; 180 181 for (; *p != CMD_NULL; p++) { 182 if (!lcd->color_invert && *p == CMD0(0x21)) 183 continue; 184 185 nparams = (*p >> 30) & 0x3; 186 187 data = *p << (7 - nparams); 188 switch (nparams) { 189 case 0: 190 lcd->buf[0] = (data >> 8) & 0xff; 191 lcd->buf[1] = data & 0xff; 192 break; 193 case 1: 194 lcd->buf[0] = (data >> 16) & 0xff; 195 lcd->buf[1] = (data >> 8) & 0xff; 196 lcd->buf[2] = data & 0xff; 197 break; 198 case 2: 199 lcd->buf[0] = (data >> 24) & 0xff; 200 lcd->buf[1] = (data >> 16) & 0xff; 201 lcd->buf[2] = (data >> 8) & 0xff; 202 lcd->buf[3] = data & 0xff; 203 break; 204 default: 205 continue; 206 } 207 x->len = nparams + 2; 208 err = spi_sync(lcd->spi_dev, &lcd->msg); 209 if (err) 210 break; 211 } 212 213 return err; 214 } 215 216 static int tdo24m_adj_mode(struct tdo24m *lcd, int mode) 217 { 218 switch (mode) { 219 case MODE_VGA: 220 tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m); 221 tdo24m_writes(lcd, lcd_panel_config); 222 tdo24m_writes(lcd, lcd_vga_transfer_tdo24m); 223 break; 224 case MODE_QVGA: 225 tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m); 226 tdo24m_writes(lcd, lcd_panel_config); 227 tdo24m_writes(lcd, lcd_qvga_transfer); 228 break; 229 default: 230 return -EINVAL; 231 } 232 233 lcd->mode = mode; 234 return 0; 235 } 236 237 static int tdo35s_adj_mode(struct tdo24m *lcd, int mode) 238 { 239 switch (mode) { 240 case MODE_VGA: 241 tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s); 242 tdo24m_writes(lcd, lcd_panel_config); 243 tdo24m_writes(lcd, lcd_vga_transfer_tdo35s); 244 break; 245 case MODE_QVGA: 246 tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s); 247 tdo24m_writes(lcd, lcd_panel_config); 248 tdo24m_writes(lcd, lcd_qvga_transfer); 249 break; 250 default: 251 return -EINVAL; 252 } 253 254 lcd->mode = mode; 255 return 0; 256 } 257 258 static int tdo24m_power_on(struct tdo24m *lcd) 259 { 260 int err; 261 262 err = tdo24m_writes(lcd, lcd_panel_on); 263 if (err) 264 goto out; 265 266 err = tdo24m_writes(lcd, lcd_panel_reset); 267 if (err) 268 goto out; 269 270 err = lcd->adj_mode(lcd, lcd->mode); 271 out: 272 return err; 273 } 274 275 static int tdo24m_power_off(struct tdo24m *lcd) 276 { 277 return tdo24m_writes(lcd, lcd_panel_off); 278 } 279 280 static int tdo24m_power(struct tdo24m *lcd, int power) 281 { 282 int ret = 0; 283 284 if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power)) 285 ret = tdo24m_power_on(lcd); 286 else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power)) 287 ret = tdo24m_power_off(lcd); 288 289 if (!ret) 290 lcd->power = power; 291 292 return ret; 293 } 294 295 296 static int tdo24m_set_power(struct lcd_device *ld, int power) 297 { 298 struct tdo24m *lcd = lcd_get_data(ld); 299 300 return tdo24m_power(lcd, power); 301 } 302 303 static int tdo24m_get_power(struct lcd_device *ld) 304 { 305 struct tdo24m *lcd = lcd_get_data(ld); 306 307 return lcd->power; 308 } 309 310 static int tdo24m_set_mode(struct lcd_device *ld, u32 xres, u32 yres) 311 { 312 struct tdo24m *lcd = lcd_get_data(ld); 313 int mode = MODE_QVGA; 314 315 if (xres == 640 || xres == 480) 316 mode = MODE_VGA; 317 318 if (lcd->mode == mode) 319 return 0; 320 321 return lcd->adj_mode(lcd, mode); 322 } 323 324 static const struct lcd_ops tdo24m_ops = { 325 .get_power = tdo24m_get_power, 326 .set_power = tdo24m_set_power, 327 .set_mode = tdo24m_set_mode, 328 }; 329 330 static int tdo24m_probe(struct spi_device *spi) 331 { 332 struct tdo24m *lcd; 333 struct spi_message *m; 334 struct spi_transfer *x; 335 struct tdo24m_platform_data *pdata; 336 enum tdo24m_model model; 337 int err; 338 339 pdata = dev_get_platdata(&spi->dev); 340 if (pdata) 341 model = pdata->model; 342 else 343 model = TDO24M; 344 345 spi->bits_per_word = 8; 346 spi->mode = SPI_MODE_3; 347 err = spi_setup(spi); 348 if (err) 349 return err; 350 351 lcd = devm_kzalloc(&spi->dev, sizeof(struct tdo24m), GFP_KERNEL); 352 if (!lcd) 353 return -ENOMEM; 354 355 lcd->spi_dev = spi; 356 lcd->power = LCD_POWER_OFF; 357 lcd->mode = MODE_VGA; /* default to VGA */ 358 359 lcd->buf = devm_kzalloc(&spi->dev, TDO24M_SPI_BUFF_SIZE, GFP_KERNEL); 360 if (lcd->buf == NULL) 361 return -ENOMEM; 362 363 m = &lcd->msg; 364 x = &lcd->xfer; 365 366 spi_message_init(m); 367 368 x->cs_change = 0; 369 x->tx_buf = &lcd->buf[0]; 370 spi_message_add_tail(x, m); 371 372 switch (model) { 373 case TDO24M: 374 lcd->color_invert = 1; 375 lcd->adj_mode = tdo24m_adj_mode; 376 break; 377 case TDO35S: 378 lcd->adj_mode = tdo35s_adj_mode; 379 lcd->color_invert = 0; 380 break; 381 default: 382 dev_err(&spi->dev, "Unsupported model"); 383 return -EINVAL; 384 } 385 386 lcd->lcd_dev = devm_lcd_device_register(&spi->dev, "tdo24m", &spi->dev, 387 lcd, &tdo24m_ops); 388 if (IS_ERR(lcd->lcd_dev)) 389 return PTR_ERR(lcd->lcd_dev); 390 391 spi_set_drvdata(spi, lcd); 392 err = tdo24m_power(lcd, LCD_POWER_ON); 393 if (err) 394 return err; 395 396 return 0; 397 } 398 399 static void tdo24m_remove(struct spi_device *spi) 400 { 401 struct tdo24m *lcd = spi_get_drvdata(spi); 402 403 tdo24m_power(lcd, LCD_POWER_OFF); 404 } 405 406 #ifdef CONFIG_PM_SLEEP 407 static int tdo24m_suspend(struct device *dev) 408 { 409 struct tdo24m *lcd = dev_get_drvdata(dev); 410 411 return tdo24m_power(lcd, LCD_POWER_OFF); 412 } 413 414 static int tdo24m_resume(struct device *dev) 415 { 416 struct tdo24m *lcd = dev_get_drvdata(dev); 417 418 return tdo24m_power(lcd, LCD_POWER_ON); 419 } 420 #endif 421 422 static SIMPLE_DEV_PM_OPS(tdo24m_pm_ops, tdo24m_suspend, tdo24m_resume); 423 424 /* Power down all displays on reboot, poweroff or halt */ 425 static void tdo24m_shutdown(struct spi_device *spi) 426 { 427 struct tdo24m *lcd = spi_get_drvdata(spi); 428 429 tdo24m_power(lcd, LCD_POWER_OFF); 430 } 431 432 static struct spi_driver tdo24m_driver = { 433 .driver = { 434 .name = "tdo24m", 435 .pm = &tdo24m_pm_ops, 436 }, 437 .probe = tdo24m_probe, 438 .remove = tdo24m_remove, 439 .shutdown = tdo24m_shutdown, 440 }; 441 442 module_spi_driver(tdo24m_driver); 443 444 MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>"); 445 MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel"); 446 MODULE_LICENSE("GPL"); 447 MODULE_ALIAS("spi:tdo24m"); 448