1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * VFIO platform driver specialized for AMD xgbe reset 4 * reset code is inherited from AMD xgbe native driver 5 * 6 * Copyright (c) 2015 Linaro Ltd. 7 * www.linaro.org 8 */ 9 10 #include <linux/module.h> 11 #include <linux/kernel.h> 12 #include <linux/init.h> 13 #include <linux/io.h> 14 #include <uapi/linux/mdio.h> 15 #include <linux/delay.h> 16 17 #include "../vfio_platform_private.h" 18 19 #define DMA_MR 0x3000 20 #define MAC_VR 0x0110 21 #define DMA_ISR 0x3008 22 #define MAC_ISR 0x00b0 23 #define PCS_MMD_SELECT 0xff 24 #define MDIO_AN_INT 0x8002 25 #define MDIO_AN_INTMASK 0x8001 26 27 static unsigned int xmdio_read(void __iomem *ioaddr, unsigned int mmd, 28 unsigned int reg) 29 { 30 unsigned int mmd_address, value; 31 32 mmd_address = (mmd << 16) | ((reg) & 0xffff); 33 iowrite32(mmd_address >> 8, ioaddr + (PCS_MMD_SELECT << 2)); 34 value = ioread32(ioaddr + ((mmd_address & 0xff) << 2)); 35 return value; 36 } 37 38 static void xmdio_write(void __iomem *ioaddr, unsigned int mmd, 39 unsigned int reg, unsigned int value) 40 { 41 unsigned int mmd_address; 42 43 mmd_address = (mmd << 16) | ((reg) & 0xffff); 44 iowrite32(mmd_address >> 8, ioaddr + (PCS_MMD_SELECT << 2)); 45 iowrite32(value, ioaddr + ((mmd_address & 0xff) << 2)); 46 } 47 48 static int vfio_platform_amdxgbe_reset(struct vfio_platform_device *vdev) 49 { 50 struct vfio_platform_region *xgmac_regs = &vdev->regions[0]; 51 struct vfio_platform_region *xpcs_regs = &vdev->regions[1]; 52 u32 dma_mr_value, pcs_value, value; 53 unsigned int count; 54 55 dev_err_once(vdev->device, "DEPRECATION: VFIO AMD XGBE platform reset is deprecated and will be removed in a future kernel release\n"); 56 57 if (!xgmac_regs->ioaddr) { 58 xgmac_regs->ioaddr = 59 ioremap(xgmac_regs->addr, xgmac_regs->size); 60 if (!xgmac_regs->ioaddr) 61 return -ENOMEM; 62 } 63 if (!xpcs_regs->ioaddr) { 64 xpcs_regs->ioaddr = 65 ioremap(xpcs_regs->addr, xpcs_regs->size); 66 if (!xpcs_regs->ioaddr) 67 return -ENOMEM; 68 } 69 70 /* reset the PHY through MDIO*/ 71 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1); 72 pcs_value |= MDIO_CTRL1_RESET; 73 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_PCS, MDIO_CTRL1, pcs_value); 74 75 count = 50; 76 do { 77 msleep(20); 78 pcs_value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_PCS, 79 MDIO_CTRL1); 80 } while ((pcs_value & MDIO_CTRL1_RESET) && --count); 81 82 if (pcs_value & MDIO_CTRL1_RESET) 83 dev_warn(vdev->device, "%s: XGBE PHY reset timeout\n", 84 __func__); 85 86 /* disable auto-negotiation */ 87 value = xmdio_read(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1); 88 value &= ~MDIO_AN_CTRL1_ENABLE; 89 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_CTRL1, value); 90 91 /* disable AN IRQ */ 92 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_AN_INTMASK, 0); 93 94 /* clear AN IRQ */ 95 xmdio_write(xpcs_regs->ioaddr, MDIO_MMD_AN, MDIO_AN_INT, 0); 96 97 /* MAC software reset */ 98 dma_mr_value = ioread32(xgmac_regs->ioaddr + DMA_MR); 99 dma_mr_value |= 0x1; 100 iowrite32(dma_mr_value, xgmac_regs->ioaddr + DMA_MR); 101 102 usleep_range(10, 15); 103 104 count = 2000; 105 while (--count && (ioread32(xgmac_regs->ioaddr + DMA_MR) & 1)) 106 usleep_range(500, 600); 107 108 if (!count) 109 dev_warn(vdev->device, "%s: MAC SW reset failed\n", __func__); 110 111 return 0; 112 } 113 114 module_vfio_reset_handler("amd,xgbe-seattle-v1a", vfio_platform_amdxgbe_reset); 115 116 MODULE_VERSION("0.1"); 117 MODULE_LICENSE("GPL v2"); 118 MODULE_AUTHOR("Eric Auger <eric.auger@linaro.org>"); 119 MODULE_DESCRIPTION("Reset support for AMD xgbe vfio platform device"); 120