xref: /linux/drivers/vfio/pci/vfio_pci_intrs.c (revision d530531936482f97b7b3784793d3514185b820d4)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * VFIO PCI interrupt handling
4  *
5  * Copyright (C) 2012 Red Hat, Inc.  All rights reserved.
6  *     Author: Alex Williamson <alex.williamson@redhat.com>
7  *
8  * Derived from original vfio:
9  * Copyright 2010 Cisco Systems, Inc.  All rights reserved.
10  * Author: Tom Lyon, pugs@cisco.com
11  */
12 
13 #include <linux/device.h>
14 #include <linux/interrupt.h>
15 #include <linux/eventfd.h>
16 #include <linux/msi.h>
17 #include <linux/pci.h>
18 #include <linux/file.h>
19 #include <linux/vfio.h>
20 #include <linux/wait.h>
21 #include <linux/slab.h>
22 
23 #include "vfio_pci_priv.h"
24 
25 struct vfio_pci_irq_ctx {
26 	struct vfio_pci_core_device	*vdev;
27 	struct eventfd_ctx		*trigger;
28 	struct virqfd			*unmask;
29 	struct virqfd			*mask;
30 	char				*name;
31 	bool				masked;
32 	struct irq_bypass_producer	producer;
33 };
34 
35 static bool irq_is(struct vfio_pci_core_device *vdev, int type)
36 {
37 	return vdev->irq_type == type;
38 }
39 
40 static bool is_intx(struct vfio_pci_core_device *vdev)
41 {
42 	return vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX;
43 }
44 
45 static bool is_irq_none(struct vfio_pci_core_device *vdev)
46 {
47 	return !(vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX ||
48 		 vdev->irq_type == VFIO_PCI_MSI_IRQ_INDEX ||
49 		 vdev->irq_type == VFIO_PCI_MSIX_IRQ_INDEX);
50 }
51 
52 static
53 struct vfio_pci_irq_ctx *vfio_irq_ctx_get(struct vfio_pci_core_device *vdev,
54 					  unsigned long index)
55 {
56 	return xa_load(&vdev->ctx, index);
57 }
58 
59 static void vfio_irq_ctx_free(struct vfio_pci_core_device *vdev,
60 			      struct vfio_pci_irq_ctx *ctx, unsigned long index)
61 {
62 	xa_erase(&vdev->ctx, index);
63 	kfree(ctx);
64 }
65 
66 static struct vfio_pci_irq_ctx *
67 vfio_irq_ctx_alloc(struct vfio_pci_core_device *vdev, unsigned long index)
68 {
69 	struct vfio_pci_irq_ctx *ctx;
70 	int ret;
71 
72 	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL_ACCOUNT);
73 	if (!ctx)
74 		return NULL;
75 
76 	ret = xa_insert(&vdev->ctx, index, ctx, GFP_KERNEL_ACCOUNT);
77 	if (ret) {
78 		kfree(ctx);
79 		return NULL;
80 	}
81 
82 	return ctx;
83 }
84 
85 /*
86  * INTx
87  */
88 static void vfio_send_intx_eventfd(void *opaque, void *data)
89 {
90 	struct vfio_pci_core_device *vdev = opaque;
91 
92 	if (likely(is_intx(vdev) && !vdev->virq_disabled)) {
93 		struct vfio_pci_irq_ctx *ctx = data;
94 		struct eventfd_ctx *trigger = READ_ONCE(ctx->trigger);
95 
96 		if (likely(trigger))
97 			eventfd_signal(trigger);
98 	}
99 }
100 
101 /* Returns true if the INTx vfio_pci_irq_ctx.masked value is changed. */
102 static bool __vfio_pci_intx_mask(struct vfio_pci_core_device *vdev)
103 {
104 	struct pci_dev *pdev = vdev->pdev;
105 	struct vfio_pci_irq_ctx *ctx;
106 	unsigned long flags;
107 	bool masked_changed = false;
108 
109 	lockdep_assert_held(&vdev->igate);
110 
111 	spin_lock_irqsave(&vdev->irqlock, flags);
112 
113 	/*
114 	 * Masking can come from interrupt, ioctl, or config space
115 	 * via INTx disable.  The latter means this can get called
116 	 * even when not using intx delivery.  In this case, just
117 	 * try to have the physical bit follow the virtual bit.
118 	 */
119 	if (unlikely(!is_intx(vdev))) {
120 		if (vdev->pci_2_3)
121 			pci_intx(pdev, 0);
122 		goto out_unlock;
123 	}
124 
125 	ctx = vfio_irq_ctx_get(vdev, 0);
126 	if (WARN_ON_ONCE(!ctx))
127 		goto out_unlock;
128 
129 	if (!ctx->masked) {
130 		/*
131 		 * Can't use check_and_mask here because we always want to
132 		 * mask, not just when something is pending.
133 		 */
134 		if (vdev->pci_2_3)
135 			pci_intx(pdev, 0);
136 		else
137 			disable_irq_nosync(pdev->irq);
138 
139 		ctx->masked = true;
140 		masked_changed = true;
141 	}
142 
143 out_unlock:
144 	spin_unlock_irqrestore(&vdev->irqlock, flags);
145 	return masked_changed;
146 }
147 
148 bool vfio_pci_intx_mask(struct vfio_pci_core_device *vdev)
149 {
150 	bool mask_changed;
151 
152 	mutex_lock(&vdev->igate);
153 	mask_changed = __vfio_pci_intx_mask(vdev);
154 	mutex_unlock(&vdev->igate);
155 
156 	return mask_changed;
157 }
158 
159 /*
160  * If this is triggered by an eventfd, we can't call eventfd_signal
161  * or else we'll deadlock on the eventfd wait queue.  Return >0 when
162  * a signal is necessary, which can then be handled via a work queue
163  * or directly depending on the caller.
164  */
165 static int vfio_pci_intx_unmask_handler(void *opaque, void *data)
166 {
167 	struct vfio_pci_core_device *vdev = opaque;
168 	struct pci_dev *pdev = vdev->pdev;
169 	struct vfio_pci_irq_ctx *ctx = data;
170 	unsigned long flags;
171 	int ret = 0;
172 
173 	spin_lock_irqsave(&vdev->irqlock, flags);
174 
175 	/*
176 	 * Unmasking comes from ioctl or config, so again, have the
177 	 * physical bit follow the virtual even when not using INTx.
178 	 */
179 	if (unlikely(!is_intx(vdev))) {
180 		if (vdev->pci_2_3)
181 			pci_intx(pdev, 1);
182 		goto out_unlock;
183 	}
184 
185 	if (ctx->masked && !vdev->virq_disabled) {
186 		/*
187 		 * A pending interrupt here would immediately trigger,
188 		 * but we can avoid that overhead by just re-sending
189 		 * the interrupt to the user.
190 		 */
191 		if (vdev->pci_2_3) {
192 			if (!pci_check_and_unmask_intx(pdev))
193 				ret = 1;
194 		} else
195 			enable_irq(pdev->irq);
196 
197 		ctx->masked = (ret > 0);
198 	}
199 
200 out_unlock:
201 	spin_unlock_irqrestore(&vdev->irqlock, flags);
202 
203 	return ret;
204 }
205 
206 static void __vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev)
207 {
208 	struct vfio_pci_irq_ctx *ctx = vfio_irq_ctx_get(vdev, 0);
209 
210 	lockdep_assert_held(&vdev->igate);
211 
212 	if (vfio_pci_intx_unmask_handler(vdev, ctx) > 0)
213 		vfio_send_intx_eventfd(vdev, ctx);
214 }
215 
216 void vfio_pci_intx_unmask(struct vfio_pci_core_device *vdev)
217 {
218 	mutex_lock(&vdev->igate);
219 	__vfio_pci_intx_unmask(vdev);
220 	mutex_unlock(&vdev->igate);
221 }
222 
223 static irqreturn_t vfio_intx_handler(int irq, void *dev_id)
224 {
225 	struct vfio_pci_irq_ctx *ctx = dev_id;
226 	struct vfio_pci_core_device *vdev = ctx->vdev;
227 	unsigned long flags;
228 	int ret = IRQ_NONE;
229 
230 	spin_lock_irqsave(&vdev->irqlock, flags);
231 
232 	if (!vdev->pci_2_3) {
233 		disable_irq_nosync(vdev->pdev->irq);
234 		ctx->masked = true;
235 		ret = IRQ_HANDLED;
236 	} else if (!ctx->masked &&  /* may be shared */
237 		   pci_check_and_mask_intx(vdev->pdev)) {
238 		ctx->masked = true;
239 		ret = IRQ_HANDLED;
240 	}
241 
242 	spin_unlock_irqrestore(&vdev->irqlock, flags);
243 
244 	if (ret == IRQ_HANDLED)
245 		vfio_send_intx_eventfd(vdev, ctx);
246 
247 	return ret;
248 }
249 
250 static int vfio_intx_enable(struct vfio_pci_core_device *vdev,
251 			    struct eventfd_ctx *trigger)
252 {
253 	struct pci_dev *pdev = vdev->pdev;
254 	struct vfio_pci_irq_ctx *ctx;
255 	unsigned long irqflags;
256 	char *name;
257 	int ret;
258 
259 	if (!is_irq_none(vdev))
260 		return -EINVAL;
261 
262 	if (!pdev->irq)
263 		return -ENODEV;
264 
265 	name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-intx(%s)", pci_name(pdev));
266 	if (!name)
267 		return -ENOMEM;
268 
269 	ctx = vfio_irq_ctx_alloc(vdev, 0);
270 	if (!ctx)
271 		return -ENOMEM;
272 
273 	ctx->name = name;
274 	ctx->trigger = trigger;
275 	ctx->vdev = vdev;
276 
277 	/*
278 	 * Fill the initial masked state based on virq_disabled.  After
279 	 * enable, changing the DisINTx bit in vconfig directly changes INTx
280 	 * masking.  igate prevents races during setup, once running masked
281 	 * is protected via irqlock.
282 	 *
283 	 * Devices supporting DisINTx also reflect the current mask state in
284 	 * the physical DisINTx bit, which is not affected during IRQ setup.
285 	 *
286 	 * Devices without DisINTx support require an exclusive interrupt.
287 	 * IRQ masking is performed at the IRQ chip.  Again, igate protects
288 	 * against races during setup and IRQ handlers and irqfds are not
289 	 * yet active, therefore masked is stable and can be used to
290 	 * conditionally auto-enable the IRQ.
291 	 *
292 	 * irq_type must be stable while the IRQ handler is registered,
293 	 * therefore it must be set before request_irq().
294 	 */
295 	ctx->masked = vdev->virq_disabled;
296 	if (vdev->pci_2_3) {
297 		pci_intx(pdev, !ctx->masked);
298 		irqflags = IRQF_SHARED;
299 	} else {
300 		irqflags = ctx->masked ? IRQF_NO_AUTOEN : 0;
301 	}
302 
303 	vdev->irq_type = VFIO_PCI_INTX_IRQ_INDEX;
304 
305 	ret = request_irq(pdev->irq, vfio_intx_handler,
306 			  irqflags, ctx->name, ctx);
307 	if (ret) {
308 		vdev->irq_type = VFIO_PCI_NUM_IRQS;
309 		kfree(name);
310 		vfio_irq_ctx_free(vdev, ctx, 0);
311 		return ret;
312 	}
313 
314 	return 0;
315 }
316 
317 static int vfio_intx_set_signal(struct vfio_pci_core_device *vdev,
318 				struct eventfd_ctx *trigger)
319 {
320 	struct pci_dev *pdev = vdev->pdev;
321 	struct vfio_pci_irq_ctx *ctx;
322 	struct eventfd_ctx *old;
323 
324 	ctx = vfio_irq_ctx_get(vdev, 0);
325 	if (WARN_ON_ONCE(!ctx))
326 		return -EINVAL;
327 
328 	old = ctx->trigger;
329 
330 	WRITE_ONCE(ctx->trigger, trigger);
331 
332 	/* Releasing an old ctx requires synchronizing in-flight users */
333 	if (old) {
334 		synchronize_irq(pdev->irq);
335 		vfio_virqfd_flush_thread(&ctx->unmask);
336 		eventfd_ctx_put(old);
337 	}
338 
339 	return 0;
340 }
341 
342 static void vfio_intx_disable(struct vfio_pci_core_device *vdev)
343 {
344 	struct pci_dev *pdev = vdev->pdev;
345 	struct vfio_pci_irq_ctx *ctx;
346 
347 	ctx = vfio_irq_ctx_get(vdev, 0);
348 	WARN_ON_ONCE(!ctx);
349 	if (ctx) {
350 		vfio_virqfd_disable(&ctx->unmask);
351 		vfio_virqfd_disable(&ctx->mask);
352 		free_irq(pdev->irq, ctx);
353 		if (ctx->trigger)
354 			eventfd_ctx_put(ctx->trigger);
355 		kfree(ctx->name);
356 		vfio_irq_ctx_free(vdev, ctx, 0);
357 	}
358 	vdev->irq_type = VFIO_PCI_NUM_IRQS;
359 }
360 
361 /*
362  * MSI/MSI-X
363  */
364 static irqreturn_t vfio_msihandler(int irq, void *arg)
365 {
366 	struct eventfd_ctx *trigger = arg;
367 
368 	eventfd_signal(trigger);
369 	return IRQ_HANDLED;
370 }
371 
372 static int vfio_msi_enable(struct vfio_pci_core_device *vdev, int nvec, bool msix)
373 {
374 	struct pci_dev *pdev = vdev->pdev;
375 	unsigned int flag = msix ? PCI_IRQ_MSIX : PCI_IRQ_MSI;
376 	int ret;
377 	u16 cmd;
378 
379 	if (!is_irq_none(vdev))
380 		return -EINVAL;
381 
382 	/* return the number of supported vectors if we can't get all: */
383 	cmd = vfio_pci_memory_lock_and_enable(vdev);
384 	ret = pci_alloc_irq_vectors(pdev, 1, nvec, flag);
385 	if (ret < nvec) {
386 		if (ret > 0)
387 			pci_free_irq_vectors(pdev);
388 		vfio_pci_memory_unlock_and_restore(vdev, cmd);
389 		return ret;
390 	}
391 	vfio_pci_memory_unlock_and_restore(vdev, cmd);
392 
393 	vdev->irq_type = msix ? VFIO_PCI_MSIX_IRQ_INDEX :
394 				VFIO_PCI_MSI_IRQ_INDEX;
395 
396 	if (!msix) {
397 		/*
398 		 * Compute the virtual hardware field for max msi vectors -
399 		 * it is the log base 2 of the number of vectors.
400 		 */
401 		vdev->msi_qmax = fls(nvec * 2 - 1) - 1;
402 	}
403 
404 	return 0;
405 }
406 
407 /*
408  * vfio_msi_alloc_irq() returns the Linux IRQ number of an MSI or MSI-X device
409  * interrupt vector. If a Linux IRQ number is not available then a new
410  * interrupt is allocated if dynamic MSI-X is supported.
411  *
412  * Where is vfio_msi_free_irq()? Allocated interrupts are maintained,
413  * essentially forming a cache that subsequent allocations can draw from.
414  * Interrupts are freed using pci_free_irq_vectors() when MSI/MSI-X is
415  * disabled.
416  */
417 static int vfio_msi_alloc_irq(struct vfio_pci_core_device *vdev,
418 			      unsigned int vector, bool msix)
419 {
420 	struct pci_dev *pdev = vdev->pdev;
421 	struct msi_map map;
422 	int irq;
423 	u16 cmd;
424 
425 	irq = pci_irq_vector(pdev, vector);
426 	if (WARN_ON_ONCE(irq == 0))
427 		return -EINVAL;
428 	if (irq > 0 || !msix || !vdev->has_dyn_msix)
429 		return irq;
430 
431 	cmd = vfio_pci_memory_lock_and_enable(vdev);
432 	map = pci_msix_alloc_irq_at(pdev, vector, NULL);
433 	vfio_pci_memory_unlock_and_restore(vdev, cmd);
434 
435 	return map.index < 0 ? map.index : map.virq;
436 }
437 
438 static int vfio_msi_set_vector_signal(struct vfio_pci_core_device *vdev,
439 				      unsigned int vector, int fd, bool msix)
440 {
441 	struct pci_dev *pdev = vdev->pdev;
442 	struct vfio_pci_irq_ctx *ctx;
443 	struct eventfd_ctx *trigger;
444 	int irq = -EINVAL, ret;
445 	u16 cmd;
446 
447 	ctx = vfio_irq_ctx_get(vdev, vector);
448 
449 	if (ctx) {
450 		irq_bypass_unregister_producer(&ctx->producer);
451 		irq = pci_irq_vector(pdev, vector);
452 		cmd = vfio_pci_memory_lock_and_enable(vdev);
453 		free_irq(irq, ctx->trigger);
454 		vfio_pci_memory_unlock_and_restore(vdev, cmd);
455 		/* Interrupt stays allocated, will be freed at MSI-X disable. */
456 		kfree(ctx->name);
457 		eventfd_ctx_put(ctx->trigger);
458 		vfio_irq_ctx_free(vdev, ctx, vector);
459 	}
460 
461 	if (fd < 0)
462 		return 0;
463 
464 	if (irq == -EINVAL) {
465 		/* Interrupt stays allocated, will be freed at MSI-X disable. */
466 		irq = vfio_msi_alloc_irq(vdev, vector, msix);
467 		if (irq < 0)
468 			return irq;
469 	}
470 
471 	ctx = vfio_irq_ctx_alloc(vdev, vector);
472 	if (!ctx)
473 		return -ENOMEM;
474 
475 	ctx->name = kasprintf(GFP_KERNEL_ACCOUNT, "vfio-msi%s[%d](%s)",
476 			      msix ? "x" : "", vector, pci_name(pdev));
477 	if (!ctx->name) {
478 		ret = -ENOMEM;
479 		goto out_free_ctx;
480 	}
481 
482 	trigger = eventfd_ctx_fdget(fd);
483 	if (IS_ERR(trigger)) {
484 		ret = PTR_ERR(trigger);
485 		goto out_free_name;
486 	}
487 
488 	/*
489 	 * If the vector was previously allocated, refresh the on-device
490 	 * message data before enabling in case it had been cleared or
491 	 * corrupted (e.g. due to backdoor resets) since writing.
492 	 */
493 	cmd = vfio_pci_memory_lock_and_enable(vdev);
494 	if (msix) {
495 		struct msi_msg msg;
496 
497 		get_cached_msi_msg(irq, &msg);
498 		pci_write_msi_msg(irq, &msg);
499 	}
500 
501 	ret = request_irq(irq, vfio_msihandler, 0, ctx->name, trigger);
502 	vfio_pci_memory_unlock_and_restore(vdev, cmd);
503 	if (ret)
504 		goto out_put_eventfd_ctx;
505 
506 	ctx->producer.token = trigger;
507 	ctx->producer.irq = irq;
508 	ret = irq_bypass_register_producer(&ctx->producer);
509 	if (unlikely(ret)) {
510 		dev_info(&pdev->dev,
511 		"irq bypass producer (token %p) registration fails: %d\n",
512 		ctx->producer.token, ret);
513 
514 		ctx->producer.token = NULL;
515 	}
516 	ctx->trigger = trigger;
517 
518 	return 0;
519 
520 out_put_eventfd_ctx:
521 	eventfd_ctx_put(trigger);
522 out_free_name:
523 	kfree(ctx->name);
524 out_free_ctx:
525 	vfio_irq_ctx_free(vdev, ctx, vector);
526 	return ret;
527 }
528 
529 static int vfio_msi_set_block(struct vfio_pci_core_device *vdev, unsigned start,
530 			      unsigned count, int32_t *fds, bool msix)
531 {
532 	unsigned int i, j;
533 	int ret = 0;
534 
535 	for (i = 0, j = start; i < count && !ret; i++, j++) {
536 		int fd = fds ? fds[i] : -1;
537 		ret = vfio_msi_set_vector_signal(vdev, j, fd, msix);
538 	}
539 
540 	if (ret) {
541 		for (i = start; i < j; i++)
542 			vfio_msi_set_vector_signal(vdev, i, -1, msix);
543 	}
544 
545 	return ret;
546 }
547 
548 static void vfio_msi_disable(struct vfio_pci_core_device *vdev, bool msix)
549 {
550 	struct pci_dev *pdev = vdev->pdev;
551 	struct vfio_pci_irq_ctx *ctx;
552 	unsigned long i;
553 	u16 cmd;
554 
555 	xa_for_each(&vdev->ctx, i, ctx) {
556 		vfio_virqfd_disable(&ctx->unmask);
557 		vfio_virqfd_disable(&ctx->mask);
558 		vfio_msi_set_vector_signal(vdev, i, -1, msix);
559 	}
560 
561 	cmd = vfio_pci_memory_lock_and_enable(vdev);
562 	pci_free_irq_vectors(pdev);
563 	vfio_pci_memory_unlock_and_restore(vdev, cmd);
564 
565 	/*
566 	 * Both disable paths above use pci_intx_for_msi() to clear DisINTx
567 	 * via their shutdown paths.  Restore for NoINTx devices.
568 	 */
569 	if (vdev->nointx)
570 		pci_intx(pdev, 0);
571 
572 	vdev->irq_type = VFIO_PCI_NUM_IRQS;
573 }
574 
575 /*
576  * IOCTL support
577  */
578 static int vfio_pci_set_intx_unmask(struct vfio_pci_core_device *vdev,
579 				    unsigned index, unsigned start,
580 				    unsigned count, uint32_t flags, void *data)
581 {
582 	if (!is_intx(vdev) || start != 0 || count != 1)
583 		return -EINVAL;
584 
585 	if (flags & VFIO_IRQ_SET_DATA_NONE) {
586 		__vfio_pci_intx_unmask(vdev);
587 	} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
588 		uint8_t unmask = *(uint8_t *)data;
589 		if (unmask)
590 			__vfio_pci_intx_unmask(vdev);
591 	} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
592 		struct vfio_pci_irq_ctx *ctx = vfio_irq_ctx_get(vdev, 0);
593 		int32_t fd = *(int32_t *)data;
594 
595 		if (WARN_ON_ONCE(!ctx))
596 			return -EINVAL;
597 		if (fd >= 0)
598 			return vfio_virqfd_enable((void *) vdev,
599 						  vfio_pci_intx_unmask_handler,
600 						  vfio_send_intx_eventfd, ctx,
601 						  &ctx->unmask, fd);
602 
603 		vfio_virqfd_disable(&ctx->unmask);
604 	}
605 
606 	return 0;
607 }
608 
609 static int vfio_pci_set_intx_mask(struct vfio_pci_core_device *vdev,
610 				  unsigned index, unsigned start,
611 				  unsigned count, uint32_t flags, void *data)
612 {
613 	if (!is_intx(vdev) || start != 0 || count != 1)
614 		return -EINVAL;
615 
616 	if (flags & VFIO_IRQ_SET_DATA_NONE) {
617 		__vfio_pci_intx_mask(vdev);
618 	} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
619 		uint8_t mask = *(uint8_t *)data;
620 		if (mask)
621 			__vfio_pci_intx_mask(vdev);
622 	} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
623 		return -ENOTTY; /* XXX implement me */
624 	}
625 
626 	return 0;
627 }
628 
629 static int vfio_pci_set_intx_trigger(struct vfio_pci_core_device *vdev,
630 				     unsigned index, unsigned start,
631 				     unsigned count, uint32_t flags, void *data)
632 {
633 	if (is_intx(vdev) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
634 		vfio_intx_disable(vdev);
635 		return 0;
636 	}
637 
638 	if (!(is_intx(vdev) || is_irq_none(vdev)) || start != 0 || count != 1)
639 		return -EINVAL;
640 
641 	if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
642 		struct eventfd_ctx *trigger = NULL;
643 		int32_t fd = *(int32_t *)data;
644 		int ret;
645 
646 		if (fd >= 0) {
647 			trigger = eventfd_ctx_fdget(fd);
648 			if (IS_ERR(trigger))
649 				return PTR_ERR(trigger);
650 		}
651 
652 		if (is_intx(vdev))
653 			ret = vfio_intx_set_signal(vdev, trigger);
654 		else
655 			ret = vfio_intx_enable(vdev, trigger);
656 
657 		if (ret && trigger)
658 			eventfd_ctx_put(trigger);
659 
660 		return ret;
661 	}
662 
663 	if (!is_intx(vdev))
664 		return -EINVAL;
665 
666 	if (flags & VFIO_IRQ_SET_DATA_NONE) {
667 		vfio_send_intx_eventfd(vdev, vfio_irq_ctx_get(vdev, 0));
668 	} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
669 		uint8_t trigger = *(uint8_t *)data;
670 		if (trigger)
671 			vfio_send_intx_eventfd(vdev, vfio_irq_ctx_get(vdev, 0));
672 	}
673 	return 0;
674 }
675 
676 static int vfio_pci_set_msi_trigger(struct vfio_pci_core_device *vdev,
677 				    unsigned index, unsigned start,
678 				    unsigned count, uint32_t flags, void *data)
679 {
680 	struct vfio_pci_irq_ctx *ctx;
681 	unsigned int i;
682 	bool msix = (index == VFIO_PCI_MSIX_IRQ_INDEX) ? true : false;
683 
684 	if (irq_is(vdev, index) && !count && (flags & VFIO_IRQ_SET_DATA_NONE)) {
685 		vfio_msi_disable(vdev, msix);
686 		return 0;
687 	}
688 
689 	if (!(irq_is(vdev, index) || is_irq_none(vdev)))
690 		return -EINVAL;
691 
692 	if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
693 		int32_t *fds = data;
694 		int ret;
695 
696 		if (vdev->irq_type == index)
697 			return vfio_msi_set_block(vdev, start, count,
698 						  fds, msix);
699 
700 		ret = vfio_msi_enable(vdev, start + count, msix);
701 		if (ret)
702 			return ret;
703 
704 		ret = vfio_msi_set_block(vdev, start, count, fds, msix);
705 		if (ret)
706 			vfio_msi_disable(vdev, msix);
707 
708 		return ret;
709 	}
710 
711 	if (!irq_is(vdev, index))
712 		return -EINVAL;
713 
714 	for (i = start; i < start + count; i++) {
715 		ctx = vfio_irq_ctx_get(vdev, i);
716 		if (!ctx)
717 			continue;
718 		if (flags & VFIO_IRQ_SET_DATA_NONE) {
719 			eventfd_signal(ctx->trigger);
720 		} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
721 			uint8_t *bools = data;
722 			if (bools[i - start])
723 				eventfd_signal(ctx->trigger);
724 		}
725 	}
726 	return 0;
727 }
728 
729 static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
730 					   unsigned int count, uint32_t flags,
731 					   void *data)
732 {
733 	/* DATA_NONE/DATA_BOOL enables loopback testing */
734 	if (flags & VFIO_IRQ_SET_DATA_NONE) {
735 		if (*ctx) {
736 			if (count) {
737 				eventfd_signal(*ctx);
738 			} else {
739 				eventfd_ctx_put(*ctx);
740 				*ctx = NULL;
741 			}
742 			return 0;
743 		}
744 	} else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
745 		uint8_t trigger;
746 
747 		if (!count)
748 			return -EINVAL;
749 
750 		trigger = *(uint8_t *)data;
751 		if (trigger && *ctx)
752 			eventfd_signal(*ctx);
753 
754 		return 0;
755 	} else if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
756 		int32_t fd;
757 
758 		if (!count)
759 			return -EINVAL;
760 
761 		fd = *(int32_t *)data;
762 		if (fd == -1) {
763 			if (*ctx)
764 				eventfd_ctx_put(*ctx);
765 			*ctx = NULL;
766 		} else if (fd >= 0) {
767 			struct eventfd_ctx *efdctx;
768 
769 			efdctx = eventfd_ctx_fdget(fd);
770 			if (IS_ERR(efdctx))
771 				return PTR_ERR(efdctx);
772 
773 			if (*ctx)
774 				eventfd_ctx_put(*ctx);
775 
776 			*ctx = efdctx;
777 		}
778 		return 0;
779 	}
780 
781 	return -EINVAL;
782 }
783 
784 static int vfio_pci_set_err_trigger(struct vfio_pci_core_device *vdev,
785 				    unsigned index, unsigned start,
786 				    unsigned count, uint32_t flags, void *data)
787 {
788 	if (index != VFIO_PCI_ERR_IRQ_INDEX || start != 0 || count > 1)
789 		return -EINVAL;
790 
791 	return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger,
792 					       count, flags, data);
793 }
794 
795 static int vfio_pci_set_req_trigger(struct vfio_pci_core_device *vdev,
796 				    unsigned index, unsigned start,
797 				    unsigned count, uint32_t flags, void *data)
798 {
799 	if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count > 1)
800 		return -EINVAL;
801 
802 	return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger,
803 					       count, flags, data);
804 }
805 
806 int vfio_pci_set_irqs_ioctl(struct vfio_pci_core_device *vdev, uint32_t flags,
807 			    unsigned index, unsigned start, unsigned count,
808 			    void *data)
809 {
810 	int (*func)(struct vfio_pci_core_device *vdev, unsigned index,
811 		    unsigned start, unsigned count, uint32_t flags,
812 		    void *data) = NULL;
813 
814 	switch (index) {
815 	case VFIO_PCI_INTX_IRQ_INDEX:
816 		switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
817 		case VFIO_IRQ_SET_ACTION_MASK:
818 			func = vfio_pci_set_intx_mask;
819 			break;
820 		case VFIO_IRQ_SET_ACTION_UNMASK:
821 			func = vfio_pci_set_intx_unmask;
822 			break;
823 		case VFIO_IRQ_SET_ACTION_TRIGGER:
824 			func = vfio_pci_set_intx_trigger;
825 			break;
826 		}
827 		break;
828 	case VFIO_PCI_MSI_IRQ_INDEX:
829 	case VFIO_PCI_MSIX_IRQ_INDEX:
830 		switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
831 		case VFIO_IRQ_SET_ACTION_MASK:
832 		case VFIO_IRQ_SET_ACTION_UNMASK:
833 			/* XXX Need masking support exported */
834 			break;
835 		case VFIO_IRQ_SET_ACTION_TRIGGER:
836 			func = vfio_pci_set_msi_trigger;
837 			break;
838 		}
839 		break;
840 	case VFIO_PCI_ERR_IRQ_INDEX:
841 		switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
842 		case VFIO_IRQ_SET_ACTION_TRIGGER:
843 			if (pci_is_pcie(vdev->pdev))
844 				func = vfio_pci_set_err_trigger;
845 			break;
846 		}
847 		break;
848 	case VFIO_PCI_REQ_IRQ_INDEX:
849 		switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
850 		case VFIO_IRQ_SET_ACTION_TRIGGER:
851 			func = vfio_pci_set_req_trigger;
852 			break;
853 		}
854 		break;
855 	}
856 
857 	if (!func)
858 		return -ENOTTY;
859 
860 	return func(vdev, index, start, count, flags, data);
861 }
862