xref: /linux/drivers/usb/serial/whiteheat.h (revision 788a4ee607e8d138269fdba7c53f6f233b0e2e36)
1*788a4ee6SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0+ */
21da177e4SLinus Torvalds /*
31da177e4SLinus Torvalds  * USB ConnectTech WhiteHEAT driver
41da177e4SLinus Torvalds  *
51da177e4SLinus Torvalds  *      Copyright (C) 2002
61da177e4SLinus Torvalds  *          Connect Tech Inc.
71da177e4SLinus Torvalds  *
81da177e4SLinus Torvalds  *      Copyright (C) 1999, 2000
91da177e4SLinus Torvalds  *          Greg Kroah-Hartman (greg@kroah.com)
101da177e4SLinus Torvalds  *
11ecefae6dSMauro Carvalho Chehab  * See Documentation/usb/usb-serial.rst for more information on using this
1280359a9cSAlan Cox  * driver
131da177e4SLinus Torvalds  *
141da177e4SLinus Torvalds  */
151da177e4SLinus Torvalds 
161da177e4SLinus Torvalds #ifndef __LINUX_USB_SERIAL_WHITEHEAT_H
171da177e4SLinus Torvalds #define __LINUX_USB_SERIAL_WHITEHEAT_H
181da177e4SLinus Torvalds 
191da177e4SLinus Torvalds 
201da177e4SLinus Torvalds /* WhiteHEAT commands */
211da177e4SLinus Torvalds #define WHITEHEAT_OPEN			1	/* open the port */
221da177e4SLinus Torvalds #define WHITEHEAT_CLOSE			2	/* close the port */
231da177e4SLinus Torvalds #define WHITEHEAT_SETUP_PORT		3	/* change port settings */
241da177e4SLinus Torvalds #define WHITEHEAT_SET_RTS		4	/* turn RTS on or off */
251da177e4SLinus Torvalds #define WHITEHEAT_SET_DTR		5	/* turn DTR on or off */
261da177e4SLinus Torvalds #define WHITEHEAT_SET_BREAK		6	/* turn BREAK on or off */
271da177e4SLinus Torvalds #define WHITEHEAT_DUMP			7	/* dump memory */
281da177e4SLinus Torvalds #define WHITEHEAT_STATUS		8	/* get status */
291da177e4SLinus Torvalds #define WHITEHEAT_PURGE			9	/* clear the UART fifos */
3080359a9cSAlan Cox #define WHITEHEAT_GET_DTR_RTS		10	/* get the state of DTR and RTS
3180359a9cSAlan Cox 							for a port */
3280359a9cSAlan Cox #define WHITEHEAT_GET_HW_INFO		11	/* get EEPROM info and
3380359a9cSAlan Cox 							hardware ID */
341da177e4SLinus Torvalds #define WHITEHEAT_REPORT_TX_DONE	12	/* get the next TX done */
351da177e4SLinus Torvalds #define WHITEHEAT_EVENT			13	/* unsolicited status events */
3680359a9cSAlan Cox #define WHITEHEAT_ECHO			14	/* send data to the indicated
3780359a9cSAlan Cox 						   IN endpoint */
3880359a9cSAlan Cox #define WHITEHEAT_DO_TEST		15	/* perform specified test */
3980359a9cSAlan Cox #define WHITEHEAT_CMD_COMPLETE		16	/* reply for some commands */
401da177e4SLinus Torvalds #define WHITEHEAT_CMD_FAILURE		17	/* reply for failed commands */
411da177e4SLinus Torvalds 
421da177e4SLinus Torvalds 
431da177e4SLinus Torvalds /*
441da177e4SLinus Torvalds  * Commands to the firmware
451da177e4SLinus Torvalds  */
461da177e4SLinus Torvalds 
471da177e4SLinus Torvalds 
481da177e4SLinus Torvalds /*
491da177e4SLinus Torvalds  * WHITEHEAT_OPEN
501da177e4SLinus Torvalds  * WHITEHEAT_CLOSE
511da177e4SLinus Torvalds  * WHITEHEAT_STATUS
521da177e4SLinus Torvalds  * WHITEHEAT_GET_DTR_RTS
531da177e4SLinus Torvalds  * WHITEHEAT_REPORT_TX_DONE
541da177e4SLinus Torvalds */
551da177e4SLinus Torvalds struct whiteheat_simple {
561da177e4SLinus Torvalds 	__u8	port;	/* port number (1 to N) */
571da177e4SLinus Torvalds };
581da177e4SLinus Torvalds 
591da177e4SLinus Torvalds 
601da177e4SLinus Torvalds /*
611da177e4SLinus Torvalds  * WHITEHEAT_SETUP_PORT
621da177e4SLinus Torvalds  */
631da177e4SLinus Torvalds #define WHITEHEAT_PAR_NONE	'n'	/* no parity */
641da177e4SLinus Torvalds #define WHITEHEAT_PAR_EVEN	'e'	/* even parity */
651da177e4SLinus Torvalds #define WHITEHEAT_PAR_ODD	'o'	/* odd parity */
661da177e4SLinus Torvalds #define WHITEHEAT_PAR_SPACE	'0'	/* space (force 0) parity */
671da177e4SLinus Torvalds #define WHITEHEAT_PAR_MARK	'1'	/* mark (force 1) parity */
681da177e4SLinus Torvalds 
691da177e4SLinus Torvalds #define WHITEHEAT_SFLOW_NONE	'n'	/* no software flow control */
7080359a9cSAlan Cox #define WHITEHEAT_SFLOW_RX	'r'	/* XOFF/ON is sent when RX
7180359a9cSAlan Cox 					   fills/empties */
7280359a9cSAlan Cox #define WHITEHEAT_SFLOW_TX	't'	/* when received XOFF/ON will
7380359a9cSAlan Cox 					   stop/start TX */
741da177e4SLinus Torvalds #define WHITEHEAT_SFLOW_RXTX	'b'	/* both SFLOW_RX and SFLOW_TX */
751da177e4SLinus Torvalds 
761da177e4SLinus Torvalds #define WHITEHEAT_HFLOW_NONE		0x00	/* no hardware flow control */
7780359a9cSAlan Cox #define WHITEHEAT_HFLOW_RTS_TOGGLE	0x01	/* RTS is on during transmit,
7880359a9cSAlan Cox 						   off otherwise */
7980359a9cSAlan Cox #define WHITEHEAT_HFLOW_DTR		0x02	/* DTR is off/on when RX
8080359a9cSAlan Cox 						   fills/empties */
8180359a9cSAlan Cox #define WHITEHEAT_HFLOW_CTS		0x08	/* when received CTS off/on
8280359a9cSAlan Cox 						   will stop/start TX */
8380359a9cSAlan Cox #define WHITEHEAT_HFLOW_DSR		0x10	/* when received DSR off/on
8480359a9cSAlan Cox 						   will stop/start TX */
8580359a9cSAlan Cox #define WHITEHEAT_HFLOW_RTS		0x80	/* RTS is off/on when RX
8680359a9cSAlan Cox 						   fills/empties */
871da177e4SLinus Torvalds 
881da177e4SLinus Torvalds struct whiteheat_port_settings {
891da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
9084968291SJohan Hovold 	__le32	baud;		/* any value 7 - 460800, firmware calculates
9180359a9cSAlan Cox 				   best fit; arrives little endian */
921da177e4SLinus Torvalds 	__u8	bits;		/* 5, 6, 7, or 8 */
931da177e4SLinus Torvalds 	__u8	stop;		/* 1 or 2, default 1 (2 = 1.5 if bits = 5) */
941da177e4SLinus Torvalds 	__u8	parity;		/* see WHITEHEAT_PAR_* above */
951da177e4SLinus Torvalds 	__u8	sflow;		/* see WHITEHEAT_SFLOW_* above */
961da177e4SLinus Torvalds 	__u8	xoff;		/* XOFF byte value */
971da177e4SLinus Torvalds 	__u8	xon;		/* XON byte value */
981da177e4SLinus Torvalds 	__u8	hflow;		/* see WHITEHEAT_HFLOW_* above */
991da177e4SLinus Torvalds 	__u8	lloop;		/* 0/1 turns local loopback mode off/on */
1001da177e4SLinus Torvalds } __attribute__ ((packed));
1011da177e4SLinus Torvalds 
1021da177e4SLinus Torvalds 
1031da177e4SLinus Torvalds /*
1041da177e4SLinus Torvalds  * WHITEHEAT_SET_RTS
1051da177e4SLinus Torvalds  * WHITEHEAT_SET_DTR
1061da177e4SLinus Torvalds  * WHITEHEAT_SET_BREAK
1071da177e4SLinus Torvalds  */
1081da177e4SLinus Torvalds #define WHITEHEAT_RTS_OFF	0x00
1091da177e4SLinus Torvalds #define WHITEHEAT_RTS_ON	0x01
1101da177e4SLinus Torvalds #define WHITEHEAT_DTR_OFF	0x00
1111da177e4SLinus Torvalds #define WHITEHEAT_DTR_ON	0x01
1121da177e4SLinus Torvalds #define WHITEHEAT_BREAK_OFF	0x00
1131da177e4SLinus Torvalds #define WHITEHEAT_BREAK_ON	0x01
1141da177e4SLinus Torvalds 
1151da177e4SLinus Torvalds struct whiteheat_set_rdb {
1161da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
1171da177e4SLinus Torvalds 	__u8	state;		/* 0/1 turns signal off/on */
1181da177e4SLinus Torvalds };
1191da177e4SLinus Torvalds 
1201da177e4SLinus Torvalds 
1211da177e4SLinus Torvalds /*
1221da177e4SLinus Torvalds  * WHITEHEAT_DUMP
1231da177e4SLinus Torvalds  */
1241da177e4SLinus Torvalds #define WHITEHEAT_DUMP_MEM_DATA		'd'  /* data */
1251da177e4SLinus Torvalds #define WHITEHEAT_DUMP_MEM_IDATA	'i'  /* idata */
1261da177e4SLinus Torvalds #define WHITEHEAT_DUMP_MEM_BDATA	'b'  /* bdata */
1271da177e4SLinus Torvalds #define WHITEHEAT_DUMP_MEM_XDATA	'x'  /* xdata */
1281da177e4SLinus Torvalds 
1291da177e4SLinus Torvalds /*
1301da177e4SLinus Torvalds  * Allowable address ranges (firmware checks address):
1311da177e4SLinus Torvalds  * Type DATA:  0x00 - 0xff
1321da177e4SLinus Torvalds  * Type IDATA: 0x80 - 0xff
1331da177e4SLinus Torvalds  * Type BDATA: 0x20 - 0x2f
1341da177e4SLinus Torvalds  * Type XDATA: 0x0000 - 0xffff
1351da177e4SLinus Torvalds  *
1361da177e4SLinus Torvalds  * B/I/DATA all read the local memory space
1371da177e4SLinus Torvalds  * XDATA reads the external memory space
1381da177e4SLinus Torvalds  * BDATA returns bits as bytes
1391da177e4SLinus Torvalds  *
1401da177e4SLinus Torvalds  * NOTE: 0x80 - 0xff (local space) are the Special Function Registers
1411da177e4SLinus Torvalds  *       of the 8051, and some have on-read side-effects.
1421da177e4SLinus Torvalds  */
1431da177e4SLinus Torvalds 
1441da177e4SLinus Torvalds struct whiteheat_dump {
1451da177e4SLinus Torvalds 	__u8	mem_type;	/* see WHITEHEAT_DUMP_* above */
1461da177e4SLinus Torvalds 	__u16	addr;		/* address, see restrictions above */
1471da177e4SLinus Torvalds 	__u16	length;		/* number of bytes to dump, max 63 bytes */
1481da177e4SLinus Torvalds };
1491da177e4SLinus Torvalds 
1501da177e4SLinus Torvalds 
1511da177e4SLinus Torvalds /*
1521da177e4SLinus Torvalds  * WHITEHEAT_PURGE
1531da177e4SLinus Torvalds  */
1541da177e4SLinus Torvalds #define WHITEHEAT_PURGE_RX	0x01	/* purge rx fifos */
1551da177e4SLinus Torvalds #define WHITEHEAT_PURGE_TX	0x02	/* purge tx fifos */
1561da177e4SLinus Torvalds 
1571da177e4SLinus Torvalds struct whiteheat_purge {
1581da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
1591da177e4SLinus Torvalds 	__u8	what;		/* bit pattern of what to purge */
1601da177e4SLinus Torvalds };
1611da177e4SLinus Torvalds 
1621da177e4SLinus Torvalds 
1631da177e4SLinus Torvalds /*
1641da177e4SLinus Torvalds  * WHITEHEAT_ECHO
1651da177e4SLinus Torvalds  */
1661da177e4SLinus Torvalds struct whiteheat_echo {
1671da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
1681da177e4SLinus Torvalds 	__u8	length;		/* length of message to echo, max 61 bytes */
1691da177e4SLinus Torvalds 	__u8	echo_data[61];	/* data to echo */
1701da177e4SLinus Torvalds };
1711da177e4SLinus Torvalds 
1721da177e4SLinus Torvalds 
1731da177e4SLinus Torvalds /*
1741da177e4SLinus Torvalds  * WHITEHEAT_DO_TEST
1751da177e4SLinus Torvalds  */
1761da177e4SLinus Torvalds #define WHITEHEAT_TEST_UART_RW		0x01  /* read/write uart registers */
1771da177e4SLinus Torvalds #define WHITEHEAT_TEST_UART_INTR	0x02  /* uart interrupt */
17880359a9cSAlan Cox #define WHITEHEAT_TEST_SETUP_CONT	0x03  /* setup for
17980359a9cSAlan Cox 						PORT_CONT/PORT_DISCONT */
1801da177e4SLinus Torvalds #define WHITEHEAT_TEST_PORT_CONT	0x04  /* port connect */
1811da177e4SLinus Torvalds #define WHITEHEAT_TEST_PORT_DISCONT	0x05  /* port disconnect */
1821da177e4SLinus Torvalds #define WHITEHEAT_TEST_UART_CLK_START	0x06  /* uart clock test start */
1831da177e4SLinus Torvalds #define WHITEHEAT_TEST_UART_CLK_STOP	0x07  /* uart clock test stop */
18480359a9cSAlan Cox #define WHITEHEAT_TEST_MODEM_FT		0x08  /* modem signals, requires a
18580359a9cSAlan Cox 						loopback cable/connector */
1861da177e4SLinus Torvalds #define WHITEHEAT_TEST_ERASE_EEPROM	0x09  /* erase eeprom */
1871da177e4SLinus Torvalds #define WHITEHEAT_TEST_READ_EEPROM	0x0a  /* read eeprom */
1881da177e4SLinus Torvalds #define WHITEHEAT_TEST_PROGRAM_EEPROM	0x0b  /* program eeprom */
1891da177e4SLinus Torvalds 
1901da177e4SLinus Torvalds struct whiteheat_test {
1911da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to n) */
1921da177e4SLinus Torvalds 	__u8	test;		/* see WHITEHEAT_TEST_* above*/
1931da177e4SLinus Torvalds 	__u8	info[32];	/* additional info */
1941da177e4SLinus Torvalds };
1951da177e4SLinus Torvalds 
1961da177e4SLinus Torvalds 
1971da177e4SLinus Torvalds /*
1981da177e4SLinus Torvalds  * Replies from the firmware
1991da177e4SLinus Torvalds  */
2001da177e4SLinus Torvalds 
2011da177e4SLinus Torvalds 
2021da177e4SLinus Torvalds /*
2031da177e4SLinus Torvalds  * WHITEHEAT_STATUS
2041da177e4SLinus Torvalds  */
2051da177e4SLinus Torvalds #define WHITEHEAT_EVENT_MODEM		0x01	/* modem field is valid */
2061da177e4SLinus Torvalds #define WHITEHEAT_EVENT_ERROR		0x02	/* error field is valid */
2071da177e4SLinus Torvalds #define WHITEHEAT_EVENT_FLOW		0x04	/* flow field is valid */
2081da177e4SLinus Torvalds #define WHITEHEAT_EVENT_CONNECT		0x08	/* connect field is valid */
2091da177e4SLinus Torvalds 
2101da177e4SLinus Torvalds #define WHITEHEAT_FLOW_NONE		0x00	/* no flow control active */
21180359a9cSAlan Cox #define WHITEHEAT_FLOW_HARD_OUT		0x01	/* TX is stopped by CTS
21280359a9cSAlan Cox 						  (waiting for CTS to go on) */
21380359a9cSAlan Cox #define WHITEHEAT_FLOW_HARD_IN		0x02	/* remote TX is stopped
21480359a9cSAlan Cox 						  by RTS */
21580359a9cSAlan Cox #define WHITEHEAT_FLOW_SOFT_OUT		0x04	/* TX is stopped by XOFF
21680359a9cSAlan Cox 						  received (waiting for XON) */
21780359a9cSAlan Cox #define WHITEHEAT_FLOW_SOFT_IN		0x08	/* remote TX is stopped by XOFF
21880359a9cSAlan Cox 						  transmitted */
2191da177e4SLinus Torvalds #define WHITEHEAT_FLOW_TX_DONE		0x80	/* TX has completed */
2201da177e4SLinus Torvalds 
2211da177e4SLinus Torvalds struct whiteheat_status_info {
2221da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
22380359a9cSAlan Cox 	__u8	event;		/* indicates what the current event is,
22480359a9cSAlan Cox 					see WHITEHEAT_EVENT_* above */
22580359a9cSAlan Cox 	__u8	modem;		/* modem signal status (copy of uart's
22680359a9cSAlan Cox 					MSR register) */
2271da177e4SLinus Torvalds 	__u8	error;		/* line status (copy of uart's LSR register) */
22880359a9cSAlan Cox 	__u8	flow;		/* flow control state, see WHITEHEAT_FLOW_*
22980359a9cSAlan Cox 					above */
23080359a9cSAlan Cox 	__u8	connect;	/* 0 means not connected, non-zero means
23180359a9cSAlan Cox 					connected */
2321da177e4SLinus Torvalds };
2331da177e4SLinus Torvalds 
2341da177e4SLinus Torvalds 
2351da177e4SLinus Torvalds /*
2361da177e4SLinus Torvalds  * WHITEHEAT_GET_DTR_RTS
2371da177e4SLinus Torvalds  */
2381da177e4SLinus Torvalds struct whiteheat_dr_info {
2391da177e4SLinus Torvalds 	__u8	mcr;		/* copy of uart's MCR register */
2401da177e4SLinus Torvalds };
2411da177e4SLinus Torvalds 
2421da177e4SLinus Torvalds 
2431da177e4SLinus Torvalds /*
2441da177e4SLinus Torvalds  * WHITEHEAT_GET_HW_INFO
2451da177e4SLinus Torvalds  */
2461da177e4SLinus Torvalds struct whiteheat_hw_info {
2471da177e4SLinus Torvalds 	__u8	hw_id;		/* hardware id number, WhiteHEAT = 0 */
2481da177e4SLinus Torvalds 	__u8	sw_major_rev;	/* major version number */
2491da177e4SLinus Torvalds 	__u8	sw_minor_rev;	/* minor version number */
2501da177e4SLinus Torvalds 	struct whiteheat_hw_eeprom_info {
2511da177e4SLinus Torvalds 		__u8	b0;			/* B0 */
2521da177e4SLinus Torvalds 		__u8	vendor_id_low;		/* vendor id (low byte) */
2531da177e4SLinus Torvalds 		__u8	vendor_id_high;		/* vendor id (high byte) */
2541da177e4SLinus Torvalds 		__u8	product_id_low;		/* product id (low byte) */
2551da177e4SLinus Torvalds 		__u8	product_id_high;	/* product id (high byte) */
2561da177e4SLinus Torvalds 		__u8	device_id_low;		/* device id (low byte) */
2571da177e4SLinus Torvalds 		__u8	device_id_high;		/* device id (high byte) */
2581da177e4SLinus Torvalds 		__u8	not_used_1;
2591da177e4SLinus Torvalds 		__u8	serial_number_0;	/* serial number (low byte) */
2601da177e4SLinus Torvalds 		__u8	serial_number_1;	/* serial number */
2611da177e4SLinus Torvalds 		__u8	serial_number_2;	/* serial number */
2621da177e4SLinus Torvalds 		__u8	serial_number_3;	/* serial number (high byte) */
2631da177e4SLinus Torvalds 		__u8	not_used_2;
2641da177e4SLinus Torvalds 		__u8	not_used_3;
2651da177e4SLinus Torvalds 		__u8	checksum_low;		/* checksum (low byte) */
2661da177e4SLinus Torvalds 		__u8	checksum_high;		/* checksum (high byte */
2671da177e4SLinus Torvalds 	} hw_eeprom_info;	/* EEPROM contents */
2681da177e4SLinus Torvalds };
2691da177e4SLinus Torvalds 
2701da177e4SLinus Torvalds 
2711da177e4SLinus Torvalds /*
2721da177e4SLinus Torvalds  * WHITEHEAT_EVENT
2731da177e4SLinus Torvalds  */
2741da177e4SLinus Torvalds struct whiteheat_event_info {
2751da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
2761da177e4SLinus Torvalds 	__u8	event;		/* see whiteheat_status_info.event */
27780359a9cSAlan Cox 	__u8	info;		/* see whiteheat_status_info.modem, .error,
27880359a9cSAlan Cox 					.flow, .connect */
2791da177e4SLinus Torvalds };
2801da177e4SLinus Torvalds 
2811da177e4SLinus Torvalds 
2821da177e4SLinus Torvalds /*
2831da177e4SLinus Torvalds  * WHITEHEAT_DO_TEST
2841da177e4SLinus Torvalds  */
2851da177e4SLinus Torvalds #define WHITEHEAT_TEST_FAIL	0x00  /* test failed */
2861da177e4SLinus Torvalds #define WHITEHEAT_TEST_UNKNOWN	0x01  /* unknown test requested */
2871da177e4SLinus Torvalds #define WHITEHEAT_TEST_PASS	0xff  /* test passed */
2881da177e4SLinus Torvalds 
2891da177e4SLinus Torvalds struct whiteheat_test_info {
2901da177e4SLinus Torvalds 	__u8	port;		/* port number (1 to N) */
29180359a9cSAlan Cox 	__u8	test;		/* indicates which test this is a response for,
29280359a9cSAlan Cox 				   see WHITEHEAT_DO_TEST above */
2931da177e4SLinus Torvalds 	__u8	status;		/* see WHITEHEAT_TEST_* above */
2941da177e4SLinus Torvalds 	__u8	results[32];	/* test-dependent results */
2951da177e4SLinus Torvalds };
2961da177e4SLinus Torvalds 
2971da177e4SLinus Torvalds 
2981da177e4SLinus Torvalds #endif
299