11da177e4SLinus Torvalds /***************************************************************************** 21da177e4SLinus Torvalds * 31da177e4SLinus Torvalds * Copyright (C) 1997-2002 Inside Out Networks, Inc. 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 61da177e4SLinus Torvalds * it under the terms of the GNU General Public License as published by 71da177e4SLinus Torvalds * the Free Software Foundation; either version 2 of the License, or 81da177e4SLinus Torvalds * (at your option) any later version. 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds * 111da177e4SLinus Torvalds * Feb-16-2001 DMI Added I2C structure definitions 121da177e4SLinus Torvalds * May-29-2002 gkh Ported to Linux 131da177e4SLinus Torvalds * 141da177e4SLinus Torvalds * 151da177e4SLinus Torvalds ******************************************************************************/ 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds #ifndef _IO_TI_H_ 181da177e4SLinus Torvalds #define _IO_TI_H_ 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds /* Address Space */ 211da177e4SLinus Torvalds #define DTK_ADDR_SPACE_XDATA 0x03 /* Addr is placed in XDATA space */ 221da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ 231da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ 241da177e4SLinus Torvalds 25*a3204711SGreg Kroah-Hartman /* UART Defines */ 261da177e4SLinus Torvalds #define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ 271da177e4SLinus Torvalds #define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ 281da177e4SLinus Torvalds #define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds /* Bits per character */ 311da177e4SLinus Torvalds #define UMP_UART_CHAR5BITS 0x00 321da177e4SLinus Torvalds #define UMP_UART_CHAR6BITS 0x01 331da177e4SLinus Torvalds #define UMP_UART_CHAR7BITS 0x02 341da177e4SLinus Torvalds #define UMP_UART_CHAR8BITS 0x03 351da177e4SLinus Torvalds 361da177e4SLinus Torvalds /* Parity */ 371da177e4SLinus Torvalds #define UMP_UART_NOPARITY 0x00 381da177e4SLinus Torvalds #define UMP_UART_ODDPARITY 0x01 391da177e4SLinus Torvalds #define UMP_UART_EVENPARITY 0x02 401da177e4SLinus Torvalds #define UMP_UART_MARKPARITY 0x03 411da177e4SLinus Torvalds #define UMP_UART_SPACEPARITY 0x04 421da177e4SLinus Torvalds 431da177e4SLinus Torvalds /* Stop bits */ 441da177e4SLinus Torvalds #define UMP_UART_STOPBIT1 0x00 451da177e4SLinus Torvalds #define UMP_UART_STOPBIT15 0x01 461da177e4SLinus Torvalds #define UMP_UART_STOPBIT2 0x02 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds /* Line status register masks */ 491da177e4SLinus Torvalds #define UMP_UART_LSR_OV_MASK 0x01 501da177e4SLinus Torvalds #define UMP_UART_LSR_PE_MASK 0x02 511da177e4SLinus Torvalds #define UMP_UART_LSR_FE_MASK 0x04 521da177e4SLinus Torvalds #define UMP_UART_LSR_BR_MASK 0x08 531da177e4SLinus Torvalds #define UMP_UART_LSR_ER_MASK 0x0F 541da177e4SLinus Torvalds #define UMP_UART_LSR_RX_MASK 0x10 551da177e4SLinus Torvalds #define UMP_UART_LSR_TX_MASK 0x20 561da177e4SLinus Torvalds 571da177e4SLinus Torvalds #define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK) 581da177e4SLinus Torvalds 591da177e4SLinus Torvalds /* Port Settings Constants) */ 601da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001 611da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002 621da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_PARITY 0x0008 631da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010 641da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020 651da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X 0x0040 661da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_XA 0x0080 671da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_IN_X 0x0100 681da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800 691da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000 701da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000 711da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds #define UMP_DMA_MODE_CONTINOUS 0x01 741da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80 751da177e4SLinus Torvalds #define UMP_PIPE_TRANSFER_MODE_MASK 0x03 761da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C 771da177e4SLinus Torvalds 781da177e4SLinus Torvalds /* Purge port Direction Mask Bits */ 791da177e4SLinus Torvalds #define UMP_PORT_DIR_OUT 0x01 801da177e4SLinus Torvalds #define UMP_PORT_DIR_IN 0x02 811da177e4SLinus Torvalds 82*a3204711SGreg Kroah-Hartman /* Address of Port 0 */ 831da177e4SLinus Torvalds #define UMPM_UART1_PORT 0x03 841da177e4SLinus Torvalds 85*a3204711SGreg Kroah-Hartman /* Commands */ 861da177e4SLinus Torvalds #define UMPC_SET_CONFIG 0x05 871da177e4SLinus Torvalds #define UMPC_OPEN_PORT 0x06 881da177e4SLinus Torvalds #define UMPC_CLOSE_PORT 0x07 891da177e4SLinus Torvalds #define UMPC_START_PORT 0x08 901da177e4SLinus Torvalds #define UMPC_STOP_PORT 0x09 911da177e4SLinus Torvalds #define UMPC_TEST_PORT 0x0A 921da177e4SLinus Torvalds #define UMPC_PURGE_PORT 0x0B 931da177e4SLinus Torvalds 94*a3204711SGreg Kroah-Hartman /* Force the Firmware to complete the current Read */ 95*a3204711SGreg Kroah-Hartman #define UMPC_COMPLETE_READ 0x80 96*a3204711SGreg Kroah-Hartman /* Force UMP back into BOOT Mode */ 97*a3204711SGreg Kroah-Hartman #define UMPC_HARDWARE_RESET 0x81 98*a3204711SGreg Kroah-Hartman /* 99*a3204711SGreg Kroah-Hartman * Copy current download image to type 0xf2 record in 16k I2C 100*a3204711SGreg Kroah-Hartman * firmware will change 0xff record to type 2 record when complete 101*a3204711SGreg Kroah-Hartman */ 102*a3204711SGreg Kroah-Hartman #define UMPC_COPY_DNLD_TO_I2C 0x82 1031da177e4SLinus Torvalds 104*a3204711SGreg Kroah-Hartman /* 105*a3204711SGreg Kroah-Hartman * Special function register commands 106*a3204711SGreg Kroah-Hartman * wIndex is register address 107*a3204711SGreg Kroah-Hartman * wValue is MSB/LSB mask/data 108*a3204711SGreg Kroah-Hartman */ 109*a3204711SGreg Kroah-Hartman #define UMPC_WRITE_SFR 0x83 /* Write SFR Register */ 1101da177e4SLinus Torvalds 111*a3204711SGreg Kroah-Hartman /* wIndex is register address */ 112*a3204711SGreg Kroah-Hartman #define UMPC_READ_SFR 0x84 /* Read SRF Register */ 1131da177e4SLinus Torvalds 114*a3204711SGreg Kroah-Hartman /* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1151da177e4SLinus Torvalds #define UMPC_SET_CLR_DTR 0x85 1161da177e4SLinus Torvalds 117*a3204711SGreg Kroah-Hartman /* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1181da177e4SLinus Torvalds #define UMPC_SET_CLR_RTS 0x86 1191da177e4SLinus Torvalds 120*a3204711SGreg Kroah-Hartman /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1211da177e4SLinus Torvalds #define UMPC_SET_CLR_LOOPBACK 0x87 1221da177e4SLinus Torvalds 123*a3204711SGreg Kroah-Hartman /* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1241da177e4SLinus Torvalds #define UMPC_SET_CLR_BREAK 0x88 1251da177e4SLinus Torvalds 126*a3204711SGreg Kroah-Hartman /* Read MSR wIndex ModuleID (port) */ 1271da177e4SLinus Torvalds #define UMPC_READ_MSR 0x89 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvalds /* Toolkit commands */ 1301da177e4SLinus Torvalds /* Read-write group */ 1311da177e4SLinus Torvalds #define UMPC_MEMORY_READ 0x92 1321da177e4SLinus Torvalds #define UMPC_MEMORY_WRITE 0x93 1331da177e4SLinus Torvalds 1341da177e4SLinus Torvalds /* 1351da177e4SLinus Torvalds * UMP DMA Definitions 1361da177e4SLinus Torvalds */ 1371da177e4SLinus Torvalds #define UMPD_OEDB1_ADDRESS 0xFF08 1381da177e4SLinus Torvalds #define UMPD_OEDB2_ADDRESS 0xFF10 1391da177e4SLinus Torvalds 140*a3204711SGreg Kroah-Hartman struct out_endpoint_desc_block { 1411da177e4SLinus Torvalds __u8 Configuration; 1421da177e4SLinus Torvalds __u8 XBufAddr; 1431da177e4SLinus Torvalds __u8 XByteCount; 1441da177e4SLinus Torvalds __u8 Unused1; 1451da177e4SLinus Torvalds __u8 Unused2; 1461da177e4SLinus Torvalds __u8 YBufAddr; 1471da177e4SLinus Torvalds __u8 YByteCount; 1481da177e4SLinus Torvalds __u8 BufferSize; 1491da177e4SLinus Torvalds } __attribute__((packed)); 1501da177e4SLinus Torvalds 1511da177e4SLinus Torvalds 1521da177e4SLinus Torvalds /* 1531da177e4SLinus Torvalds * TYPE DEFINITIONS 1541da177e4SLinus Torvalds * Structures for Firmware commands 1551da177e4SLinus Torvalds */ 156*a3204711SGreg Kroah-Hartman /* UART settings */ 157*a3204711SGreg Kroah-Hartman struct ump_uart_config { 1581da177e4SLinus Torvalds __u16 wBaudRate; /* Baud rate */ 1591da177e4SLinus Torvalds __u16 wFlags; /* Bitmap mask of flags */ 1601da177e4SLinus Torvalds __u8 bDataBits; /* 5..8 - data bits per character */ 1611da177e4SLinus Torvalds __u8 bParity; /* Parity settings */ 1621da177e4SLinus Torvalds __u8 bStopBits; /* Stop bits settings */ 1631da177e4SLinus Torvalds char cXon; /* XON character */ 1641da177e4SLinus Torvalds char cXoff; /* XOFF character */ 1651da177e4SLinus Torvalds __u8 bUartMode; /* Will be updated when a user */ 1661da177e4SLinus Torvalds /* interface is defined */ 1671da177e4SLinus Torvalds } __attribute__((packed)); 1681da177e4SLinus Torvalds 1691da177e4SLinus Torvalds 1701da177e4SLinus Torvalds /* 1711da177e4SLinus Torvalds * TYPE DEFINITIONS 1721da177e4SLinus Torvalds * Structures for USB interrupts 1731da177e4SLinus Torvalds */ 174*a3204711SGreg Kroah-Hartman /* Interrupt packet structure */ 175*a3204711SGreg Kroah-Hartman struct ump_interrupt { 1761da177e4SLinus Torvalds __u8 bICode; /* Interrupt code (interrupt num) */ 1771da177e4SLinus Torvalds __u8 bIInfo; /* Interrupt information */ 1781da177e4SLinus Torvalds } __attribute__((packed)); 1791da177e4SLinus Torvalds 1801da177e4SLinus Torvalds 1811da177e4SLinus Torvalds #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3) 1821da177e4SLinus Torvalds #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f) 1831da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_LSR 0x03 1841da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_MSR 0x04 1851da177e4SLinus Torvalds 1861da177e4SLinus Torvalds #endif 187