1788a4ee6SNishad Kamdar /* SPDX-License-Identifier: GPL-2.0+ */ 21da177e4SLinus Torvalds /***************************************************************************** 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1997-2002 Inside Out Networks, Inc. 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * Feb-16-2001 DMI Added I2C structure definitions 71da177e4SLinus Torvalds * May-29-2002 gkh Ported to Linux 81da177e4SLinus Torvalds * 91da177e4SLinus Torvalds * 101da177e4SLinus Torvalds ******************************************************************************/ 111da177e4SLinus Torvalds 121da177e4SLinus Torvalds #ifndef _IO_TI_H_ 131da177e4SLinus Torvalds #define _IO_TI_H_ 141da177e4SLinus Torvalds 151da177e4SLinus Torvalds /* Address Space */ 161da177e4SLinus Torvalds #define DTK_ADDR_SPACE_XDATA 0x03 /* Addr is placed in XDATA space */ 171da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ 181da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ 191da177e4SLinus Torvalds 20a3204711SGreg Kroah-Hartman /* UART Defines */ 211da177e4SLinus Torvalds #define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ 221da177e4SLinus Torvalds #define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ 231da177e4SLinus Torvalds #define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ 241da177e4SLinus Torvalds 251da177e4SLinus Torvalds /* Bits per character */ 261da177e4SLinus Torvalds #define UMP_UART_CHAR5BITS 0x00 271da177e4SLinus Torvalds #define UMP_UART_CHAR6BITS 0x01 281da177e4SLinus Torvalds #define UMP_UART_CHAR7BITS 0x02 291da177e4SLinus Torvalds #define UMP_UART_CHAR8BITS 0x03 301da177e4SLinus Torvalds 311da177e4SLinus Torvalds /* Parity */ 321da177e4SLinus Torvalds #define UMP_UART_NOPARITY 0x00 331da177e4SLinus Torvalds #define UMP_UART_ODDPARITY 0x01 341da177e4SLinus Torvalds #define UMP_UART_EVENPARITY 0x02 351da177e4SLinus Torvalds #define UMP_UART_MARKPARITY 0x03 361da177e4SLinus Torvalds #define UMP_UART_SPACEPARITY 0x04 371da177e4SLinus Torvalds 381da177e4SLinus Torvalds /* Stop bits */ 391da177e4SLinus Torvalds #define UMP_UART_STOPBIT1 0x00 401da177e4SLinus Torvalds #define UMP_UART_STOPBIT15 0x01 411da177e4SLinus Torvalds #define UMP_UART_STOPBIT2 0x02 421da177e4SLinus Torvalds 431da177e4SLinus Torvalds /* Line status register masks */ 441da177e4SLinus Torvalds #define UMP_UART_LSR_OV_MASK 0x01 451da177e4SLinus Torvalds #define UMP_UART_LSR_PE_MASK 0x02 461da177e4SLinus Torvalds #define UMP_UART_LSR_FE_MASK 0x04 471da177e4SLinus Torvalds #define UMP_UART_LSR_BR_MASK 0x08 481da177e4SLinus Torvalds #define UMP_UART_LSR_ER_MASK 0x0F 491da177e4SLinus Torvalds #define UMP_UART_LSR_RX_MASK 0x10 501da177e4SLinus Torvalds #define UMP_UART_LSR_TX_MASK 0x20 511da177e4SLinus Torvalds 521da177e4SLinus Torvalds #define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK) 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds /* Port Settings Constants) */ 551da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001 561da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002 571da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_PARITY 0x0008 581da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010 591da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020 601da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X 0x0040 611da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_XA 0x0080 621da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_IN_X 0x0100 631da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800 641da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000 651da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000 661da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000 671da177e4SLinus Torvalds 681da177e4SLinus Torvalds #define UMP_DMA_MODE_CONTINOUS 0x01 691da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80 701da177e4SLinus Torvalds #define UMP_PIPE_TRANSFER_MODE_MASK 0x03 711da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C 721da177e4SLinus Torvalds 731da177e4SLinus Torvalds /* Purge port Direction Mask Bits */ 741da177e4SLinus Torvalds #define UMP_PORT_DIR_OUT 0x01 751da177e4SLinus Torvalds #define UMP_PORT_DIR_IN 0x02 761da177e4SLinus Torvalds 77a3204711SGreg Kroah-Hartman /* Address of Port 0 */ 781da177e4SLinus Torvalds #define UMPM_UART1_PORT 0x03 791da177e4SLinus Torvalds 80a3204711SGreg Kroah-Hartman /* Commands */ 811da177e4SLinus Torvalds #define UMPC_SET_CONFIG 0x05 821da177e4SLinus Torvalds #define UMPC_OPEN_PORT 0x06 831da177e4SLinus Torvalds #define UMPC_CLOSE_PORT 0x07 841da177e4SLinus Torvalds #define UMPC_START_PORT 0x08 851da177e4SLinus Torvalds #define UMPC_STOP_PORT 0x09 861da177e4SLinus Torvalds #define UMPC_TEST_PORT 0x0A 871da177e4SLinus Torvalds #define UMPC_PURGE_PORT 0x0B 881da177e4SLinus Torvalds 89a3204711SGreg Kroah-Hartman /* Force the Firmware to complete the current Read */ 90a3204711SGreg Kroah-Hartman #define UMPC_COMPLETE_READ 0x80 91a3204711SGreg Kroah-Hartman /* Force UMP back into BOOT Mode */ 92a3204711SGreg Kroah-Hartman #define UMPC_HARDWARE_RESET 0x81 93a3204711SGreg Kroah-Hartman /* 94a3204711SGreg Kroah-Hartman * Copy current download image to type 0xf2 record in 16k I2C 95a3204711SGreg Kroah-Hartman * firmware will change 0xff record to type 2 record when complete 96a3204711SGreg Kroah-Hartman */ 97a3204711SGreg Kroah-Hartman #define UMPC_COPY_DNLD_TO_I2C 0x82 981da177e4SLinus Torvalds 99a3204711SGreg Kroah-Hartman /* 100a3204711SGreg Kroah-Hartman * Special function register commands 101a3204711SGreg Kroah-Hartman * wIndex is register address 102a3204711SGreg Kroah-Hartman * wValue is MSB/LSB mask/data 103a3204711SGreg Kroah-Hartman */ 104a3204711SGreg Kroah-Hartman #define UMPC_WRITE_SFR 0x83 /* Write SFR Register */ 1051da177e4SLinus Torvalds 106a3204711SGreg Kroah-Hartman /* wIndex is register address */ 107a3204711SGreg Kroah-Hartman #define UMPC_READ_SFR 0x84 /* Read SRF Register */ 1081da177e4SLinus Torvalds 109a3204711SGreg Kroah-Hartman /* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1101da177e4SLinus Torvalds #define UMPC_SET_CLR_DTR 0x85 1111da177e4SLinus Torvalds 112a3204711SGreg Kroah-Hartman /* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1131da177e4SLinus Torvalds #define UMPC_SET_CLR_RTS 0x86 1141da177e4SLinus Torvalds 115a3204711SGreg Kroah-Hartman /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1161da177e4SLinus Torvalds #define UMPC_SET_CLR_LOOPBACK 0x87 1171da177e4SLinus Torvalds 118a3204711SGreg Kroah-Hartman /* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1191da177e4SLinus Torvalds #define UMPC_SET_CLR_BREAK 0x88 1201da177e4SLinus Torvalds 121a3204711SGreg Kroah-Hartman /* Read MSR wIndex ModuleID (port) */ 1221da177e4SLinus Torvalds #define UMPC_READ_MSR 0x89 1231da177e4SLinus Torvalds 1241da177e4SLinus Torvalds /* Toolkit commands */ 1251da177e4SLinus Torvalds /* Read-write group */ 1261da177e4SLinus Torvalds #define UMPC_MEMORY_READ 0x92 1271da177e4SLinus Torvalds #define UMPC_MEMORY_WRITE 0x93 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvalds /* 1301da177e4SLinus Torvalds * UMP DMA Definitions 1311da177e4SLinus Torvalds */ 1321da177e4SLinus Torvalds #define UMPD_OEDB1_ADDRESS 0xFF08 1331da177e4SLinus Torvalds #define UMPD_OEDB2_ADDRESS 0xFF10 1341da177e4SLinus Torvalds 135a3204711SGreg Kroah-Hartman struct out_endpoint_desc_block { 13635aeb1b3SJohan Hovold u8 Configuration; 13735aeb1b3SJohan Hovold u8 XBufAddr; 13835aeb1b3SJohan Hovold u8 XByteCount; 13935aeb1b3SJohan Hovold u8 Unused1; 14035aeb1b3SJohan Hovold u8 Unused2; 14135aeb1b3SJohan Hovold u8 YBufAddr; 14235aeb1b3SJohan Hovold u8 YByteCount; 14335aeb1b3SJohan Hovold u8 BufferSize; 144*46388e86SJohan Hovold }; 1451da177e4SLinus Torvalds 1461da177e4SLinus Torvalds 1471da177e4SLinus Torvalds /* 1481da177e4SLinus Torvalds * TYPE DEFINITIONS 1491da177e4SLinus Torvalds * Structures for Firmware commands 1501da177e4SLinus Torvalds */ 151a3204711SGreg Kroah-Hartman /* UART settings */ 152a3204711SGreg Kroah-Hartman struct ump_uart_config { 15335aeb1b3SJohan Hovold u16 wBaudRate; /* Baud rate */ 15435aeb1b3SJohan Hovold u16 wFlags; /* Bitmap mask of flags */ 15535aeb1b3SJohan Hovold u8 bDataBits; /* 5..8 - data bits per character */ 15635aeb1b3SJohan Hovold u8 bParity; /* Parity settings */ 15735aeb1b3SJohan Hovold u8 bStopBits; /* Stop bits settings */ 1581da177e4SLinus Torvalds char cXon; /* XON character */ 1591da177e4SLinus Torvalds char cXoff; /* XOFF character */ 16035aeb1b3SJohan Hovold u8 bUartMode; /* Will be updated when a user */ 1611da177e4SLinus Torvalds /* interface is defined */ 162*46388e86SJohan Hovold }; 1631da177e4SLinus Torvalds 1641da177e4SLinus Torvalds 1651da177e4SLinus Torvalds /* 1661da177e4SLinus Torvalds * TYPE DEFINITIONS 1671da177e4SLinus Torvalds * Structures for USB interrupts 1681da177e4SLinus Torvalds */ 169a3204711SGreg Kroah-Hartman /* Interrupt packet structure */ 170a3204711SGreg Kroah-Hartman struct ump_interrupt { 17135aeb1b3SJohan Hovold u8 bICode; /* Interrupt code (interrupt num) */ 17235aeb1b3SJohan Hovold u8 bIInfo; /* Interrupt information */ 173*46388e86SJohan Hovold }; 1741da177e4SLinus Torvalds 1751da177e4SLinus Torvalds 176691a03cfSJohan Hovold #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 6) & 0x01) 1771da177e4SLinus Torvalds #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f) 1781da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_LSR 0x03 1791da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_MSR 0x04 1801da177e4SLinus Torvalds 1811da177e4SLinus Torvalds #endif 182