1*5fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0+ 21da177e4SLinus Torvalds /***************************************************************************** 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1997-2002 Inside Out Networks, Inc. 51da177e4SLinus Torvalds * 61da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 71da177e4SLinus Torvalds * it under the terms of the GNU General Public License as published by 81da177e4SLinus Torvalds * the Free Software Foundation; either version 2 of the License, or 91da177e4SLinus Torvalds * (at your option) any later version. 101da177e4SLinus Torvalds * 111da177e4SLinus Torvalds * 121da177e4SLinus Torvalds * Feb-16-2001 DMI Added I2C structure definitions 131da177e4SLinus Torvalds * May-29-2002 gkh Ported to Linux 141da177e4SLinus Torvalds * 151da177e4SLinus Torvalds * 161da177e4SLinus Torvalds ******************************************************************************/ 171da177e4SLinus Torvalds 181da177e4SLinus Torvalds #ifndef _IO_TI_H_ 191da177e4SLinus Torvalds #define _IO_TI_H_ 201da177e4SLinus Torvalds 211da177e4SLinus Torvalds /* Address Space */ 221da177e4SLinus Torvalds #define DTK_ADDR_SPACE_XDATA 0x03 /* Addr is placed in XDATA space */ 231da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_II 0x82 /* Addr is placed in I2C area */ 241da177e4SLinus Torvalds #define DTK_ADDR_SPACE_I2C_TYPE_III 0x83 /* Addr is placed in I2C area */ 251da177e4SLinus Torvalds 26a3204711SGreg Kroah-Hartman /* UART Defines */ 271da177e4SLinus Torvalds #define UMPMEM_BASE_UART1 0xFFA0 /* UMP UART1 base address */ 281da177e4SLinus Torvalds #define UMPMEM_BASE_UART2 0xFFB0 /* UMP UART2 base address */ 291da177e4SLinus Torvalds #define UMPMEM_OFFS_UART_LSR 0x05 /* UMP UART LSR register offset */ 301da177e4SLinus Torvalds 311da177e4SLinus Torvalds /* Bits per character */ 321da177e4SLinus Torvalds #define UMP_UART_CHAR5BITS 0x00 331da177e4SLinus Torvalds #define UMP_UART_CHAR6BITS 0x01 341da177e4SLinus Torvalds #define UMP_UART_CHAR7BITS 0x02 351da177e4SLinus Torvalds #define UMP_UART_CHAR8BITS 0x03 361da177e4SLinus Torvalds 371da177e4SLinus Torvalds /* Parity */ 381da177e4SLinus Torvalds #define UMP_UART_NOPARITY 0x00 391da177e4SLinus Torvalds #define UMP_UART_ODDPARITY 0x01 401da177e4SLinus Torvalds #define UMP_UART_EVENPARITY 0x02 411da177e4SLinus Torvalds #define UMP_UART_MARKPARITY 0x03 421da177e4SLinus Torvalds #define UMP_UART_SPACEPARITY 0x04 431da177e4SLinus Torvalds 441da177e4SLinus Torvalds /* Stop bits */ 451da177e4SLinus Torvalds #define UMP_UART_STOPBIT1 0x00 461da177e4SLinus Torvalds #define UMP_UART_STOPBIT15 0x01 471da177e4SLinus Torvalds #define UMP_UART_STOPBIT2 0x02 481da177e4SLinus Torvalds 491da177e4SLinus Torvalds /* Line status register masks */ 501da177e4SLinus Torvalds #define UMP_UART_LSR_OV_MASK 0x01 511da177e4SLinus Torvalds #define UMP_UART_LSR_PE_MASK 0x02 521da177e4SLinus Torvalds #define UMP_UART_LSR_FE_MASK 0x04 531da177e4SLinus Torvalds #define UMP_UART_LSR_BR_MASK 0x08 541da177e4SLinus Torvalds #define UMP_UART_LSR_ER_MASK 0x0F 551da177e4SLinus Torvalds #define UMP_UART_LSR_RX_MASK 0x10 561da177e4SLinus Torvalds #define UMP_UART_LSR_TX_MASK 0x20 571da177e4SLinus Torvalds 581da177e4SLinus Torvalds #define UMP_UART_LSR_DATA_MASK (LSR_PAR_ERR | LSR_FRM_ERR | LSR_BREAK) 591da177e4SLinus Torvalds 601da177e4SLinus Torvalds /* Port Settings Constants) */ 611da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_FLOW 0x0001 621da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RTS_DISABLE 0x0002 631da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_PARITY 0x0008 641da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_DSR_FLOW 0x0010 651da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X_CTS_FLOW 0x0020 661da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_X 0x0040 671da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_OUT_XA 0x0080 681da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_IN_X 0x0100 691da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_FLOW 0x0800 701da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_DTR_DISABLE 0x1000 711da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_RECEIVE_MS_INT 0x2000 721da177e4SLinus Torvalds #define UMP_MASK_UART_FLAGS_AUTO_START_ON_ERR 0x4000 731da177e4SLinus Torvalds 741da177e4SLinus Torvalds #define UMP_DMA_MODE_CONTINOUS 0x01 751da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_ENA 0x80 761da177e4SLinus Torvalds #define UMP_PIPE_TRANSFER_MODE_MASK 0x03 771da177e4SLinus Torvalds #define UMP_PIPE_TRANS_TIMEOUT_MASK 0x7C 781da177e4SLinus Torvalds 791da177e4SLinus Torvalds /* Purge port Direction Mask Bits */ 801da177e4SLinus Torvalds #define UMP_PORT_DIR_OUT 0x01 811da177e4SLinus Torvalds #define UMP_PORT_DIR_IN 0x02 821da177e4SLinus Torvalds 83a3204711SGreg Kroah-Hartman /* Address of Port 0 */ 841da177e4SLinus Torvalds #define UMPM_UART1_PORT 0x03 851da177e4SLinus Torvalds 86a3204711SGreg Kroah-Hartman /* Commands */ 871da177e4SLinus Torvalds #define UMPC_SET_CONFIG 0x05 881da177e4SLinus Torvalds #define UMPC_OPEN_PORT 0x06 891da177e4SLinus Torvalds #define UMPC_CLOSE_PORT 0x07 901da177e4SLinus Torvalds #define UMPC_START_PORT 0x08 911da177e4SLinus Torvalds #define UMPC_STOP_PORT 0x09 921da177e4SLinus Torvalds #define UMPC_TEST_PORT 0x0A 931da177e4SLinus Torvalds #define UMPC_PURGE_PORT 0x0B 941da177e4SLinus Torvalds 95a3204711SGreg Kroah-Hartman /* Force the Firmware to complete the current Read */ 96a3204711SGreg Kroah-Hartman #define UMPC_COMPLETE_READ 0x80 97a3204711SGreg Kroah-Hartman /* Force UMP back into BOOT Mode */ 98a3204711SGreg Kroah-Hartman #define UMPC_HARDWARE_RESET 0x81 99a3204711SGreg Kroah-Hartman /* 100a3204711SGreg Kroah-Hartman * Copy current download image to type 0xf2 record in 16k I2C 101a3204711SGreg Kroah-Hartman * firmware will change 0xff record to type 2 record when complete 102a3204711SGreg Kroah-Hartman */ 103a3204711SGreg Kroah-Hartman #define UMPC_COPY_DNLD_TO_I2C 0x82 1041da177e4SLinus Torvalds 105a3204711SGreg Kroah-Hartman /* 106a3204711SGreg Kroah-Hartman * Special function register commands 107a3204711SGreg Kroah-Hartman * wIndex is register address 108a3204711SGreg Kroah-Hartman * wValue is MSB/LSB mask/data 109a3204711SGreg Kroah-Hartman */ 110a3204711SGreg Kroah-Hartman #define UMPC_WRITE_SFR 0x83 /* Write SFR Register */ 1111da177e4SLinus Torvalds 112a3204711SGreg Kroah-Hartman /* wIndex is register address */ 113a3204711SGreg Kroah-Hartman #define UMPC_READ_SFR 0x84 /* Read SRF Register */ 1141da177e4SLinus Torvalds 115a3204711SGreg Kroah-Hartman /* Set or Clear DTR (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1161da177e4SLinus Torvalds #define UMPC_SET_CLR_DTR 0x85 1171da177e4SLinus Torvalds 118a3204711SGreg Kroah-Hartman /* Set or Clear RTS (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1191da177e4SLinus Torvalds #define UMPC_SET_CLR_RTS 0x86 1201da177e4SLinus Torvalds 121a3204711SGreg Kroah-Hartman /* Set or Clear LOOPBACK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1221da177e4SLinus Torvalds #define UMPC_SET_CLR_LOOPBACK 0x87 1231da177e4SLinus Torvalds 124a3204711SGreg Kroah-Hartman /* Set or Clear BREAK (wValue bit 0 Set/Clear) wIndex ModuleID (port) */ 1251da177e4SLinus Torvalds #define UMPC_SET_CLR_BREAK 0x88 1261da177e4SLinus Torvalds 127a3204711SGreg Kroah-Hartman /* Read MSR wIndex ModuleID (port) */ 1281da177e4SLinus Torvalds #define UMPC_READ_MSR 0x89 1291da177e4SLinus Torvalds 1301da177e4SLinus Torvalds /* Toolkit commands */ 1311da177e4SLinus Torvalds /* Read-write group */ 1321da177e4SLinus Torvalds #define UMPC_MEMORY_READ 0x92 1331da177e4SLinus Torvalds #define UMPC_MEMORY_WRITE 0x93 1341da177e4SLinus Torvalds 1351da177e4SLinus Torvalds /* 1361da177e4SLinus Torvalds * UMP DMA Definitions 1371da177e4SLinus Torvalds */ 1381da177e4SLinus Torvalds #define UMPD_OEDB1_ADDRESS 0xFF08 1391da177e4SLinus Torvalds #define UMPD_OEDB2_ADDRESS 0xFF10 1401da177e4SLinus Torvalds 141a3204711SGreg Kroah-Hartman struct out_endpoint_desc_block { 1421da177e4SLinus Torvalds __u8 Configuration; 1431da177e4SLinus Torvalds __u8 XBufAddr; 1441da177e4SLinus Torvalds __u8 XByteCount; 1451da177e4SLinus Torvalds __u8 Unused1; 1461da177e4SLinus Torvalds __u8 Unused2; 1471da177e4SLinus Torvalds __u8 YBufAddr; 1481da177e4SLinus Torvalds __u8 YByteCount; 1491da177e4SLinus Torvalds __u8 BufferSize; 1501da177e4SLinus Torvalds } __attribute__((packed)); 1511da177e4SLinus Torvalds 1521da177e4SLinus Torvalds 1531da177e4SLinus Torvalds /* 1541da177e4SLinus Torvalds * TYPE DEFINITIONS 1551da177e4SLinus Torvalds * Structures for Firmware commands 1561da177e4SLinus Torvalds */ 157a3204711SGreg Kroah-Hartman /* UART settings */ 158a3204711SGreg Kroah-Hartman struct ump_uart_config { 1591da177e4SLinus Torvalds __u16 wBaudRate; /* Baud rate */ 1601da177e4SLinus Torvalds __u16 wFlags; /* Bitmap mask of flags */ 1611da177e4SLinus Torvalds __u8 bDataBits; /* 5..8 - data bits per character */ 1621da177e4SLinus Torvalds __u8 bParity; /* Parity settings */ 1631da177e4SLinus Torvalds __u8 bStopBits; /* Stop bits settings */ 1641da177e4SLinus Torvalds char cXon; /* XON character */ 1651da177e4SLinus Torvalds char cXoff; /* XOFF character */ 1661da177e4SLinus Torvalds __u8 bUartMode; /* Will be updated when a user */ 1671da177e4SLinus Torvalds /* interface is defined */ 1681da177e4SLinus Torvalds } __attribute__((packed)); 1691da177e4SLinus Torvalds 1701da177e4SLinus Torvalds 1711da177e4SLinus Torvalds /* 1721da177e4SLinus Torvalds * TYPE DEFINITIONS 1731da177e4SLinus Torvalds * Structures for USB interrupts 1741da177e4SLinus Torvalds */ 175a3204711SGreg Kroah-Hartman /* Interrupt packet structure */ 176a3204711SGreg Kroah-Hartman struct ump_interrupt { 1771da177e4SLinus Torvalds __u8 bICode; /* Interrupt code (interrupt num) */ 1781da177e4SLinus Torvalds __u8 bIInfo; /* Interrupt information */ 1791da177e4SLinus Torvalds } __attribute__((packed)); 1801da177e4SLinus Torvalds 1811da177e4SLinus Torvalds 1821da177e4SLinus Torvalds #define TIUMP_GET_PORT_FROM_CODE(c) (((c) >> 4) - 3) 1831da177e4SLinus Torvalds #define TIUMP_GET_FUNC_FROM_CODE(c) ((c) & 0x0f) 1841da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_LSR 0x03 1851da177e4SLinus Torvalds #define TIUMP_INTERRUPT_CODE_MSR 0x04 1861da177e4SLinus Torvalds 1871da177e4SLinus Torvalds #endif 188