1 // SPDX-License-Identifier: GPL-1.0+ 2 /* 3 * Renesas USB driver 4 * 5 * Copyright (C) 2011 Renesas Solutions Corp. 6 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> 7 */ 8 #include <linux/delay.h> 9 #include <linux/io.h> 10 #include <linux/scatterlist.h> 11 #include "common.h" 12 #include "pipe.h" 13 14 #define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo)) 15 #define usbhsf_is_cfifo(p, f) (usbhsf_get_cfifo(p) == f) 16 17 #define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */ 18 19 /* 20 * packet initialize 21 */ 22 void usbhs_pkt_init(struct usbhs_pkt *pkt) 23 { 24 INIT_LIST_HEAD(&pkt->node); 25 } 26 27 /* 28 * packet control function 29 */ 30 static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done) 31 { 32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 33 struct device *dev = usbhs_priv_to_dev(priv); 34 35 dev_err(dev, "null handler\n"); 36 37 return -EINVAL; 38 } 39 40 static const struct usbhs_pkt_handle usbhsf_null_handler = { 41 .prepare = usbhsf_null_handle, 42 .try_run = usbhsf_null_handle, 43 }; 44 45 void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt, 46 void (*done)(struct usbhs_priv *priv, 47 struct usbhs_pkt *pkt), 48 void *buf, int len, int zero, int sequence) 49 { 50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 51 struct device *dev = usbhs_priv_to_dev(priv); 52 unsigned long flags; 53 54 if (!done) { 55 dev_err(dev, "no done function\n"); 56 return; 57 } 58 59 /******************** spin lock ********************/ 60 usbhs_lock(priv, flags); 61 62 if (!pipe->handler) { 63 dev_err(dev, "no handler function\n"); 64 pipe->handler = &usbhsf_null_handler; 65 } 66 67 list_move_tail(&pkt->node, &pipe->list); 68 69 /* 70 * each pkt must hold own handler. 71 * because handler might be changed by its situation. 72 * dma handler -> pio handler. 73 */ 74 pkt->pipe = pipe; 75 pkt->buf = buf; 76 pkt->handler = pipe->handler; 77 pkt->length = len; 78 pkt->zero = zero; 79 pkt->actual = 0; 80 pkt->done = done; 81 pkt->sequence = sequence; 82 83 usbhs_unlock(priv, flags); 84 /******************** spin unlock ******************/ 85 } 86 87 static void __usbhsf_pkt_del(struct usbhs_pkt *pkt) 88 { 89 list_del_init(&pkt->node); 90 } 91 92 static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe) 93 { 94 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node); 95 } 96 97 static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 98 struct usbhs_fifo *fifo); 99 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 100 struct usbhs_fifo *fifo); 101 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 102 struct usbhs_pkt *pkt); 103 #define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1) 104 #define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0) 105 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map); 106 struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt) 107 { 108 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 109 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 110 unsigned long flags; 111 112 /******************** spin lock ********************/ 113 usbhs_lock(priv, flags); 114 115 usbhs_pipe_disable(pipe); 116 117 if (!pkt) 118 pkt = __usbhsf_pkt_get(pipe); 119 120 if (pkt) { 121 struct dma_chan *chan = NULL; 122 123 if (fifo) 124 chan = usbhsf_dma_chan_get(fifo, pkt); 125 if (chan) { 126 dmaengine_terminate_all(chan); 127 usbhsf_fifo_clear(pipe, fifo); 128 usbhsf_dma_unmap(pkt); 129 } 130 131 __usbhsf_pkt_del(pkt); 132 } 133 134 if (fifo) 135 usbhsf_fifo_unselect(pipe, fifo); 136 137 usbhs_unlock(priv, flags); 138 /******************** spin unlock ******************/ 139 140 return pkt; 141 } 142 143 enum { 144 USBHSF_PKT_PREPARE, 145 USBHSF_PKT_TRY_RUN, 146 USBHSF_PKT_DMA_DONE, 147 }; 148 149 static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type) 150 { 151 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 152 struct usbhs_pkt *pkt; 153 struct device *dev = usbhs_priv_to_dev(priv); 154 int (*func)(struct usbhs_pkt *pkt, int *is_done); 155 unsigned long flags; 156 int ret = 0; 157 int is_done = 0; 158 159 /******************** spin lock ********************/ 160 usbhs_lock(priv, flags); 161 162 pkt = __usbhsf_pkt_get(pipe); 163 if (!pkt) 164 goto __usbhs_pkt_handler_end; 165 166 switch (type) { 167 case USBHSF_PKT_PREPARE: 168 func = pkt->handler->prepare; 169 break; 170 case USBHSF_PKT_TRY_RUN: 171 func = pkt->handler->try_run; 172 break; 173 case USBHSF_PKT_DMA_DONE: 174 func = pkt->handler->dma_done; 175 break; 176 default: 177 dev_err(dev, "unknown pkt handler\n"); 178 goto __usbhs_pkt_handler_end; 179 } 180 181 if (likely(func)) 182 ret = func(pkt, &is_done); 183 184 if (is_done) 185 __usbhsf_pkt_del(pkt); 186 187 __usbhs_pkt_handler_end: 188 usbhs_unlock(priv, flags); 189 /******************** spin unlock ******************/ 190 191 if (is_done) { 192 pkt->done(priv, pkt); 193 usbhs_pkt_start(pipe); 194 } 195 196 return ret; 197 } 198 199 void usbhs_pkt_start(struct usbhs_pipe *pipe) 200 { 201 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE); 202 } 203 204 /* 205 * irq enable/disable function 206 */ 207 #define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e) 208 #define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e) 209 #define usbhsf_irq_callback_ctrl(pipe, status, enable) \ 210 ({ \ 211 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \ 212 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \ 213 u16 status = (1 << usbhs_pipe_number(pipe)); \ 214 if (!mod) \ 215 return; \ 216 if (enable) \ 217 mod->status |= status; \ 218 else \ 219 mod->status &= ~status; \ 220 usbhs_irq_callback_update(priv, mod); \ 221 }) 222 223 static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 224 { 225 /* 226 * And DCP pipe can NOT use "ready interrupt" for "send" 227 * it should use "empty" interrupt. 228 * see 229 * "Operation" - "Interrupt Function" - "BRDY Interrupt" 230 * 231 * on the other hand, normal pipe can use "ready interrupt" for "send" 232 * even though it is single/double buffer 233 */ 234 if (usbhs_pipe_is_dcp(pipe)) 235 usbhsf_irq_empty_ctrl(pipe, enable); 236 else 237 usbhsf_irq_ready_ctrl(pipe, enable); 238 } 239 240 static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable) 241 { 242 usbhsf_irq_ready_ctrl(pipe, enable); 243 } 244 245 /* 246 * FIFO ctrl 247 */ 248 static void usbhsf_send_terminator(struct usbhs_pipe *pipe, 249 struct usbhs_fifo *fifo) 250 { 251 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 252 253 usbhs_bset(priv, fifo->ctr, BVAL, BVAL); 254 } 255 256 static int usbhsf_fifo_barrier(struct usbhs_priv *priv, 257 struct usbhs_fifo *fifo) 258 { 259 int timeout = 1024; 260 261 do { 262 /* The FIFO port is accessible */ 263 if (usbhs_read(priv, fifo->ctr) & FRDY) 264 return 0; 265 266 udelay(10); 267 } while (timeout--); 268 269 return -EBUSY; 270 } 271 272 static void usbhsf_fifo_clear(struct usbhs_pipe *pipe, 273 struct usbhs_fifo *fifo) 274 { 275 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 276 int ret = 0; 277 278 if (!usbhs_pipe_is_dcp(pipe)) { 279 /* 280 * This driver checks the pipe condition first to avoid -EBUSY 281 * from usbhsf_fifo_barrier() with about 10 msec delay in 282 * the interrupt handler if the pipe is RX direction and empty. 283 */ 284 if (usbhs_pipe_is_dir_in(pipe)) 285 ret = usbhs_pipe_is_accessible(pipe); 286 if (!ret) 287 ret = usbhsf_fifo_barrier(priv, fifo); 288 } 289 290 /* 291 * if non-DCP pipe, this driver should set BCLR when 292 * usbhsf_fifo_barrier() returns 0. 293 */ 294 if (!ret) 295 usbhs_write(priv, fifo->ctr, BCLR); 296 } 297 298 static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv, 299 struct usbhs_fifo *fifo) 300 { 301 return usbhs_read(priv, fifo->ctr) & DTLN_MASK; 302 } 303 304 static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe, 305 struct usbhs_fifo *fifo) 306 { 307 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 308 309 usbhs_pipe_select_fifo(pipe, NULL); 310 usbhs_write(priv, fifo->sel, 0); 311 } 312 313 static int usbhsf_fifo_select(struct usbhs_pipe *pipe, 314 struct usbhs_fifo *fifo, 315 int write) 316 { 317 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 318 struct device *dev = usbhs_priv_to_dev(priv); 319 int timeout = 1024; 320 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */ 321 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */ 322 323 if (usbhs_pipe_is_busy(pipe) || 324 usbhsf_fifo_is_busy(fifo)) 325 return -EBUSY; 326 327 if (usbhs_pipe_is_dcp(pipe)) { 328 base |= (1 == write) << 5; /* ISEL */ 329 330 if (usbhs_mod_is_host(priv)) 331 usbhs_dcp_dir_for_host(pipe, write); 332 } 333 334 /* "base" will be used below */ 335 if (usbhs_get_dparam(priv, has_sudmac) && !usbhsf_is_cfifo(priv, fifo)) 336 usbhs_write(priv, fifo->sel, base); 337 else 338 usbhs_write(priv, fifo->sel, base | MBW_32); 339 340 /* check ISEL and CURPIPE value */ 341 while (timeout--) { 342 if (base == (mask & usbhs_read(priv, fifo->sel))) { 343 usbhs_pipe_select_fifo(pipe, fifo); 344 return 0; 345 } 346 udelay(10); 347 } 348 349 dev_err(dev, "fifo select error\n"); 350 351 return -EIO; 352 } 353 354 /* 355 * DCP status stage 356 */ 357 static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done) 358 { 359 struct usbhs_pipe *pipe = pkt->pipe; 360 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 361 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 362 struct device *dev = usbhs_priv_to_dev(priv); 363 int ret; 364 365 usbhs_pipe_disable(pipe); 366 367 ret = usbhsf_fifo_select(pipe, fifo, 1); 368 if (ret < 0) { 369 dev_err(dev, "%s() faile\n", __func__); 370 return ret; 371 } 372 373 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 374 375 usbhsf_fifo_clear(pipe, fifo); 376 usbhsf_send_terminator(pipe, fifo); 377 378 usbhsf_fifo_unselect(pipe, fifo); 379 380 usbhsf_tx_irq_ctrl(pipe, 1); 381 usbhs_pipe_enable(pipe); 382 383 return ret; 384 } 385 386 static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done) 387 { 388 struct usbhs_pipe *pipe = pkt->pipe; 389 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 390 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 391 struct device *dev = usbhs_priv_to_dev(priv); 392 int ret; 393 394 usbhs_pipe_disable(pipe); 395 396 ret = usbhsf_fifo_select(pipe, fifo, 0); 397 if (ret < 0) { 398 dev_err(dev, "%s() fail\n", __func__); 399 return ret; 400 } 401 402 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 403 usbhsf_fifo_clear(pipe, fifo); 404 405 usbhsf_fifo_unselect(pipe, fifo); 406 407 usbhsf_rx_irq_ctrl(pipe, 1); 408 usbhs_pipe_enable(pipe); 409 410 return ret; 411 412 } 413 414 static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done) 415 { 416 struct usbhs_pipe *pipe = pkt->pipe; 417 418 if (pkt->handler == &usbhs_dcp_status_stage_in_handler) 419 usbhsf_tx_irq_ctrl(pipe, 0); 420 else 421 usbhsf_rx_irq_ctrl(pipe, 0); 422 423 pkt->actual = pkt->length; 424 *is_done = 1; 425 426 return 0; 427 } 428 429 const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = { 430 .prepare = usbhs_dcp_dir_switch_to_write, 431 .try_run = usbhs_dcp_dir_switch_done, 432 }; 433 434 const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = { 435 .prepare = usbhs_dcp_dir_switch_to_read, 436 .try_run = usbhs_dcp_dir_switch_done, 437 }; 438 439 /* 440 * DCP data stage (push) 441 */ 442 static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done) 443 { 444 struct usbhs_pipe *pipe = pkt->pipe; 445 446 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 447 448 /* 449 * change handler to PIO push 450 */ 451 pkt->handler = &usbhs_fifo_pio_push_handler; 452 453 return pkt->handler->prepare(pkt, is_done); 454 } 455 456 const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = { 457 .prepare = usbhsf_dcp_data_stage_try_push, 458 }; 459 460 /* 461 * DCP data stage (pop) 462 */ 463 static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt, 464 int *is_done) 465 { 466 struct usbhs_pipe *pipe = pkt->pipe; 467 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 468 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 469 470 if (usbhs_pipe_is_busy(pipe)) 471 return 0; 472 473 /* 474 * prepare pop for DCP should 475 * - change DCP direction, 476 * - clear fifo 477 * - DATA1 478 */ 479 usbhs_pipe_disable(pipe); 480 481 usbhs_pipe_sequence_data1(pipe); /* DATA1 */ 482 483 usbhsf_fifo_select(pipe, fifo, 0); 484 usbhsf_fifo_clear(pipe, fifo); 485 usbhsf_fifo_unselect(pipe, fifo); 486 487 /* 488 * change handler to PIO pop 489 */ 490 pkt->handler = &usbhs_fifo_pio_pop_handler; 491 492 return pkt->handler->prepare(pkt, is_done); 493 } 494 495 const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = { 496 .prepare = usbhsf_dcp_data_stage_prepare_pop, 497 }; 498 499 /* 500 * PIO push handler 501 */ 502 static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done) 503 { 504 struct usbhs_pipe *pipe = pkt->pipe; 505 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 506 struct device *dev = usbhs_priv_to_dev(priv); 507 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 508 void __iomem *addr = priv->base + fifo->port; 509 u8 *buf; 510 int maxp = usbhs_pipe_get_maxpacket(pipe); 511 int total_len; 512 int i, ret, len; 513 int is_short; 514 515 usbhs_pipe_data_sequence(pipe, pkt->sequence); 516 pkt->sequence = -1; /* -1 sequence will be ignored */ 517 518 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 519 520 ret = usbhsf_fifo_select(pipe, fifo, 1); 521 if (ret < 0) 522 return 0; 523 524 ret = usbhs_pipe_is_accessible(pipe); 525 if (ret < 0) { 526 /* inaccessible pipe is not an error */ 527 ret = 0; 528 goto usbhs_fifo_write_busy; 529 } 530 531 ret = usbhsf_fifo_barrier(priv, fifo); 532 if (ret < 0) 533 goto usbhs_fifo_write_busy; 534 535 buf = pkt->buf + pkt->actual; 536 len = pkt->length - pkt->actual; 537 len = min(len, maxp); 538 total_len = len; 539 is_short = total_len < maxp; 540 541 /* 542 * FIXME 543 * 544 * 32-bit access only 545 */ 546 if (len >= 4 && !((unsigned long)buf & 0x03)) { 547 iowrite32_rep(addr, buf, len / 4); 548 len %= 4; 549 buf += total_len - len; 550 } 551 552 /* the rest operation */ 553 for (i = 0; i < len; i++) 554 iowrite8(buf[i], addr + (0x03 - (i & 0x03))); 555 556 /* 557 * variable update 558 */ 559 pkt->actual += total_len; 560 561 if (pkt->actual < pkt->length) 562 *is_done = 0; /* there are remainder data */ 563 else if (is_short) 564 *is_done = 1; /* short packet */ 565 else 566 *is_done = !pkt->zero; /* send zero packet ? */ 567 568 /* 569 * pipe/irq handling 570 */ 571 if (is_short) 572 usbhsf_send_terminator(pipe, fifo); 573 574 usbhsf_tx_irq_ctrl(pipe, !*is_done); 575 usbhs_pipe_running(pipe, !*is_done); 576 usbhs_pipe_enable(pipe); 577 578 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n", 579 usbhs_pipe_number(pipe), 580 pkt->length, pkt->actual, *is_done, pkt->zero); 581 582 usbhsf_fifo_unselect(pipe, fifo); 583 584 return 0; 585 586 usbhs_fifo_write_busy: 587 usbhsf_fifo_unselect(pipe, fifo); 588 589 /* 590 * pipe is busy. 591 * retry in interrupt 592 */ 593 usbhsf_tx_irq_ctrl(pipe, 1); 594 usbhs_pipe_running(pipe, 1); 595 596 return ret; 597 } 598 599 static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done) 600 { 601 if (usbhs_pipe_is_running(pkt->pipe)) 602 return 0; 603 604 return usbhsf_pio_try_push(pkt, is_done); 605 } 606 607 const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = { 608 .prepare = usbhsf_pio_prepare_push, 609 .try_run = usbhsf_pio_try_push, 610 }; 611 612 /* 613 * PIO pop handler 614 */ 615 static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 616 { 617 struct usbhs_pipe *pipe = pkt->pipe; 618 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 619 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); 620 621 if (usbhs_pipe_is_busy(pipe)) 622 return 0; 623 624 if (usbhs_pipe_is_running(pipe)) 625 return 0; 626 627 /* 628 * pipe enable to prepare packet receive 629 */ 630 usbhs_pipe_data_sequence(pipe, pkt->sequence); 631 pkt->sequence = -1; /* -1 sequence will be ignored */ 632 633 if (usbhs_pipe_is_dcp(pipe)) 634 usbhsf_fifo_clear(pipe, fifo); 635 636 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length); 637 usbhs_pipe_enable(pipe); 638 usbhs_pipe_running(pipe, 1); 639 usbhsf_rx_irq_ctrl(pipe, 1); 640 641 return 0; 642 } 643 644 static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done) 645 { 646 struct usbhs_pipe *pipe = pkt->pipe; 647 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 648 struct device *dev = usbhs_priv_to_dev(priv); 649 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 650 void __iomem *addr = priv->base + fifo->port; 651 u8 *buf; 652 u32 data = 0; 653 int maxp = usbhs_pipe_get_maxpacket(pipe); 654 int rcv_len, len; 655 int i, ret; 656 int total_len = 0; 657 658 ret = usbhsf_fifo_select(pipe, fifo, 0); 659 if (ret < 0) 660 return 0; 661 662 ret = usbhsf_fifo_barrier(priv, fifo); 663 if (ret < 0) 664 goto usbhs_fifo_read_busy; 665 666 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 667 668 buf = pkt->buf + pkt->actual; 669 len = pkt->length - pkt->actual; 670 len = min(len, rcv_len); 671 total_len = len; 672 673 /* 674 * update actual length first here to decide disable pipe. 675 * if this pipe keeps BUF status and all data were popped, 676 * then, next interrupt/token will be issued again 677 */ 678 pkt->actual += total_len; 679 680 if ((pkt->actual == pkt->length) || /* receive all data */ 681 (total_len < maxp)) { /* short packet */ 682 *is_done = 1; 683 usbhsf_rx_irq_ctrl(pipe, 0); 684 usbhs_pipe_running(pipe, 0); 685 /* 686 * If function mode, since this controller is possible to enter 687 * Control Write status stage at this timing, this driver 688 * should not disable the pipe. If such a case happens, this 689 * controller is not able to complete the status stage. 690 */ 691 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe)) 692 usbhs_pipe_disable(pipe); /* disable pipe first */ 693 } 694 695 /* 696 * Buffer clear if Zero-Length packet 697 * 698 * see 699 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function" 700 */ 701 if (0 == rcv_len) { 702 pkt->zero = 1; 703 usbhsf_fifo_clear(pipe, fifo); 704 goto usbhs_fifo_read_end; 705 } 706 707 /* 708 * FIXME 709 * 710 * 32-bit access only 711 */ 712 if (len >= 4 && !((unsigned long)buf & 0x03)) { 713 ioread32_rep(addr, buf, len / 4); 714 len %= 4; 715 buf += total_len - len; 716 } 717 718 /* the rest operation */ 719 for (i = 0; i < len; i++) { 720 if (!(i & 0x03)) 721 data = ioread32(addr); 722 723 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff; 724 } 725 726 usbhs_fifo_read_end: 727 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n", 728 usbhs_pipe_number(pipe), 729 pkt->length, pkt->actual, *is_done, pkt->zero); 730 731 usbhs_fifo_read_busy: 732 usbhsf_fifo_unselect(pipe, fifo); 733 734 return ret; 735 } 736 737 const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = { 738 .prepare = usbhsf_prepare_pop, 739 .try_run = usbhsf_pio_try_pop, 740 }; 741 742 /* 743 * DCP ctrol statge handler 744 */ 745 static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done) 746 { 747 usbhs_dcp_control_transfer_done(pkt->pipe); 748 749 *is_done = 1; 750 751 return 0; 752 } 753 754 const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = { 755 .prepare = usbhsf_ctrl_stage_end, 756 .try_run = usbhsf_ctrl_stage_end, 757 }; 758 759 /* 760 * DMA fifo functions 761 */ 762 static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo, 763 struct usbhs_pkt *pkt) 764 { 765 if (&usbhs_fifo_dma_push_handler == pkt->handler) 766 return fifo->tx_chan; 767 768 if (&usbhs_fifo_dma_pop_handler == pkt->handler) 769 return fifo->rx_chan; 770 771 return NULL; 772 } 773 774 static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv, 775 struct usbhs_pkt *pkt) 776 { 777 struct usbhs_fifo *fifo; 778 int i; 779 780 usbhs_for_each_dfifo(priv, fifo, i) { 781 if (usbhsf_dma_chan_get(fifo, pkt) && 782 !usbhsf_fifo_is_busy(fifo)) 783 return fifo; 784 } 785 786 return NULL; 787 } 788 789 #define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE) 790 #define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0) 791 static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe, 792 struct usbhs_fifo *fifo, 793 u16 dreqe) 794 { 795 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 796 797 usbhs_bset(priv, fifo->sel, DREQE, dreqe); 798 } 799 800 static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map) 801 { 802 struct usbhs_pipe *pipe = pkt->pipe; 803 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 804 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv); 805 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 806 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 807 808 return info->dma_map_ctrl(chan->device->dev, pkt, map); 809 } 810 811 static void usbhsf_dma_complete(void *arg); 812 static void xfer_work(struct work_struct *work) 813 { 814 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work); 815 struct usbhs_pipe *pipe = pkt->pipe; 816 struct usbhs_fifo *fifo; 817 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 818 struct dma_async_tx_descriptor *desc; 819 struct dma_chan *chan; 820 struct device *dev = usbhs_priv_to_dev(priv); 821 enum dma_transfer_direction dir; 822 unsigned long flags; 823 824 usbhs_lock(priv, flags); 825 fifo = usbhs_pipe_to_fifo(pipe); 826 if (!fifo) 827 goto xfer_work_end; 828 829 chan = usbhsf_dma_chan_get(fifo, pkt); 830 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV; 831 832 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual, 833 pkt->trans, dir, 834 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 835 if (!desc) 836 goto xfer_work_end; 837 838 desc->callback = usbhsf_dma_complete; 839 desc->callback_param = pipe; 840 841 pkt->cookie = dmaengine_submit(desc); 842 if (pkt->cookie < 0) { 843 dev_err(dev, "Failed to submit dma descriptor\n"); 844 goto xfer_work_end; 845 } 846 847 dev_dbg(dev, " %s %d (%d/ %d)\n", 848 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero); 849 850 usbhs_pipe_running(pipe, 1); 851 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans); 852 dma_async_issue_pending(chan); 853 usbhsf_dma_start(pipe, fifo); 854 usbhs_pipe_enable(pipe); 855 856 xfer_work_end: 857 usbhs_unlock(priv, flags); 858 } 859 860 /* 861 * DMA push handler 862 */ 863 static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done) 864 { 865 struct usbhs_pipe *pipe = pkt->pipe; 866 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 867 struct usbhs_fifo *fifo; 868 int len = pkt->length - pkt->actual; 869 int ret; 870 uintptr_t align_mask; 871 872 if (usbhs_pipe_is_busy(pipe)) 873 return 0; 874 875 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 876 if ((len < usbhs_get_dparam(priv, pio_dma_border)) || 877 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 878 goto usbhsf_pio_prepare_push; 879 880 /* check data length if this driver don't use USB-DMAC */ 881 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7) 882 goto usbhsf_pio_prepare_push; 883 884 /* check buffer alignment */ 885 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ? 886 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7; 887 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask) 888 goto usbhsf_pio_prepare_push; 889 890 /* return at this time if the pipe is running */ 891 if (usbhs_pipe_is_running(pipe)) 892 return 0; 893 894 /* get enable DMA fifo */ 895 fifo = usbhsf_get_dma_fifo(priv, pkt); 896 if (!fifo) 897 goto usbhsf_pio_prepare_push; 898 899 ret = usbhsf_fifo_select(pipe, fifo, 0); 900 if (ret < 0) 901 goto usbhsf_pio_prepare_push; 902 903 if (usbhsf_dma_map(pkt) < 0) 904 goto usbhsf_pio_prepare_push_unselect; 905 906 pkt->trans = len; 907 908 usbhsf_tx_irq_ctrl(pipe, 0); 909 INIT_WORK(&pkt->work, xfer_work); 910 schedule_work(&pkt->work); 911 912 return 0; 913 914 usbhsf_pio_prepare_push_unselect: 915 usbhsf_fifo_unselect(pipe, fifo); 916 usbhsf_pio_prepare_push: 917 /* 918 * change handler to PIO 919 */ 920 pkt->handler = &usbhs_fifo_pio_push_handler; 921 922 return pkt->handler->prepare(pkt, is_done); 923 } 924 925 static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done) 926 { 927 struct usbhs_pipe *pipe = pkt->pipe; 928 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe); 929 930 pkt->actual += pkt->trans; 931 932 if (pkt->actual < pkt->length) 933 *is_done = 0; /* there are remainder data */ 934 else if (is_short) 935 *is_done = 1; /* short packet */ 936 else 937 *is_done = !pkt->zero; /* send zero packet? */ 938 939 usbhs_pipe_running(pipe, !*is_done); 940 941 usbhsf_dma_stop(pipe, pipe->fifo); 942 usbhsf_dma_unmap(pkt); 943 usbhsf_fifo_unselect(pipe, pipe->fifo); 944 945 if (!*is_done) { 946 /* change handler to PIO */ 947 pkt->handler = &usbhs_fifo_pio_push_handler; 948 return pkt->handler->try_run(pkt, is_done); 949 } 950 951 return 0; 952 } 953 954 const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = { 955 .prepare = usbhsf_dma_prepare_push, 956 .dma_done = usbhsf_dma_push_done, 957 }; 958 959 /* 960 * DMA pop handler 961 */ 962 963 static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt, 964 int *is_done) 965 { 966 return usbhsf_prepare_pop(pkt, is_done); 967 } 968 969 static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt, 970 int *is_done) 971 { 972 struct usbhs_pipe *pipe = pkt->pipe; 973 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 974 struct usbhs_fifo *fifo; 975 int ret; 976 977 if (usbhs_pipe_is_busy(pipe)) 978 return 0; 979 980 /* use PIO if packet is less than pio_dma_border or pipe is DCP */ 981 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) || 982 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC)) 983 goto usbhsf_pio_prepare_pop; 984 985 fifo = usbhsf_get_dma_fifo(priv, pkt); 986 if (!fifo) 987 goto usbhsf_pio_prepare_pop; 988 989 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1)) 990 goto usbhsf_pio_prepare_pop; 991 992 usbhs_pipe_config_change_bfre(pipe, 1); 993 994 ret = usbhsf_fifo_select(pipe, fifo, 0); 995 if (ret < 0) 996 goto usbhsf_pio_prepare_pop; 997 998 if (usbhsf_dma_map(pkt) < 0) 999 goto usbhsf_pio_prepare_pop_unselect; 1000 1001 /* DMA */ 1002 1003 /* 1004 * usbhs_fifo_dma_pop_handler :: prepare 1005 * enabled irq to come here. 1006 * but it is no longer needed for DMA. disable it. 1007 */ 1008 usbhsf_rx_irq_ctrl(pipe, 0); 1009 1010 pkt->trans = pkt->length; 1011 1012 INIT_WORK(&pkt->work, xfer_work); 1013 schedule_work(&pkt->work); 1014 1015 return 0; 1016 1017 usbhsf_pio_prepare_pop_unselect: 1018 usbhsf_fifo_unselect(pipe, fifo); 1019 usbhsf_pio_prepare_pop: 1020 1021 /* 1022 * change handler to PIO 1023 */ 1024 pkt->handler = &usbhs_fifo_pio_pop_handler; 1025 usbhs_pipe_config_change_bfre(pipe, 0); 1026 1027 return pkt->handler->prepare(pkt, is_done); 1028 } 1029 1030 static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done) 1031 { 1032 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1033 1034 if (usbhs_get_dparam(priv, has_usb_dmac)) 1035 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done); 1036 else 1037 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done); 1038 } 1039 1040 static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1041 { 1042 struct usbhs_pipe *pipe = pkt->pipe; 1043 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1044 struct usbhs_fifo *fifo; 1045 int len, ret; 1046 1047 if (usbhs_pipe_is_busy(pipe)) 1048 return 0; 1049 1050 if (usbhs_pipe_is_dcp(pipe)) 1051 goto usbhsf_pio_prepare_pop; 1052 1053 /* get enable DMA fifo */ 1054 fifo = usbhsf_get_dma_fifo(priv, pkt); 1055 if (!fifo) 1056 goto usbhsf_pio_prepare_pop; 1057 1058 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */ 1059 goto usbhsf_pio_prepare_pop; 1060 1061 ret = usbhsf_fifo_select(pipe, fifo, 0); 1062 if (ret < 0) 1063 goto usbhsf_pio_prepare_pop; 1064 1065 /* use PIO if packet is less than pio_dma_border */ 1066 len = usbhsf_fifo_rcv_len(priv, fifo); 1067 len = min(pkt->length - pkt->actual, len); 1068 if (len & 0x7) /* 8byte alignment */ 1069 goto usbhsf_pio_prepare_pop_unselect; 1070 1071 if (len < usbhs_get_dparam(priv, pio_dma_border)) 1072 goto usbhsf_pio_prepare_pop_unselect; 1073 1074 ret = usbhsf_fifo_barrier(priv, fifo); 1075 if (ret < 0) 1076 goto usbhsf_pio_prepare_pop_unselect; 1077 1078 if (usbhsf_dma_map(pkt) < 0) 1079 goto usbhsf_pio_prepare_pop_unselect; 1080 1081 /* DMA */ 1082 1083 /* 1084 * usbhs_fifo_dma_pop_handler :: prepare 1085 * enabled irq to come here. 1086 * but it is no longer needed for DMA. disable it. 1087 */ 1088 usbhsf_rx_irq_ctrl(pipe, 0); 1089 1090 pkt->trans = len; 1091 1092 INIT_WORK(&pkt->work, xfer_work); 1093 schedule_work(&pkt->work); 1094 1095 return 0; 1096 1097 usbhsf_pio_prepare_pop_unselect: 1098 usbhsf_fifo_unselect(pipe, fifo); 1099 usbhsf_pio_prepare_pop: 1100 1101 /* 1102 * change handler to PIO 1103 */ 1104 pkt->handler = &usbhs_fifo_pio_pop_handler; 1105 1106 return pkt->handler->try_run(pkt, is_done); 1107 } 1108 1109 static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done) 1110 { 1111 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1112 1113 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac)); 1114 1115 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done); 1116 } 1117 1118 static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done) 1119 { 1120 struct usbhs_pipe *pipe = pkt->pipe; 1121 int maxp = usbhs_pipe_get_maxpacket(pipe); 1122 1123 usbhsf_dma_stop(pipe, pipe->fifo); 1124 usbhsf_dma_unmap(pkt); 1125 usbhsf_fifo_unselect(pipe, pipe->fifo); 1126 1127 pkt->actual += pkt->trans; 1128 1129 if ((pkt->actual == pkt->length) || /* receive all data */ 1130 (pkt->trans < maxp)) { /* short packet */ 1131 *is_done = 1; 1132 usbhs_pipe_running(pipe, 0); 1133 } else { 1134 /* re-enable */ 1135 usbhs_pipe_running(pipe, 0); 1136 usbhsf_prepare_pop(pkt, is_done); 1137 } 1138 1139 return 0; 1140 } 1141 1142 static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt, 1143 struct dma_chan *chan, int dtln) 1144 { 1145 struct usbhs_pipe *pipe = pkt->pipe; 1146 struct dma_tx_state state; 1147 size_t received_size; 1148 int maxp = usbhs_pipe_get_maxpacket(pipe); 1149 1150 dmaengine_tx_status(chan, pkt->cookie, &state); 1151 received_size = pkt->length - state.residue; 1152 1153 if (dtln) { 1154 received_size -= USBHS_USB_DMAC_XFER_SIZE; 1155 received_size &= ~(maxp - 1); 1156 received_size += dtln; 1157 } 1158 1159 return received_size; 1160 } 1161 1162 static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt, 1163 int *is_done) 1164 { 1165 struct usbhs_pipe *pipe = pkt->pipe; 1166 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1167 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe); 1168 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt); 1169 int rcv_len; 1170 1171 /* 1172 * Since the driver disables rx_irq in DMA mode, the interrupt handler 1173 * cannot the BRDYSTS. So, the function clears it here because the 1174 * driver may use PIO mode next time. 1175 */ 1176 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe)); 1177 1178 rcv_len = usbhsf_fifo_rcv_len(priv, fifo); 1179 usbhsf_fifo_clear(pipe, fifo); 1180 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len); 1181 1182 usbhsf_dma_stop(pipe, fifo); 1183 usbhsf_dma_unmap(pkt); 1184 usbhsf_fifo_unselect(pipe, pipe->fifo); 1185 1186 /* The driver can assume the rx transaction is always "done" */ 1187 *is_done = 1; 1188 1189 return 0; 1190 } 1191 1192 static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done) 1193 { 1194 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe); 1195 1196 if (usbhs_get_dparam(priv, has_usb_dmac)) 1197 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done); 1198 else 1199 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done); 1200 } 1201 1202 const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = { 1203 .prepare = usbhsf_dma_prepare_pop, 1204 .try_run = usbhsf_dma_try_pop, 1205 .dma_done = usbhsf_dma_pop_done 1206 }; 1207 1208 /* 1209 * DMA setting 1210 */ 1211 static bool usbhsf_dma_filter(struct dma_chan *chan, void *param) 1212 { 1213 struct sh_dmae_slave *slave = param; 1214 1215 /* 1216 * FIXME 1217 * 1218 * usbhs doesn't recognize id = 0 as valid DMA 1219 */ 1220 if (0 == slave->shdma_slave.slave_id) 1221 return false; 1222 1223 chan->private = slave; 1224 1225 return true; 1226 } 1227 1228 static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo) 1229 { 1230 if (fifo->tx_chan) 1231 dma_release_channel(fifo->tx_chan); 1232 if (fifo->rx_chan) 1233 dma_release_channel(fifo->rx_chan); 1234 1235 fifo->tx_chan = NULL; 1236 fifo->rx_chan = NULL; 1237 } 1238 1239 static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo) 1240 { 1241 dma_cap_mask_t mask; 1242 1243 dma_cap_zero(mask); 1244 dma_cap_set(DMA_SLAVE, mask); 1245 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1246 &fifo->tx_slave); 1247 1248 dma_cap_zero(mask); 1249 dma_cap_set(DMA_SLAVE, mask); 1250 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter, 1251 &fifo->rx_slave); 1252 } 1253 1254 static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo, 1255 int channel) 1256 { 1257 char name[16]; 1258 1259 /* 1260 * To avoid complex handing for DnFIFOs, the driver uses each 1261 * DnFIFO as TX or RX direction (not bi-direction). 1262 * So, the driver uses odd channels for TX, even channels for RX. 1263 */ 1264 snprintf(name, sizeof(name), "ch%d", channel); 1265 if (channel & 1) { 1266 fifo->tx_chan = dma_request_slave_channel_reason(dev, name); 1267 if (IS_ERR(fifo->tx_chan)) 1268 fifo->tx_chan = NULL; 1269 } else { 1270 fifo->rx_chan = dma_request_slave_channel_reason(dev, name); 1271 if (IS_ERR(fifo->rx_chan)) 1272 fifo->rx_chan = NULL; 1273 } 1274 } 1275 1276 static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo, 1277 int channel) 1278 { 1279 struct device *dev = usbhs_priv_to_dev(priv); 1280 1281 if (dev->of_node) 1282 usbhsf_dma_init_dt(dev, fifo, channel); 1283 else 1284 usbhsf_dma_init_pdev(fifo); 1285 1286 if (fifo->tx_chan || fifo->rx_chan) 1287 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n", 1288 fifo->name, 1289 fifo->tx_chan ? "[TX]" : " ", 1290 fifo->rx_chan ? "[RX]" : " "); 1291 } 1292 1293 /* 1294 * irq functions 1295 */ 1296 static int usbhsf_irq_empty(struct usbhs_priv *priv, 1297 struct usbhs_irq_state *irq_state) 1298 { 1299 struct usbhs_pipe *pipe; 1300 struct device *dev = usbhs_priv_to_dev(priv); 1301 int i, ret; 1302 1303 if (!irq_state->bempsts) { 1304 dev_err(dev, "debug %s !!\n", __func__); 1305 return -EIO; 1306 } 1307 1308 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts); 1309 1310 /* 1311 * search interrupted "pipe" 1312 * not "uep". 1313 */ 1314 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1315 if (!(irq_state->bempsts & (1 << i))) 1316 continue; 1317 1318 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1319 if (ret < 0) 1320 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret); 1321 } 1322 1323 return 0; 1324 } 1325 1326 static int usbhsf_irq_ready(struct usbhs_priv *priv, 1327 struct usbhs_irq_state *irq_state) 1328 { 1329 struct usbhs_pipe *pipe; 1330 struct device *dev = usbhs_priv_to_dev(priv); 1331 int i, ret; 1332 1333 if (!irq_state->brdysts) { 1334 dev_err(dev, "debug %s !!\n", __func__); 1335 return -EIO; 1336 } 1337 1338 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts); 1339 1340 /* 1341 * search interrupted "pipe" 1342 * not "uep". 1343 */ 1344 usbhs_for_each_pipe_with_dcp(pipe, priv, i) { 1345 if (!(irq_state->brdysts & (1 << i))) 1346 continue; 1347 1348 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN); 1349 if (ret < 0) 1350 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret); 1351 } 1352 1353 return 0; 1354 } 1355 1356 static void usbhsf_dma_complete(void *arg) 1357 { 1358 struct usbhs_pipe *pipe = arg; 1359 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1360 struct device *dev = usbhs_priv_to_dev(priv); 1361 int ret; 1362 1363 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE); 1364 if (ret < 0) 1365 dev_err(dev, "dma_complete run_error %d : %d\n", 1366 usbhs_pipe_number(pipe), ret); 1367 } 1368 1369 void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe) 1370 { 1371 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); 1372 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */ 1373 1374 /* clear DCP FIFO of transmission */ 1375 if (usbhsf_fifo_select(pipe, fifo, 1) < 0) 1376 return; 1377 usbhsf_fifo_clear(pipe, fifo); 1378 usbhsf_fifo_unselect(pipe, fifo); 1379 1380 /* clear DCP FIFO of reception */ 1381 if (usbhsf_fifo_select(pipe, fifo, 0) < 0) 1382 return; 1383 usbhsf_fifo_clear(pipe, fifo); 1384 usbhsf_fifo_unselect(pipe, fifo); 1385 } 1386 1387 /* 1388 * fifo init 1389 */ 1390 void usbhs_fifo_init(struct usbhs_priv *priv) 1391 { 1392 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1393 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv); 1394 struct usbhs_fifo *dfifo; 1395 int i; 1396 1397 mod->irq_empty = usbhsf_irq_empty; 1398 mod->irq_ready = usbhsf_irq_ready; 1399 mod->irq_bempsts = 0; 1400 mod->irq_brdysts = 0; 1401 1402 cfifo->pipe = NULL; 1403 usbhs_for_each_dfifo(priv, dfifo, i) 1404 dfifo->pipe = NULL; 1405 } 1406 1407 void usbhs_fifo_quit(struct usbhs_priv *priv) 1408 { 1409 struct usbhs_mod *mod = usbhs_mod_get_current(priv); 1410 1411 mod->irq_empty = NULL; 1412 mod->irq_ready = NULL; 1413 mod->irq_bempsts = 0; 1414 mod->irq_brdysts = 0; 1415 } 1416 1417 #define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \ 1418 do { \ 1419 fifo = usbhsf_get_dnfifo(priv, channel); \ 1420 fifo->name = "D"#channel"FIFO"; \ 1421 fifo->port = fifo_port; \ 1422 fifo->sel = D##channel##FIFOSEL; \ 1423 fifo->ctr = D##channel##FIFOCTR; \ 1424 fifo->tx_slave.shdma_slave.slave_id = \ 1425 usbhs_get_dparam(priv, d##channel##_tx_id); \ 1426 fifo->rx_slave.shdma_slave.slave_id = \ 1427 usbhs_get_dparam(priv, d##channel##_rx_id); \ 1428 usbhsf_dma_init(priv, fifo, channel); \ 1429 } while (0) 1430 1431 #define USBHS_DFIFO_INIT(priv, fifo, channel) \ 1432 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO) 1433 #define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \ 1434 __USBHS_DFIFO_INIT(priv, fifo, channel, 0) 1435 1436 int usbhs_fifo_probe(struct usbhs_priv *priv) 1437 { 1438 struct usbhs_fifo *fifo; 1439 1440 /* CFIFO */ 1441 fifo = usbhsf_get_cfifo(priv); 1442 fifo->name = "CFIFO"; 1443 fifo->port = CFIFO; 1444 fifo->sel = CFIFOSEL; 1445 fifo->ctr = CFIFOCTR; 1446 1447 /* DFIFO */ 1448 USBHS_DFIFO_INIT(priv, fifo, 0); 1449 USBHS_DFIFO_INIT(priv, fifo, 1); 1450 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2); 1451 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3); 1452 1453 return 0; 1454 } 1455 1456 void usbhs_fifo_remove(struct usbhs_priv *priv) 1457 { 1458 struct usbhs_fifo *fifo; 1459 int i; 1460 1461 usbhs_for_each_dfifo(priv, fifo, i) 1462 usbhsf_dma_quit(priv, fifo); 1463 } 1464