1 /* 2 * MUSB OTG driver virtual root hub support 3 * 4 * Copyright 2005 Mentor Graphics Corporation 5 * Copyright (C) 2005-2006 by Texas Instruments 6 * Copyright (C) 2006-2007 Nokia Corporation 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * version 2 as published by the Free Software Foundation. 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 20 * 02110-1301 USA 21 * 22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN 25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON 29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <linux/module.h> 36 #include <linux/kernel.h> 37 #include <linux/sched.h> 38 #include <linux/errno.h> 39 #include <linux/init.h> 40 #include <linux/time.h> 41 #include <linux/timer.h> 42 43 #include <asm/unaligned.h> 44 45 #include "musb_core.h" 46 47 /* 48 * Program the HDRC to start (enable interrupts, dma, etc.). 49 */ 50 static void musb_start(struct musb *musb) 51 { 52 void __iomem *regs = musb->mregs; 53 u8 devctl = musb_readb(regs, MUSB_DEVCTL); 54 55 dev_dbg(musb->controller, "<== devctl %02x\n", devctl); 56 57 /* Set INT enable registers, enable interrupts */ 58 musb->intrtxe = musb->epmask; 59 musb_writew(regs, MUSB_INTRTXE, musb->intrtxe); 60 musb->intrrxe = musb->epmask & 0xfffe; 61 musb_writew(regs, MUSB_INTRRXE, musb->intrrxe); 62 musb_writeb(regs, MUSB_INTRUSBE, 0xf7); 63 64 musb_writeb(regs, MUSB_TESTMODE, 0); 65 66 /* put into basic highspeed mode and start session */ 67 musb_writeb(regs, MUSB_POWER, MUSB_POWER_ISOUPDATE 68 | MUSB_POWER_HSENAB 69 /* ENSUSPEND wedges tusb */ 70 /* | MUSB_POWER_ENSUSPEND */ 71 ); 72 73 musb->is_active = 0; 74 devctl = musb_readb(regs, MUSB_DEVCTL); 75 devctl &= ~MUSB_DEVCTL_SESSION; 76 77 /* session started after: 78 * (a) ID-grounded irq, host mode; 79 * (b) vbus present/connect IRQ, peripheral mode; 80 * (c) peripheral initiates, using SRP 81 */ 82 if (musb->port_mode != MUSB_PORT_MODE_HOST && 83 (devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS) { 84 musb->is_active = 1; 85 } else { 86 devctl |= MUSB_DEVCTL_SESSION; 87 } 88 89 musb_platform_enable(musb); 90 musb_writeb(regs, MUSB_DEVCTL, devctl); 91 } 92 93 static void musb_port_suspend(struct musb *musb, bool do_suspend) 94 { 95 struct usb_otg *otg = musb->xceiv->otg; 96 u8 power; 97 void __iomem *mbase = musb->mregs; 98 99 if (!is_host_active(musb)) 100 return; 101 102 /* NOTE: this doesn't necessarily put PHY into low power mode, 103 * turning off its clock; that's a function of PHY integration and 104 * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect 105 * SE0 changing to connect (J) or wakeup (K) states. 106 */ 107 power = musb_readb(mbase, MUSB_POWER); 108 if (do_suspend) { 109 int retries = 10000; 110 111 power &= ~MUSB_POWER_RESUME; 112 power |= MUSB_POWER_SUSPENDM; 113 musb_writeb(mbase, MUSB_POWER, power); 114 115 /* Needed for OPT A tests */ 116 power = musb_readb(mbase, MUSB_POWER); 117 while (power & MUSB_POWER_SUSPENDM) { 118 power = musb_readb(mbase, MUSB_POWER); 119 if (retries-- < 1) 120 break; 121 } 122 123 dev_dbg(musb->controller, "Root port suspended, power %02x\n", power); 124 125 musb->port1_status |= USB_PORT_STAT_SUSPEND; 126 switch (musb->xceiv->state) { 127 case OTG_STATE_A_HOST: 128 musb->xceiv->state = OTG_STATE_A_SUSPEND; 129 musb->is_active = otg->host->b_hnp_enable; 130 if (musb->is_active) 131 mod_timer(&musb->otg_timer, jiffies 132 + msecs_to_jiffies( 133 OTG_TIME_A_AIDL_BDIS)); 134 musb_platform_try_idle(musb, 0); 135 break; 136 case OTG_STATE_B_HOST: 137 musb->xceiv->state = OTG_STATE_B_WAIT_ACON; 138 musb->is_active = otg->host->b_hnp_enable; 139 musb_platform_try_idle(musb, 0); 140 break; 141 default: 142 dev_dbg(musb->controller, "bogus rh suspend? %s\n", 143 usb_otg_state_string(musb->xceiv->state)); 144 } 145 } else if (power & MUSB_POWER_SUSPENDM) { 146 power &= ~MUSB_POWER_SUSPENDM; 147 power |= MUSB_POWER_RESUME; 148 musb_writeb(mbase, MUSB_POWER, power); 149 150 dev_dbg(musb->controller, "Root port resuming, power %02x\n", power); 151 152 /* later, GetPortStatus will stop RESUME signaling */ 153 musb->port1_status |= MUSB_PORT_STAT_RESUME; 154 musb->rh_timer = jiffies + msecs_to_jiffies(20); 155 } 156 } 157 158 static void musb_port_reset(struct musb *musb, bool do_reset) 159 { 160 u8 power; 161 void __iomem *mbase = musb->mregs; 162 163 if (musb->xceiv->state == OTG_STATE_B_IDLE) { 164 dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n"); 165 musb->port1_status &= ~USB_PORT_STAT_RESET; 166 return; 167 } 168 169 if (!is_host_active(musb)) 170 return; 171 172 /* NOTE: caller guarantees it will turn off the reset when 173 * the appropriate amount of time has passed 174 */ 175 power = musb_readb(mbase, MUSB_POWER); 176 if (do_reset) { 177 178 /* 179 * If RESUME is set, we must make sure it stays minimum 20 ms. 180 * Then we must clear RESUME and wait a bit to let musb start 181 * generating SOFs. If we don't do this, OPT HS A 6.8 tests 182 * fail with "Error! Did not receive an SOF before suspend 183 * detected". 184 */ 185 if (power & MUSB_POWER_RESUME) { 186 while (time_before(jiffies, musb->rh_timer)) 187 msleep(1); 188 musb_writeb(mbase, MUSB_POWER, 189 power & ~MUSB_POWER_RESUME); 190 msleep(1); 191 } 192 193 power &= 0xf0; 194 musb_writeb(mbase, MUSB_POWER, 195 power | MUSB_POWER_RESET); 196 197 musb->port1_status |= USB_PORT_STAT_RESET; 198 musb->port1_status &= ~USB_PORT_STAT_ENABLE; 199 musb->rh_timer = jiffies + msecs_to_jiffies(50); 200 } else { 201 dev_dbg(musb->controller, "root port reset stopped\n"); 202 musb_writeb(mbase, MUSB_POWER, 203 power & ~MUSB_POWER_RESET); 204 205 power = musb_readb(mbase, MUSB_POWER); 206 if (power & MUSB_POWER_HSMODE) { 207 dev_dbg(musb->controller, "high-speed device connected\n"); 208 musb->port1_status |= USB_PORT_STAT_HIGH_SPEED; 209 } 210 211 musb->port1_status &= ~USB_PORT_STAT_RESET; 212 musb->port1_status |= USB_PORT_STAT_ENABLE 213 | (USB_PORT_STAT_C_RESET << 16) 214 | (USB_PORT_STAT_C_ENABLE << 16); 215 usb_hcd_poll_rh_status(musb->hcd); 216 217 musb->vbuserr_retry = VBUSERR_RETRY_COUNT; 218 } 219 } 220 221 void musb_root_disconnect(struct musb *musb) 222 { 223 struct usb_otg *otg = musb->xceiv->otg; 224 225 musb->port1_status = USB_PORT_STAT_POWER 226 | (USB_PORT_STAT_C_CONNECTION << 16); 227 228 usb_hcd_poll_rh_status(musb->hcd); 229 musb->is_active = 0; 230 231 switch (musb->xceiv->state) { 232 case OTG_STATE_A_SUSPEND: 233 if (otg->host->b_hnp_enable) { 234 musb->xceiv->state = OTG_STATE_A_PERIPHERAL; 235 musb->g.is_a_peripheral = 1; 236 break; 237 } 238 /* FALLTHROUGH */ 239 case OTG_STATE_A_HOST: 240 musb->xceiv->state = OTG_STATE_A_WAIT_BCON; 241 musb->is_active = 0; 242 break; 243 case OTG_STATE_A_WAIT_VFALL: 244 musb->xceiv->state = OTG_STATE_B_IDLE; 245 break; 246 default: 247 dev_dbg(musb->controller, "host disconnect (%s)\n", 248 usb_otg_state_string(musb->xceiv->state)); 249 } 250 } 251 252 253 /*---------------------------------------------------------------------*/ 254 255 /* Caller may or may not hold musb->lock */ 256 int musb_hub_status_data(struct usb_hcd *hcd, char *buf) 257 { 258 struct musb *musb = hcd_to_musb(hcd); 259 int retval = 0; 260 261 /* called in_irq() via usb_hcd_poll_rh_status() */ 262 if (musb->port1_status & 0xffff0000) { 263 *buf = 0x02; 264 retval = 1; 265 } 266 return retval; 267 } 268 269 int musb_hub_control( 270 struct usb_hcd *hcd, 271 u16 typeReq, 272 u16 wValue, 273 u16 wIndex, 274 char *buf, 275 u16 wLength) 276 { 277 struct musb *musb = hcd_to_musb(hcd); 278 u32 temp; 279 int retval = 0; 280 unsigned long flags; 281 282 spin_lock_irqsave(&musb->lock, flags); 283 284 if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) { 285 spin_unlock_irqrestore(&musb->lock, flags); 286 return -ESHUTDOWN; 287 } 288 289 /* hub features: always zero, setting is a NOP 290 * port features: reported, sometimes updated when host is active 291 * no indicators 292 */ 293 switch (typeReq) { 294 case ClearHubFeature: 295 case SetHubFeature: 296 switch (wValue) { 297 case C_HUB_OVER_CURRENT: 298 case C_HUB_LOCAL_POWER: 299 break; 300 default: 301 goto error; 302 } 303 break; 304 case ClearPortFeature: 305 if ((wIndex & 0xff) != 1) 306 goto error; 307 308 switch (wValue) { 309 case USB_PORT_FEAT_ENABLE: 310 break; 311 case USB_PORT_FEAT_SUSPEND: 312 musb_port_suspend(musb, false); 313 break; 314 case USB_PORT_FEAT_POWER: 315 if (!hcd->self.is_b_host) 316 musb_platform_set_vbus(musb, 0); 317 break; 318 case USB_PORT_FEAT_C_CONNECTION: 319 case USB_PORT_FEAT_C_ENABLE: 320 case USB_PORT_FEAT_C_OVER_CURRENT: 321 case USB_PORT_FEAT_C_RESET: 322 case USB_PORT_FEAT_C_SUSPEND: 323 break; 324 default: 325 goto error; 326 } 327 dev_dbg(musb->controller, "clear feature %d\n", wValue); 328 musb->port1_status &= ~(1 << wValue); 329 break; 330 case GetHubDescriptor: 331 { 332 struct usb_hub_descriptor *desc = (void *)buf; 333 334 desc->bDescLength = 9; 335 desc->bDescriptorType = 0x29; 336 desc->bNbrPorts = 1; 337 desc->wHubCharacteristics = cpu_to_le16( 338 0x0001 /* per-port power switching */ 339 | 0x0010 /* no overcurrent reporting */ 340 ); 341 desc->bPwrOn2PwrGood = 5; /* msec/2 */ 342 desc->bHubContrCurrent = 0; 343 344 /* workaround bogus struct definition */ 345 desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */ 346 desc->u.hs.DeviceRemovable[1] = 0xff; 347 } 348 break; 349 case GetHubStatus: 350 temp = 0; 351 *(__le32 *) buf = cpu_to_le32(temp); 352 break; 353 case GetPortStatus: 354 if (wIndex != 1) 355 goto error; 356 357 /* finish RESET signaling? */ 358 if ((musb->port1_status & USB_PORT_STAT_RESET) 359 && time_after_eq(jiffies, musb->rh_timer)) 360 musb_port_reset(musb, false); 361 362 /* finish RESUME signaling? */ 363 if ((musb->port1_status & MUSB_PORT_STAT_RESUME) 364 && time_after_eq(jiffies, musb->rh_timer)) { 365 u8 power; 366 367 power = musb_readb(musb->mregs, MUSB_POWER); 368 power &= ~MUSB_POWER_RESUME; 369 dev_dbg(musb->controller, "root port resume stopped, power %02x\n", 370 power); 371 musb_writeb(musb->mregs, MUSB_POWER, power); 372 373 /* ISSUE: DaVinci (RTL 1.300) disconnects after 374 * resume of high speed peripherals (but not full 375 * speed ones). 376 */ 377 378 musb->is_active = 1; 379 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND 380 | MUSB_PORT_STAT_RESUME); 381 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16; 382 usb_hcd_poll_rh_status(musb->hcd); 383 /* NOTE: it might really be A_WAIT_BCON ... */ 384 musb->xceiv->state = OTG_STATE_A_HOST; 385 } 386 387 put_unaligned(cpu_to_le32(musb->port1_status 388 & ~MUSB_PORT_STAT_RESUME), 389 (__le32 *) buf); 390 391 /* port change status is more interesting */ 392 dev_dbg(musb->controller, "port status %08x\n", 393 musb->port1_status); 394 break; 395 case SetPortFeature: 396 if ((wIndex & 0xff) != 1) 397 goto error; 398 399 switch (wValue) { 400 case USB_PORT_FEAT_POWER: 401 /* NOTE: this controller has a strange state machine 402 * that involves "requesting sessions" according to 403 * magic side effects from incompletely-described 404 * rules about startup... 405 * 406 * This call is what really starts the host mode; be 407 * very careful about side effects if you reorder any 408 * initialization logic, e.g. for OTG, or change any 409 * logic relating to VBUS power-up. 410 */ 411 if (!hcd->self.is_b_host) 412 musb_start(musb); 413 break; 414 case USB_PORT_FEAT_RESET: 415 musb_port_reset(musb, true); 416 break; 417 case USB_PORT_FEAT_SUSPEND: 418 musb_port_suspend(musb, true); 419 break; 420 case USB_PORT_FEAT_TEST: 421 if (unlikely(is_host_active(musb))) 422 goto error; 423 424 wIndex >>= 8; 425 switch (wIndex) { 426 case 1: 427 pr_debug("TEST_J\n"); 428 temp = MUSB_TEST_J; 429 break; 430 case 2: 431 pr_debug("TEST_K\n"); 432 temp = MUSB_TEST_K; 433 break; 434 case 3: 435 pr_debug("TEST_SE0_NAK\n"); 436 temp = MUSB_TEST_SE0_NAK; 437 break; 438 case 4: 439 pr_debug("TEST_PACKET\n"); 440 temp = MUSB_TEST_PACKET; 441 musb_load_testpacket(musb); 442 break; 443 case 5: 444 pr_debug("TEST_FORCE_ENABLE\n"); 445 temp = MUSB_TEST_FORCE_HOST 446 | MUSB_TEST_FORCE_HS; 447 448 musb_writeb(musb->mregs, MUSB_DEVCTL, 449 MUSB_DEVCTL_SESSION); 450 break; 451 case 6: 452 pr_debug("TEST_FIFO_ACCESS\n"); 453 temp = MUSB_TEST_FIFO_ACCESS; 454 break; 455 default: 456 goto error; 457 } 458 musb_writeb(musb->mregs, MUSB_TESTMODE, temp); 459 break; 460 default: 461 goto error; 462 } 463 dev_dbg(musb->controller, "set feature %d\n", wValue); 464 musb->port1_status |= 1 << wValue; 465 break; 466 467 default: 468 error: 469 /* "protocol stall" on error */ 470 retval = -EPIPE; 471 } 472 spin_unlock_irqrestore(&musb->lock, flags); 473 return retval; 474 } 475