1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #include <linux/io.h> 33 #include <linux/err.h> 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/module.h> 38 #include <linux/usb/usb_phy_generic.h> 39 #include <linux/platform_data/usb-omap.h> 40 #include <linux/sizes.h> 41 42 #include <linux/of.h> 43 #include <linux/of_device.h> 44 #include <linux/of_address.h> 45 #include <linux/of_irq.h> 46 #include <linux/usb/of.h> 47 48 #include <linux/debugfs.h> 49 50 #include "musb_core.h" 51 52 static const struct of_device_id musb_dsps_of_match[]; 53 54 /** 55 * DSPS musb wrapper register offset. 56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 57 * musb ips. 58 */ 59 struct dsps_musb_wrapper { 60 u16 revision; 61 u16 control; 62 u16 status; 63 u16 epintr_set; 64 u16 epintr_clear; 65 u16 epintr_status; 66 u16 coreintr_set; 67 u16 coreintr_clear; 68 u16 coreintr_status; 69 u16 phy_utmi; 70 u16 mode; 71 u16 tx_mode; 72 u16 rx_mode; 73 74 /* bit positions for control */ 75 unsigned reset:5; 76 77 /* bit positions for interrupt */ 78 unsigned usb_shift:5; 79 u32 usb_mask; 80 u32 usb_bitmap; 81 unsigned drvvbus:5; 82 83 unsigned txep_shift:5; 84 u32 txep_mask; 85 u32 txep_bitmap; 86 87 unsigned rxep_shift:5; 88 u32 rxep_mask; 89 u32 rxep_bitmap; 90 91 /* bit positions for phy_utmi */ 92 unsigned otg_disable:5; 93 94 /* bit positions for mode */ 95 unsigned iddig:5; 96 unsigned iddig_mux:5; 97 /* miscellaneous stuff */ 98 unsigned poll_timeout; 99 }; 100 101 /* 102 * register shadow for suspend 103 */ 104 struct dsps_context { 105 u32 control; 106 u32 epintr; 107 u32 coreintr; 108 u32 phy_utmi; 109 u32 mode; 110 u32 tx_mode; 111 u32 rx_mode; 112 }; 113 114 /** 115 * DSPS glue structure. 116 */ 117 struct dsps_glue { 118 struct device *dev; 119 struct platform_device *musb; /* child musb pdev */ 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 121 struct timer_list timer; /* otg_workaround timer */ 122 unsigned long last_timer; /* last timer data for each instance */ 123 bool sw_babble_enabled; 124 125 struct dsps_context context; 126 struct debugfs_regset32 regset; 127 struct dentry *dbgfs_root; 128 }; 129 130 static const struct debugfs_reg32 dsps_musb_regs[] = { 131 { "revision", 0x00 }, 132 { "control", 0x14 }, 133 { "status", 0x18 }, 134 { "eoi", 0x24 }, 135 { "intr0_stat", 0x30 }, 136 { "intr1_stat", 0x34 }, 137 { "intr0_set", 0x38 }, 138 { "intr1_set", 0x3c }, 139 { "txmode", 0x70 }, 140 { "rxmode", 0x74 }, 141 { "autoreq", 0xd0 }, 142 { "srpfixtime", 0xd4 }, 143 { "tdown", 0xd8 }, 144 { "phy_utmi", 0xe0 }, 145 { "mode", 0xe8 }, 146 }; 147 148 /** 149 * dsps_musb_enable - enable interrupts 150 */ 151 static void dsps_musb_enable(struct musb *musb) 152 { 153 struct device *dev = musb->controller; 154 struct platform_device *pdev = to_platform_device(dev->parent); 155 struct dsps_glue *glue = platform_get_drvdata(pdev); 156 const struct dsps_musb_wrapper *wrp = glue->wrp; 157 void __iomem *reg_base = musb->ctrl_base; 158 u32 epmask, coremask; 159 160 /* Workaround: setup IRQs through both register sets. */ 161 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 162 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 163 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 164 165 musb_writel(reg_base, wrp->epintr_set, epmask); 166 musb_writel(reg_base, wrp->coreintr_set, coremask); 167 /* start polling for ID change in dual-role idle mode */ 168 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 169 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 170 mod_timer(&glue->timer, jiffies + 171 msecs_to_jiffies(wrp->poll_timeout)); 172 } 173 174 /** 175 * dsps_musb_disable - disable HDRC and flush interrupts 176 */ 177 static void dsps_musb_disable(struct musb *musb) 178 { 179 struct device *dev = musb->controller; 180 struct platform_device *pdev = to_platform_device(dev->parent); 181 struct dsps_glue *glue = platform_get_drvdata(pdev); 182 const struct dsps_musb_wrapper *wrp = glue->wrp; 183 void __iomem *reg_base = musb->ctrl_base; 184 185 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 186 musb_writel(reg_base, wrp->epintr_clear, 187 wrp->txep_bitmap | wrp->rxep_bitmap); 188 del_timer_sync(&glue->timer); 189 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 190 } 191 192 /* Caller must take musb->lock */ 193 static int dsps_check_status(struct musb *musb, void *unused) 194 { 195 void __iomem *mregs = musb->mregs; 196 struct device *dev = musb->controller; 197 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 198 const struct dsps_musb_wrapper *wrp = glue->wrp; 199 u8 devctl; 200 int skip_session = 0; 201 202 /* 203 * We poll because DSPS IP's won't expose several OTG-critical 204 * status change events (from the transceiver) otherwise. 205 */ 206 devctl = musb_readb(mregs, MUSB_DEVCTL); 207 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 208 usb_otg_state_string(musb->xceiv->otg->state)); 209 210 switch (musb->xceiv->otg->state) { 211 case OTG_STATE_A_WAIT_VRISE: 212 mod_timer(&glue->timer, jiffies + 213 msecs_to_jiffies(wrp->poll_timeout)); 214 break; 215 case OTG_STATE_A_WAIT_BCON: 216 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 217 skip_session = 1; 218 /* fall */ 219 220 case OTG_STATE_A_IDLE: 221 case OTG_STATE_B_IDLE: 222 if (devctl & MUSB_DEVCTL_BDEVICE) { 223 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 224 MUSB_DEV_MODE(musb); 225 } else { 226 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 227 MUSB_HST_MODE(musb); 228 } 229 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 230 musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 231 mod_timer(&glue->timer, jiffies + 232 msecs_to_jiffies(wrp->poll_timeout)); 233 break; 234 case OTG_STATE_A_WAIT_VFALL: 235 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 236 musb_writel(musb->ctrl_base, wrp->coreintr_set, 237 MUSB_INTR_VBUSERROR << wrp->usb_shift); 238 break; 239 default: 240 break; 241 } 242 243 return 0; 244 } 245 246 static void otg_timer(unsigned long _musb) 247 { 248 struct musb *musb = (void *)_musb; 249 struct device *dev = musb->controller; 250 unsigned long flags; 251 int err; 252 253 err = pm_runtime_get(dev); 254 if ((err != -EINPROGRESS) && err < 0) { 255 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); 256 pm_runtime_put_noidle(dev); 257 258 return; 259 } 260 261 spin_lock_irqsave(&musb->lock, flags); 262 err = musb_queue_resume_work(musb, dsps_check_status, NULL); 263 if (err < 0) 264 dev_err(dev, "%s resume work: %i\n", __func__, err); 265 spin_unlock_irqrestore(&musb->lock, flags); 266 pm_runtime_mark_last_busy(dev); 267 pm_runtime_put_autosuspend(dev); 268 } 269 270 void dsps_musb_clear_ep_rxintr(struct musb *musb, int epnum) 271 { 272 u32 epintr; 273 struct dsps_glue *glue = dev_get_drvdata(musb->controller->parent); 274 const struct dsps_musb_wrapper *wrp = glue->wrp; 275 276 /* musb->lock might already been held */ 277 epintr = (1 << epnum) << wrp->rxep_shift; 278 musb_writel(musb->ctrl_base, wrp->epintr_status, epintr); 279 } 280 281 static irqreturn_t dsps_interrupt(int irq, void *hci) 282 { 283 struct musb *musb = hci; 284 void __iomem *reg_base = musb->ctrl_base; 285 struct device *dev = musb->controller; 286 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 287 const struct dsps_musb_wrapper *wrp = glue->wrp; 288 unsigned long flags; 289 irqreturn_t ret = IRQ_NONE; 290 u32 epintr, usbintr; 291 292 spin_lock_irqsave(&musb->lock, flags); 293 294 /* Get endpoint interrupts */ 295 epintr = musb_readl(reg_base, wrp->epintr_status); 296 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 297 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 298 299 if (epintr) 300 musb_writel(reg_base, wrp->epintr_status, epintr); 301 302 /* Get usb core interrupts */ 303 usbintr = musb_readl(reg_base, wrp->coreintr_status); 304 if (!usbintr && !epintr) 305 goto out; 306 307 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 308 if (usbintr) 309 musb_writel(reg_base, wrp->coreintr_status, usbintr); 310 311 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 312 usbintr, epintr); 313 314 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 315 int drvvbus = musb_readl(reg_base, wrp->status); 316 void __iomem *mregs = musb->mregs; 317 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 318 int err; 319 320 err = musb->int_usb & MUSB_INTR_VBUSERROR; 321 if (err) { 322 /* 323 * The Mentor core doesn't debounce VBUS as needed 324 * to cope with device connect current spikes. This 325 * means it's not uncommon for bus-powered devices 326 * to get VBUS errors during enumeration. 327 * 328 * This is a workaround, but newer RTL from Mentor 329 * seems to allow a better one: "re"-starting sessions 330 * without waiting for VBUS to stop registering in 331 * devctl. 332 */ 333 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 334 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 335 mod_timer(&glue->timer, jiffies + 336 msecs_to_jiffies(wrp->poll_timeout)); 337 WARNING("VBUS error workaround (delay coming)\n"); 338 } else if (drvvbus) { 339 MUSB_HST_MODE(musb); 340 musb->xceiv->otg->default_a = 1; 341 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 342 mod_timer(&glue->timer, jiffies + 343 msecs_to_jiffies(wrp->poll_timeout)); 344 } else { 345 musb->is_active = 0; 346 MUSB_DEV_MODE(musb); 347 musb->xceiv->otg->default_a = 0; 348 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 349 } 350 351 /* NOTE: this must complete power-on within 100 ms. */ 352 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 353 drvvbus ? "on" : "off", 354 usb_otg_state_string(musb->xceiv->otg->state), 355 err ? " ERROR" : "", 356 devctl); 357 ret = IRQ_HANDLED; 358 } 359 360 if (musb->int_tx || musb->int_rx || musb->int_usb) 361 ret |= musb_interrupt(musb); 362 363 /* Poll for ID change and connect */ 364 switch (musb->xceiv->otg->state) { 365 case OTG_STATE_B_IDLE: 366 case OTG_STATE_A_WAIT_BCON: 367 mod_timer(&glue->timer, jiffies + 368 msecs_to_jiffies(wrp->poll_timeout)); 369 break; 370 default: 371 break; 372 } 373 374 out: 375 spin_unlock_irqrestore(&musb->lock, flags); 376 377 return ret; 378 } 379 380 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 381 { 382 struct dentry *root; 383 struct dentry *file; 384 char buf[128]; 385 386 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 387 root = debugfs_create_dir(buf, NULL); 388 if (!root) 389 return -ENOMEM; 390 glue->dbgfs_root = root; 391 392 glue->regset.regs = dsps_musb_regs; 393 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 394 glue->regset.base = musb->ctrl_base; 395 396 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 397 if (!file) { 398 debugfs_remove_recursive(root); 399 return -ENOMEM; 400 } 401 return 0; 402 } 403 404 static int dsps_musb_init(struct musb *musb) 405 { 406 struct device *dev = musb->controller; 407 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 408 struct platform_device *parent = to_platform_device(dev->parent); 409 const struct dsps_musb_wrapper *wrp = glue->wrp; 410 void __iomem *reg_base; 411 struct resource *r; 412 u32 rev, val; 413 int ret; 414 415 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 416 reg_base = devm_ioremap_resource(dev, r); 417 if (IS_ERR(reg_base)) 418 return PTR_ERR(reg_base); 419 musb->ctrl_base = reg_base; 420 421 /* NOP driver needs change if supporting dual instance */ 422 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); 423 if (IS_ERR(musb->xceiv)) 424 return PTR_ERR(musb->xceiv); 425 426 musb->phy = devm_phy_get(dev->parent, "usb2-phy"); 427 428 /* Returns zero if e.g. not clocked */ 429 rev = musb_readl(reg_base, wrp->revision); 430 if (!rev) 431 return -ENODEV; 432 433 usb_phy_init(musb->xceiv); 434 if (IS_ERR(musb->phy)) { 435 musb->phy = NULL; 436 } else { 437 ret = phy_init(musb->phy); 438 if (ret < 0) 439 return ret; 440 ret = phy_power_on(musb->phy); 441 if (ret) { 442 phy_exit(musb->phy); 443 return ret; 444 } 445 } 446 447 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 448 449 /* Reset the musb */ 450 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); 451 452 musb->isr = dsps_interrupt; 453 454 /* reset the otgdisable bit, needed for host mode to work */ 455 val = musb_readl(reg_base, wrp->phy_utmi); 456 val &= ~(1 << wrp->otg_disable); 457 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); 458 459 /* 460 * Check whether the dsps version has babble control enabled. 461 * In latest silicon revision the babble control logic is enabled. 462 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control 463 * logic enabled. 464 */ 465 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 466 if (val & MUSB_BABBLE_RCV_DISABLE) { 467 glue->sw_babble_enabled = true; 468 val |= MUSB_BABBLE_SW_SESSION_CTRL; 469 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 470 } 471 472 mod_timer(&glue->timer, jiffies + 473 msecs_to_jiffies(glue->wrp->poll_timeout)); 474 475 return dsps_musb_dbg_init(musb, glue); 476 } 477 478 static int dsps_musb_exit(struct musb *musb) 479 { 480 struct device *dev = musb->controller; 481 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 482 483 del_timer_sync(&glue->timer); 484 usb_phy_shutdown(musb->xceiv); 485 phy_power_off(musb->phy); 486 phy_exit(musb->phy); 487 debugfs_remove_recursive(glue->dbgfs_root); 488 489 return 0; 490 } 491 492 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 493 { 494 struct device *dev = musb->controller; 495 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 496 const struct dsps_musb_wrapper *wrp = glue->wrp; 497 void __iomem *ctrl_base = musb->ctrl_base; 498 u32 reg; 499 500 reg = musb_readl(ctrl_base, wrp->mode); 501 502 switch (mode) { 503 case MUSB_HOST: 504 reg &= ~(1 << wrp->iddig); 505 506 /* 507 * if we're setting mode to host-only or device-only, we're 508 * going to ignore whatever the PHY sends us and just force 509 * ID pin status by SW 510 */ 511 reg |= (1 << wrp->iddig_mux); 512 513 musb_writel(ctrl_base, wrp->mode, reg); 514 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 515 break; 516 case MUSB_PERIPHERAL: 517 reg |= (1 << wrp->iddig); 518 519 /* 520 * if we're setting mode to host-only or device-only, we're 521 * going to ignore whatever the PHY sends us and just force 522 * ID pin status by SW 523 */ 524 reg |= (1 << wrp->iddig_mux); 525 526 musb_writel(ctrl_base, wrp->mode, reg); 527 break; 528 case MUSB_OTG: 529 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 530 break; 531 default: 532 dev_err(glue->dev, "unsupported mode %d\n", mode); 533 return -EINVAL; 534 } 535 536 return 0; 537 } 538 539 static bool dsps_sw_babble_control(struct musb *musb) 540 { 541 u8 babble_ctl; 542 bool session_restart = false; 543 544 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 545 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", 546 babble_ctl); 547 /* 548 * check line monitor flag to check whether babble is 549 * due to noise 550 */ 551 dev_dbg(musb->controller, "STUCK_J is %s\n", 552 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); 553 554 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 555 int timeout = 10; 556 557 /* 558 * babble is due to noise, then set transmit idle (d7 bit) 559 * to resume normal operation 560 */ 561 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 562 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; 563 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); 564 565 /* wait till line monitor flag cleared */ 566 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); 567 do { 568 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 569 udelay(1); 570 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); 571 572 /* check whether stuck_at_j bit cleared */ 573 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 574 /* 575 * real babble condition has occurred 576 * restart the controller to start the 577 * session again 578 */ 579 dev_dbg(musb->controller, "J not cleared, misc (%x)\n", 580 babble_ctl); 581 session_restart = true; 582 } 583 } else { 584 session_restart = true; 585 } 586 587 return session_restart; 588 } 589 590 static int dsps_musb_recover(struct musb *musb) 591 { 592 struct device *dev = musb->controller; 593 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 594 int session_restart = 0; 595 596 if (glue->sw_babble_enabled) 597 session_restart = dsps_sw_babble_control(musb); 598 else 599 session_restart = 1; 600 601 return session_restart ? 0 : -EPIPE; 602 } 603 604 /* Similar to am35x, dm81xx support only 32-bit read operation */ 605 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 606 { 607 void __iomem *fifo = hw_ep->fifo; 608 609 if (len >= 4) { 610 ioread32_rep(fifo, dst, len >> 2); 611 dst += len & ~0x03; 612 len &= 0x03; 613 } 614 615 /* Read any remaining 1 to 3 bytes */ 616 if (len > 0) { 617 u32 val = musb_readl(fifo, 0); 618 memcpy(dst, &val, len); 619 } 620 } 621 622 static struct musb_platform_ops dsps_ops = { 623 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 624 .init = dsps_musb_init, 625 .exit = dsps_musb_exit, 626 627 #ifdef CONFIG_USB_TI_CPPI41_DMA 628 .dma_init = cppi41_dma_controller_create, 629 .dma_exit = cppi41_dma_controller_destroy, 630 #endif 631 .enable = dsps_musb_enable, 632 .disable = dsps_musb_disable, 633 634 .set_mode = dsps_musb_set_mode, 635 .recover = dsps_musb_recover, 636 .clear_ep_rxintr = dsps_musb_clear_ep_rxintr, 637 }; 638 639 static u64 musb_dmamask = DMA_BIT_MASK(32); 640 641 static int get_int_prop(struct device_node *dn, const char *s) 642 { 643 int ret; 644 u32 val; 645 646 ret = of_property_read_u32(dn, s, &val); 647 if (ret) 648 return 0; 649 return val; 650 } 651 652 static int get_musb_port_mode(struct device *dev) 653 { 654 enum usb_dr_mode mode; 655 656 mode = usb_get_dr_mode(dev); 657 switch (mode) { 658 case USB_DR_MODE_HOST: 659 return MUSB_PORT_MODE_HOST; 660 661 case USB_DR_MODE_PERIPHERAL: 662 return MUSB_PORT_MODE_GADGET; 663 664 case USB_DR_MODE_UNKNOWN: 665 case USB_DR_MODE_OTG: 666 default: 667 return MUSB_PORT_MODE_DUAL_ROLE; 668 } 669 } 670 671 static int dsps_create_musb_pdev(struct dsps_glue *glue, 672 struct platform_device *parent) 673 { 674 struct musb_hdrc_platform_data pdata; 675 struct resource resources[2]; 676 struct resource *res; 677 struct device *dev = &parent->dev; 678 struct musb_hdrc_config *config; 679 struct platform_device *musb; 680 struct device_node *dn = parent->dev.of_node; 681 int ret, val; 682 683 memset(resources, 0, sizeof(resources)); 684 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 685 if (!res) { 686 dev_err(dev, "failed to get memory.\n"); 687 return -EINVAL; 688 } 689 resources[0] = *res; 690 691 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 692 if (!res) { 693 dev_err(dev, "failed to get irq.\n"); 694 return -EINVAL; 695 } 696 resources[1] = *res; 697 698 /* allocate the child platform device */ 699 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 700 if (!musb) { 701 dev_err(dev, "failed to allocate musb device\n"); 702 return -ENOMEM; 703 } 704 705 musb->dev.parent = dev; 706 musb->dev.dma_mask = &musb_dmamask; 707 musb->dev.coherent_dma_mask = musb_dmamask; 708 709 glue->musb = musb; 710 711 ret = platform_device_add_resources(musb, resources, 712 ARRAY_SIZE(resources)); 713 if (ret) { 714 dev_err(dev, "failed to add resources\n"); 715 goto err; 716 } 717 718 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 719 if (!config) { 720 ret = -ENOMEM; 721 goto err; 722 } 723 pdata.config = config; 724 pdata.platform_ops = &dsps_ops; 725 726 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 727 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 728 config->host_port_deassert_reset_at_resume = 1; 729 pdata.mode = get_musb_port_mode(dev); 730 /* DT keeps this entry in mA, musb expects it as per USB spec */ 731 pdata.power = get_int_prop(dn, "mentor,power") / 2; 732 733 ret = of_property_read_u32(dn, "mentor,multipoint", &val); 734 if (!ret && val) 735 config->multipoint = true; 736 737 config->maximum_speed = usb_get_maximum_speed(&parent->dev); 738 switch (config->maximum_speed) { 739 case USB_SPEED_LOW: 740 case USB_SPEED_FULL: 741 break; 742 case USB_SPEED_SUPER: 743 dev_warn(dev, "ignore incorrect maximum_speed " 744 "(super-speed) setting in dts"); 745 /* fall through */ 746 default: 747 config->maximum_speed = USB_SPEED_HIGH; 748 } 749 750 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 751 if (ret) { 752 dev_err(dev, "failed to add platform_data\n"); 753 goto err; 754 } 755 756 ret = platform_device_add(musb); 757 if (ret) { 758 dev_err(dev, "failed to register musb device\n"); 759 goto err; 760 } 761 return 0; 762 763 err: 764 platform_device_put(musb); 765 return ret; 766 } 767 768 static int dsps_probe(struct platform_device *pdev) 769 { 770 const struct of_device_id *match; 771 const struct dsps_musb_wrapper *wrp; 772 struct dsps_glue *glue; 773 int ret; 774 775 if (!strcmp(pdev->name, "musb-hdrc")) 776 return -ENODEV; 777 778 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 779 if (!match) { 780 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 781 return -EINVAL; 782 } 783 wrp = match->data; 784 785 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) 786 dsps_ops.read_fifo = dsps_read_fifo32; 787 788 /* allocate glue */ 789 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 790 if (!glue) 791 return -ENOMEM; 792 793 glue->dev = &pdev->dev; 794 glue->wrp = wrp; 795 796 platform_set_drvdata(pdev, glue); 797 pm_runtime_enable(&pdev->dev); 798 ret = dsps_create_musb_pdev(glue, pdev); 799 if (ret) 800 goto err; 801 802 return 0; 803 804 err: 805 pm_runtime_disable(&pdev->dev); 806 return ret; 807 } 808 809 static int dsps_remove(struct platform_device *pdev) 810 { 811 struct dsps_glue *glue = platform_get_drvdata(pdev); 812 813 platform_device_unregister(glue->musb); 814 815 pm_runtime_disable(&pdev->dev); 816 817 return 0; 818 } 819 820 static const struct dsps_musb_wrapper am33xx_driver_data = { 821 .revision = 0x00, 822 .control = 0x14, 823 .status = 0x18, 824 .epintr_set = 0x38, 825 .epintr_clear = 0x40, 826 .epintr_status = 0x30, 827 .coreintr_set = 0x3c, 828 .coreintr_clear = 0x44, 829 .coreintr_status = 0x34, 830 .phy_utmi = 0xe0, 831 .mode = 0xe8, 832 .tx_mode = 0x70, 833 .rx_mode = 0x74, 834 .reset = 0, 835 .otg_disable = 21, 836 .iddig = 8, 837 .iddig_mux = 7, 838 .usb_shift = 0, 839 .usb_mask = 0x1ff, 840 .usb_bitmap = (0x1ff << 0), 841 .drvvbus = 8, 842 .txep_shift = 0, 843 .txep_mask = 0xffff, 844 .txep_bitmap = (0xffff << 0), 845 .rxep_shift = 16, 846 .rxep_mask = 0xfffe, 847 .rxep_bitmap = (0xfffe << 16), 848 .poll_timeout = 2000, /* ms */ 849 }; 850 851 static const struct of_device_id musb_dsps_of_match[] = { 852 { .compatible = "ti,musb-am33xx", 853 .data = &am33xx_driver_data, }, 854 { .compatible = "ti,musb-dm816", 855 .data = &am33xx_driver_data, }, 856 { }, 857 }; 858 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 859 860 #ifdef CONFIG_PM_SLEEP 861 static int dsps_suspend(struct device *dev) 862 { 863 struct dsps_glue *glue = dev_get_drvdata(dev); 864 const struct dsps_musb_wrapper *wrp = glue->wrp; 865 struct musb *musb = platform_get_drvdata(glue->musb); 866 void __iomem *mbase; 867 868 del_timer_sync(&glue->timer); 869 870 if (!musb) 871 /* This can happen if the musb device is in -EPROBE_DEFER */ 872 return 0; 873 874 mbase = musb->ctrl_base; 875 glue->context.control = musb_readl(mbase, wrp->control); 876 glue->context.epintr = musb_readl(mbase, wrp->epintr_set); 877 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); 878 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); 879 glue->context.mode = musb_readl(mbase, wrp->mode); 880 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 881 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 882 883 return 0; 884 } 885 886 static int dsps_resume(struct device *dev) 887 { 888 struct dsps_glue *glue = dev_get_drvdata(dev); 889 const struct dsps_musb_wrapper *wrp = glue->wrp; 890 struct musb *musb = platform_get_drvdata(glue->musb); 891 void __iomem *mbase; 892 893 if (!musb) 894 return 0; 895 896 mbase = musb->ctrl_base; 897 musb_writel(mbase, wrp->control, glue->context.control); 898 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 899 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 900 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 901 musb_writel(mbase, wrp->mode, glue->context.mode); 902 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 903 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 904 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 905 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 906 mod_timer(&glue->timer, jiffies + 907 msecs_to_jiffies(wrp->poll_timeout)); 908 909 return 0; 910 } 911 #endif 912 913 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 914 915 static struct platform_driver dsps_usbss_driver = { 916 .probe = dsps_probe, 917 .remove = dsps_remove, 918 .driver = { 919 .name = "musb-dsps", 920 .pm = &dsps_pm_ops, 921 .of_match_table = musb_dsps_of_match, 922 }, 923 }; 924 925 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 926 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 927 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 928 MODULE_LICENSE("GPL v2"); 929 930 module_platform_driver(dsps_usbss_driver); 931