1 /* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32 #include <linux/io.h> 33 #include <linux/err.h> 34 #include <linux/platform_device.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/pm_runtime.h> 37 #include <linux/module.h> 38 #include <linux/usb/usb_phy_generic.h> 39 #include <linux/platform_data/usb-omap.h> 40 #include <linux/sizes.h> 41 42 #include <linux/of.h> 43 #include <linux/of_device.h> 44 #include <linux/of_address.h> 45 #include <linux/of_irq.h> 46 #include <linux/usb/of.h> 47 48 #include <linux/debugfs.h> 49 50 #include "musb_core.h" 51 52 static const struct of_device_id musb_dsps_of_match[]; 53 54 /** 55 * DSPS musb wrapper register offset. 56 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 57 * musb ips. 58 */ 59 struct dsps_musb_wrapper { 60 u16 revision; 61 u16 control; 62 u16 status; 63 u16 epintr_set; 64 u16 epintr_clear; 65 u16 epintr_status; 66 u16 coreintr_set; 67 u16 coreintr_clear; 68 u16 coreintr_status; 69 u16 phy_utmi; 70 u16 mode; 71 u16 tx_mode; 72 u16 rx_mode; 73 74 /* bit positions for control */ 75 unsigned reset:5; 76 77 /* bit positions for interrupt */ 78 unsigned usb_shift:5; 79 u32 usb_mask; 80 u32 usb_bitmap; 81 unsigned drvvbus:5; 82 83 unsigned txep_shift:5; 84 u32 txep_mask; 85 u32 txep_bitmap; 86 87 unsigned rxep_shift:5; 88 u32 rxep_mask; 89 u32 rxep_bitmap; 90 91 /* bit positions for phy_utmi */ 92 unsigned otg_disable:5; 93 94 /* bit positions for mode */ 95 unsigned iddig:5; 96 unsigned iddig_mux:5; 97 /* miscellaneous stuff */ 98 unsigned poll_timeout; 99 }; 100 101 /* 102 * register shadow for suspend 103 */ 104 struct dsps_context { 105 u32 control; 106 u32 epintr; 107 u32 coreintr; 108 u32 phy_utmi; 109 u32 mode; 110 u32 tx_mode; 111 u32 rx_mode; 112 }; 113 114 /** 115 * DSPS glue structure. 116 */ 117 struct dsps_glue { 118 struct device *dev; 119 struct platform_device *musb; /* child musb pdev */ 120 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 121 struct timer_list timer; /* otg_workaround timer */ 122 unsigned long last_timer; /* last timer data for each instance */ 123 bool sw_babble_enabled; 124 125 struct dsps_context context; 126 struct debugfs_regset32 regset; 127 struct dentry *dbgfs_root; 128 }; 129 130 static const struct debugfs_reg32 dsps_musb_regs[] = { 131 { "revision", 0x00 }, 132 { "control", 0x14 }, 133 { "status", 0x18 }, 134 { "eoi", 0x24 }, 135 { "intr0_stat", 0x30 }, 136 { "intr1_stat", 0x34 }, 137 { "intr0_set", 0x38 }, 138 { "intr1_set", 0x3c }, 139 { "txmode", 0x70 }, 140 { "rxmode", 0x74 }, 141 { "autoreq", 0xd0 }, 142 { "srpfixtime", 0xd4 }, 143 { "tdown", 0xd8 }, 144 { "phy_utmi", 0xe0 }, 145 { "mode", 0xe8 }, 146 }; 147 148 /** 149 * dsps_musb_enable - enable interrupts 150 */ 151 static void dsps_musb_enable(struct musb *musb) 152 { 153 struct device *dev = musb->controller; 154 struct platform_device *pdev = to_platform_device(dev->parent); 155 struct dsps_glue *glue = platform_get_drvdata(pdev); 156 const struct dsps_musb_wrapper *wrp = glue->wrp; 157 void __iomem *reg_base = musb->ctrl_base; 158 u32 epmask, coremask; 159 160 /* Workaround: setup IRQs through both register sets. */ 161 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 162 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 163 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 164 165 musb_writel(reg_base, wrp->epintr_set, epmask); 166 musb_writel(reg_base, wrp->coreintr_set, coremask); 167 /* start polling for ID change in dual-role idle mode */ 168 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 169 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 170 mod_timer(&glue->timer, jiffies + 171 msecs_to_jiffies(wrp->poll_timeout)); 172 } 173 174 /** 175 * dsps_musb_disable - disable HDRC and flush interrupts 176 */ 177 static void dsps_musb_disable(struct musb *musb) 178 { 179 struct device *dev = musb->controller; 180 struct platform_device *pdev = to_platform_device(dev->parent); 181 struct dsps_glue *glue = platform_get_drvdata(pdev); 182 const struct dsps_musb_wrapper *wrp = glue->wrp; 183 void __iomem *reg_base = musb->ctrl_base; 184 185 musb_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 186 musb_writel(reg_base, wrp->epintr_clear, 187 wrp->txep_bitmap | wrp->rxep_bitmap); 188 del_timer_sync(&glue->timer); 189 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 190 } 191 192 /* Caller must take musb->lock */ 193 static int dsps_check_status(struct musb *musb, void *unused) 194 { 195 void __iomem *mregs = musb->mregs; 196 struct device *dev = musb->controller; 197 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 198 const struct dsps_musb_wrapper *wrp = glue->wrp; 199 u8 devctl; 200 int skip_session = 0; 201 202 /* 203 * We poll because DSPS IP's won't expose several OTG-critical 204 * status change events (from the transceiver) otherwise. 205 */ 206 devctl = musb_readb(mregs, MUSB_DEVCTL); 207 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 208 usb_otg_state_string(musb->xceiv->otg->state)); 209 210 switch (musb->xceiv->otg->state) { 211 case OTG_STATE_A_WAIT_VRISE: 212 mod_timer(&glue->timer, jiffies + 213 msecs_to_jiffies(wrp->poll_timeout)); 214 break; 215 case OTG_STATE_A_WAIT_BCON: 216 musb_writeb(musb->mregs, MUSB_DEVCTL, 0); 217 skip_session = 1; 218 /* fall */ 219 220 case OTG_STATE_A_IDLE: 221 case OTG_STATE_B_IDLE: 222 if (devctl & MUSB_DEVCTL_BDEVICE) { 223 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 224 MUSB_DEV_MODE(musb); 225 } else { 226 musb->xceiv->otg->state = OTG_STATE_A_IDLE; 227 MUSB_HST_MODE(musb); 228 } 229 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 230 musb_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 231 mod_timer(&glue->timer, jiffies + 232 msecs_to_jiffies(wrp->poll_timeout)); 233 break; 234 case OTG_STATE_A_WAIT_VFALL: 235 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 236 musb_writel(musb->ctrl_base, wrp->coreintr_set, 237 MUSB_INTR_VBUSERROR << wrp->usb_shift); 238 break; 239 default: 240 break; 241 } 242 243 return 0; 244 } 245 246 static void otg_timer(unsigned long _musb) 247 { 248 struct musb *musb = (void *)_musb; 249 struct device *dev = musb->controller; 250 unsigned long flags; 251 int err; 252 253 err = pm_runtime_get(dev); 254 if ((err != -EINPROGRESS) && err < 0) { 255 dev_err(dev, "Poll could not pm_runtime_get: %i\n", err); 256 pm_runtime_put_noidle(dev); 257 258 return; 259 } 260 261 spin_lock_irqsave(&musb->lock, flags); 262 err = musb_queue_resume_work(musb, dsps_check_status, NULL); 263 if (err < 0) 264 dev_err(dev, "%s resume work: %i\n", __func__, err); 265 spin_unlock_irqrestore(&musb->lock, flags); 266 pm_runtime_mark_last_busy(dev); 267 pm_runtime_put_autosuspend(dev); 268 } 269 270 static irqreturn_t dsps_interrupt(int irq, void *hci) 271 { 272 struct musb *musb = hci; 273 void __iomem *reg_base = musb->ctrl_base; 274 struct device *dev = musb->controller; 275 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 276 const struct dsps_musb_wrapper *wrp = glue->wrp; 277 unsigned long flags; 278 irqreturn_t ret = IRQ_NONE; 279 u32 epintr, usbintr; 280 281 spin_lock_irqsave(&musb->lock, flags); 282 283 /* Get endpoint interrupts */ 284 epintr = musb_readl(reg_base, wrp->epintr_status); 285 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 286 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 287 288 if (epintr) 289 musb_writel(reg_base, wrp->epintr_status, epintr); 290 291 /* Get usb core interrupts */ 292 usbintr = musb_readl(reg_base, wrp->coreintr_status); 293 if (!usbintr && !epintr) 294 goto out; 295 296 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 297 if (usbintr) 298 musb_writel(reg_base, wrp->coreintr_status, usbintr); 299 300 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 301 usbintr, epintr); 302 303 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 304 int drvvbus = musb_readl(reg_base, wrp->status); 305 void __iomem *mregs = musb->mregs; 306 u8 devctl = musb_readb(mregs, MUSB_DEVCTL); 307 int err; 308 309 err = musb->int_usb & MUSB_INTR_VBUSERROR; 310 if (err) { 311 /* 312 * The Mentor core doesn't debounce VBUS as needed 313 * to cope with device connect current spikes. This 314 * means it's not uncommon for bus-powered devices 315 * to get VBUS errors during enumeration. 316 * 317 * This is a workaround, but newer RTL from Mentor 318 * seems to allow a better one: "re"-starting sessions 319 * without waiting for VBUS to stop registering in 320 * devctl. 321 */ 322 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 323 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL; 324 mod_timer(&glue->timer, jiffies + 325 msecs_to_jiffies(wrp->poll_timeout)); 326 WARNING("VBUS error workaround (delay coming)\n"); 327 } else if (drvvbus) { 328 MUSB_HST_MODE(musb); 329 musb->xceiv->otg->default_a = 1; 330 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; 331 mod_timer(&glue->timer, jiffies + 332 msecs_to_jiffies(wrp->poll_timeout)); 333 } else { 334 musb->is_active = 0; 335 MUSB_DEV_MODE(musb); 336 musb->xceiv->otg->default_a = 0; 337 musb->xceiv->otg->state = OTG_STATE_B_IDLE; 338 } 339 340 /* NOTE: this must complete power-on within 100 ms. */ 341 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 342 drvvbus ? "on" : "off", 343 usb_otg_state_string(musb->xceiv->otg->state), 344 err ? " ERROR" : "", 345 devctl); 346 ret = IRQ_HANDLED; 347 } 348 349 if (musb->int_tx || musb->int_rx || musb->int_usb) 350 ret |= musb_interrupt(musb); 351 352 /* Poll for ID change and connect */ 353 switch (musb->xceiv->otg->state) { 354 case OTG_STATE_B_IDLE: 355 case OTG_STATE_A_WAIT_BCON: 356 mod_timer(&glue->timer, jiffies + 357 msecs_to_jiffies(wrp->poll_timeout)); 358 break; 359 default: 360 break; 361 } 362 363 out: 364 spin_unlock_irqrestore(&musb->lock, flags); 365 366 return ret; 367 } 368 369 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue) 370 { 371 struct dentry *root; 372 struct dentry *file; 373 char buf[128]; 374 375 sprintf(buf, "%s.dsps", dev_name(musb->controller)); 376 root = debugfs_create_dir(buf, NULL); 377 if (!root) 378 return -ENOMEM; 379 glue->dbgfs_root = root; 380 381 glue->regset.regs = dsps_musb_regs; 382 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs); 383 glue->regset.base = musb->ctrl_base; 384 385 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset); 386 if (!file) { 387 debugfs_remove_recursive(root); 388 return -ENOMEM; 389 } 390 return 0; 391 } 392 393 static int dsps_musb_init(struct musb *musb) 394 { 395 struct device *dev = musb->controller; 396 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 397 struct platform_device *parent = to_platform_device(dev->parent); 398 const struct dsps_musb_wrapper *wrp = glue->wrp; 399 void __iomem *reg_base; 400 struct resource *r; 401 u32 rev, val; 402 int ret; 403 404 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 405 reg_base = devm_ioremap_resource(dev, r); 406 if (IS_ERR(reg_base)) 407 return PTR_ERR(reg_base); 408 musb->ctrl_base = reg_base; 409 410 /* NOP driver needs change if supporting dual instance */ 411 musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0); 412 if (IS_ERR(musb->xceiv)) 413 return PTR_ERR(musb->xceiv); 414 415 musb->phy = devm_phy_get(dev->parent, "usb2-phy"); 416 417 /* Returns zero if e.g. not clocked */ 418 rev = musb_readl(reg_base, wrp->revision); 419 if (!rev) 420 return -ENODEV; 421 422 usb_phy_init(musb->xceiv); 423 if (IS_ERR(musb->phy)) { 424 musb->phy = NULL; 425 } else { 426 ret = phy_init(musb->phy); 427 if (ret < 0) 428 return ret; 429 ret = phy_power_on(musb->phy); 430 if (ret) { 431 phy_exit(musb->phy); 432 return ret; 433 } 434 } 435 436 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 437 438 /* Reset the musb */ 439 musb_writel(reg_base, wrp->control, (1 << wrp->reset)); 440 441 musb->isr = dsps_interrupt; 442 443 /* reset the otgdisable bit, needed for host mode to work */ 444 val = musb_readl(reg_base, wrp->phy_utmi); 445 val &= ~(1 << wrp->otg_disable); 446 musb_writel(musb->ctrl_base, wrp->phy_utmi, val); 447 448 /* 449 * Check whether the dsps version has babble control enabled. 450 * In latest silicon revision the babble control logic is enabled. 451 * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control 452 * logic enabled. 453 */ 454 val = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 455 if (val & MUSB_BABBLE_RCV_DISABLE) { 456 glue->sw_babble_enabled = true; 457 val |= MUSB_BABBLE_SW_SESSION_CTRL; 458 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, val); 459 } 460 461 mod_timer(&glue->timer, jiffies + 462 msecs_to_jiffies(glue->wrp->poll_timeout)); 463 464 return dsps_musb_dbg_init(musb, glue); 465 } 466 467 static int dsps_musb_exit(struct musb *musb) 468 { 469 struct device *dev = musb->controller; 470 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 471 472 del_timer_sync(&glue->timer); 473 usb_phy_shutdown(musb->xceiv); 474 phy_power_off(musb->phy); 475 phy_exit(musb->phy); 476 debugfs_remove_recursive(glue->dbgfs_root); 477 478 return 0; 479 } 480 481 static int dsps_musb_set_mode(struct musb *musb, u8 mode) 482 { 483 struct device *dev = musb->controller; 484 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 485 const struct dsps_musb_wrapper *wrp = glue->wrp; 486 void __iomem *ctrl_base = musb->ctrl_base; 487 u32 reg; 488 489 reg = musb_readl(ctrl_base, wrp->mode); 490 491 switch (mode) { 492 case MUSB_HOST: 493 reg &= ~(1 << wrp->iddig); 494 495 /* 496 * if we're setting mode to host-only or device-only, we're 497 * going to ignore whatever the PHY sends us and just force 498 * ID pin status by SW 499 */ 500 reg |= (1 << wrp->iddig_mux); 501 502 musb_writel(ctrl_base, wrp->mode, reg); 503 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 504 break; 505 case MUSB_PERIPHERAL: 506 reg |= (1 << wrp->iddig); 507 508 /* 509 * if we're setting mode to host-only or device-only, we're 510 * going to ignore whatever the PHY sends us and just force 511 * ID pin status by SW 512 */ 513 reg |= (1 << wrp->iddig_mux); 514 515 musb_writel(ctrl_base, wrp->mode, reg); 516 break; 517 case MUSB_OTG: 518 musb_writel(ctrl_base, wrp->phy_utmi, 0x02); 519 break; 520 default: 521 dev_err(glue->dev, "unsupported mode %d\n", mode); 522 return -EINVAL; 523 } 524 525 return 0; 526 } 527 528 static bool dsps_sw_babble_control(struct musb *musb) 529 { 530 u8 babble_ctl; 531 bool session_restart = false; 532 533 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 534 dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n", 535 babble_ctl); 536 /* 537 * check line monitor flag to check whether babble is 538 * due to noise 539 */ 540 dev_dbg(musb->controller, "STUCK_J is %s\n", 541 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset"); 542 543 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 544 int timeout = 10; 545 546 /* 547 * babble is due to noise, then set transmit idle (d7 bit) 548 * to resume normal operation 549 */ 550 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 551 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE; 552 musb_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl); 553 554 /* wait till line monitor flag cleared */ 555 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n"); 556 do { 557 babble_ctl = musb_readb(musb->mregs, MUSB_BABBLE_CTL); 558 udelay(1); 559 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--); 560 561 /* check whether stuck_at_j bit cleared */ 562 if (babble_ctl & MUSB_BABBLE_STUCK_J) { 563 /* 564 * real babble condition has occurred 565 * restart the controller to start the 566 * session again 567 */ 568 dev_dbg(musb->controller, "J not cleared, misc (%x)\n", 569 babble_ctl); 570 session_restart = true; 571 } 572 } else { 573 session_restart = true; 574 } 575 576 return session_restart; 577 } 578 579 static int dsps_musb_recover(struct musb *musb) 580 { 581 struct device *dev = musb->controller; 582 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 583 int session_restart = 0; 584 585 if (glue->sw_babble_enabled) 586 session_restart = dsps_sw_babble_control(musb); 587 else 588 session_restart = 1; 589 590 return session_restart ? 0 : -EPIPE; 591 } 592 593 /* Similar to am35x, dm81xx support only 32-bit read operation */ 594 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst) 595 { 596 void __iomem *fifo = hw_ep->fifo; 597 598 if (len >= 4) { 599 ioread32_rep(fifo, dst, len >> 2); 600 dst += len & ~0x03; 601 len &= 0x03; 602 } 603 604 /* Read any remaining 1 to 3 bytes */ 605 if (len > 0) { 606 u32 val = musb_readl(fifo, 0); 607 memcpy(dst, &val, len); 608 } 609 } 610 611 static struct musb_platform_ops dsps_ops = { 612 .quirks = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP, 613 .init = dsps_musb_init, 614 .exit = dsps_musb_exit, 615 616 #ifdef CONFIG_USB_TI_CPPI41_DMA 617 .dma_init = cppi41_dma_controller_create, 618 .dma_exit = cppi41_dma_controller_destroy, 619 #endif 620 .enable = dsps_musb_enable, 621 .disable = dsps_musb_disable, 622 623 .set_mode = dsps_musb_set_mode, 624 .recover = dsps_musb_recover, 625 }; 626 627 static u64 musb_dmamask = DMA_BIT_MASK(32); 628 629 static int get_int_prop(struct device_node *dn, const char *s) 630 { 631 int ret; 632 u32 val; 633 634 ret = of_property_read_u32(dn, s, &val); 635 if (ret) 636 return 0; 637 return val; 638 } 639 640 static int get_musb_port_mode(struct device *dev) 641 { 642 enum usb_dr_mode mode; 643 644 mode = usb_get_dr_mode(dev); 645 switch (mode) { 646 case USB_DR_MODE_HOST: 647 return MUSB_PORT_MODE_HOST; 648 649 case USB_DR_MODE_PERIPHERAL: 650 return MUSB_PORT_MODE_GADGET; 651 652 case USB_DR_MODE_UNKNOWN: 653 case USB_DR_MODE_OTG: 654 default: 655 return MUSB_PORT_MODE_DUAL_ROLE; 656 } 657 } 658 659 static int dsps_create_musb_pdev(struct dsps_glue *glue, 660 struct platform_device *parent) 661 { 662 struct musb_hdrc_platform_data pdata; 663 struct resource resources[2]; 664 struct resource *res; 665 struct device *dev = &parent->dev; 666 struct musb_hdrc_config *config; 667 struct platform_device *musb; 668 struct device_node *dn = parent->dev.of_node; 669 int ret, val; 670 671 memset(resources, 0, sizeof(resources)); 672 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 673 if (!res) { 674 dev_err(dev, "failed to get memory.\n"); 675 return -EINVAL; 676 } 677 resources[0] = *res; 678 679 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 680 if (!res) { 681 dev_err(dev, "failed to get irq.\n"); 682 return -EINVAL; 683 } 684 resources[1] = *res; 685 686 /* allocate the child platform device */ 687 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 688 if (!musb) { 689 dev_err(dev, "failed to allocate musb device\n"); 690 return -ENOMEM; 691 } 692 693 musb->dev.parent = dev; 694 musb->dev.dma_mask = &musb_dmamask; 695 musb->dev.coherent_dma_mask = musb_dmamask; 696 697 glue->musb = musb; 698 699 ret = platform_device_add_resources(musb, resources, 700 ARRAY_SIZE(resources)); 701 if (ret) { 702 dev_err(dev, "failed to add resources\n"); 703 goto err; 704 } 705 706 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 707 if (!config) { 708 ret = -ENOMEM; 709 goto err; 710 } 711 pdata.config = config; 712 pdata.platform_ops = &dsps_ops; 713 714 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 715 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 716 config->host_port_deassert_reset_at_resume = 1; 717 pdata.mode = get_musb_port_mode(dev); 718 /* DT keeps this entry in mA, musb expects it as per USB spec */ 719 pdata.power = get_int_prop(dn, "mentor,power") / 2; 720 721 ret = of_property_read_u32(dn, "mentor,multipoint", &val); 722 if (!ret && val) 723 config->multipoint = true; 724 725 config->maximum_speed = usb_get_maximum_speed(&parent->dev); 726 switch (config->maximum_speed) { 727 case USB_SPEED_LOW: 728 case USB_SPEED_FULL: 729 break; 730 case USB_SPEED_SUPER: 731 dev_warn(dev, "ignore incorrect maximum_speed " 732 "(super-speed) setting in dts"); 733 /* fall through */ 734 default: 735 config->maximum_speed = USB_SPEED_HIGH; 736 } 737 738 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 739 if (ret) { 740 dev_err(dev, "failed to add platform_data\n"); 741 goto err; 742 } 743 744 ret = platform_device_add(musb); 745 if (ret) { 746 dev_err(dev, "failed to register musb device\n"); 747 goto err; 748 } 749 return 0; 750 751 err: 752 platform_device_put(musb); 753 return ret; 754 } 755 756 static int dsps_probe(struct platform_device *pdev) 757 { 758 const struct of_device_id *match; 759 const struct dsps_musb_wrapper *wrp; 760 struct dsps_glue *glue; 761 int ret; 762 763 if (!strcmp(pdev->name, "musb-hdrc")) 764 return -ENODEV; 765 766 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 767 if (!match) { 768 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 769 return -EINVAL; 770 } 771 wrp = match->data; 772 773 if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816")) 774 dsps_ops.read_fifo = dsps_read_fifo32; 775 776 /* allocate glue */ 777 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 778 if (!glue) 779 return -ENOMEM; 780 781 glue->dev = &pdev->dev; 782 glue->wrp = wrp; 783 784 platform_set_drvdata(pdev, glue); 785 pm_runtime_enable(&pdev->dev); 786 ret = dsps_create_musb_pdev(glue, pdev); 787 if (ret) 788 goto err; 789 790 return 0; 791 792 err: 793 pm_runtime_disable(&pdev->dev); 794 return ret; 795 } 796 797 static int dsps_remove(struct platform_device *pdev) 798 { 799 struct dsps_glue *glue = platform_get_drvdata(pdev); 800 801 platform_device_unregister(glue->musb); 802 803 pm_runtime_disable(&pdev->dev); 804 805 return 0; 806 } 807 808 static const struct dsps_musb_wrapper am33xx_driver_data = { 809 .revision = 0x00, 810 .control = 0x14, 811 .status = 0x18, 812 .epintr_set = 0x38, 813 .epintr_clear = 0x40, 814 .epintr_status = 0x30, 815 .coreintr_set = 0x3c, 816 .coreintr_clear = 0x44, 817 .coreintr_status = 0x34, 818 .phy_utmi = 0xe0, 819 .mode = 0xe8, 820 .tx_mode = 0x70, 821 .rx_mode = 0x74, 822 .reset = 0, 823 .otg_disable = 21, 824 .iddig = 8, 825 .iddig_mux = 7, 826 .usb_shift = 0, 827 .usb_mask = 0x1ff, 828 .usb_bitmap = (0x1ff << 0), 829 .drvvbus = 8, 830 .txep_shift = 0, 831 .txep_mask = 0xffff, 832 .txep_bitmap = (0xffff << 0), 833 .rxep_shift = 16, 834 .rxep_mask = 0xfffe, 835 .rxep_bitmap = (0xfffe << 16), 836 .poll_timeout = 2000, /* ms */ 837 }; 838 839 static const struct of_device_id musb_dsps_of_match[] = { 840 { .compatible = "ti,musb-am33xx", 841 .data = &am33xx_driver_data, }, 842 { .compatible = "ti,musb-dm816", 843 .data = &am33xx_driver_data, }, 844 { }, 845 }; 846 MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 847 848 #ifdef CONFIG_PM_SLEEP 849 static int dsps_suspend(struct device *dev) 850 { 851 struct dsps_glue *glue = dev_get_drvdata(dev); 852 const struct dsps_musb_wrapper *wrp = glue->wrp; 853 struct musb *musb = platform_get_drvdata(glue->musb); 854 void __iomem *mbase; 855 856 del_timer_sync(&glue->timer); 857 858 if (!musb) 859 /* This can happen if the musb device is in -EPROBE_DEFER */ 860 return 0; 861 862 mbase = musb->ctrl_base; 863 glue->context.control = musb_readl(mbase, wrp->control); 864 glue->context.epintr = musb_readl(mbase, wrp->epintr_set); 865 glue->context.coreintr = musb_readl(mbase, wrp->coreintr_set); 866 glue->context.phy_utmi = musb_readl(mbase, wrp->phy_utmi); 867 glue->context.mode = musb_readl(mbase, wrp->mode); 868 glue->context.tx_mode = musb_readl(mbase, wrp->tx_mode); 869 glue->context.rx_mode = musb_readl(mbase, wrp->rx_mode); 870 871 return 0; 872 } 873 874 static int dsps_resume(struct device *dev) 875 { 876 struct dsps_glue *glue = dev_get_drvdata(dev); 877 const struct dsps_musb_wrapper *wrp = glue->wrp; 878 struct musb *musb = platform_get_drvdata(glue->musb); 879 void __iomem *mbase; 880 881 if (!musb) 882 return 0; 883 884 mbase = musb->ctrl_base; 885 musb_writel(mbase, wrp->control, glue->context.control); 886 musb_writel(mbase, wrp->epintr_set, glue->context.epintr); 887 musb_writel(mbase, wrp->coreintr_set, glue->context.coreintr); 888 musb_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi); 889 musb_writel(mbase, wrp->mode, glue->context.mode); 890 musb_writel(mbase, wrp->tx_mode, glue->context.tx_mode); 891 musb_writel(mbase, wrp->rx_mode, glue->context.rx_mode); 892 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE && 893 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE) 894 mod_timer(&glue->timer, jiffies + 895 msecs_to_jiffies(wrp->poll_timeout)); 896 897 return 0; 898 } 899 #endif 900 901 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 902 903 static struct platform_driver dsps_usbss_driver = { 904 .probe = dsps_probe, 905 .remove = dsps_remove, 906 .driver = { 907 .name = "musb-dsps", 908 .pm = &dsps_pm_ops, 909 .of_match_table = musb_dsps_of_match, 910 }, 911 }; 912 913 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 914 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 915 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 916 MODULE_LICENSE("GPL v2"); 917 918 module_platform_driver(dsps_usbss_driver); 919