xref: /linux/drivers/usb/musb/jz4740.c (revision 4949009eb8d40a441dcddcd96e101e77d31cf1b2)
1 /*
2  * Ingenic JZ4740 "glue layer"
3  *
4  * Copyright (C) 2013, Apelete Seketeli <apelete@seketeli.net>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License as published by
8  * the Free Software Foundation; either version 2 of the License, or
9  * (at your option) any later version.
10  *
11  * You should have received a copy of the GNU General Public License along
12  * with this program; if not, write to the Free Software Foundation, Inc.,
13  * 675 Mass Ave, Cambridge, MA 02139, USA.
14  */
15 
16 #include <linux/clk.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/errno.h>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/usb/usb_phy_generic.h>
23 
24 #include "musb_core.h"
25 
26 struct jz4740_glue {
27 	struct device           *dev;
28 	struct platform_device  *musb;
29 	struct clk		*clk;
30 };
31 
32 static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
33 {
34 	unsigned long   flags;
35 	irqreturn_t     retval = IRQ_NONE;
36 	struct musb     *musb = __hci;
37 
38 	spin_lock_irqsave(&musb->lock, flags);
39 
40 	musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
41 	musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
42 	musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
43 
44 	/*
45 	 * The controller is gadget only, the state of the host mode IRQ bits is
46 	 * undefined. Mask them to make sure that the musb driver core will
47 	 * never see them set
48 	 */
49 	musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
50 	    MUSB_INTR_RESET | MUSB_INTR_SOF;
51 
52 	if (musb->int_usb || musb->int_tx || musb->int_rx)
53 		retval = musb_interrupt(musb);
54 
55 	spin_unlock_irqrestore(&musb->lock, flags);
56 
57 	return retval;
58 }
59 
60 static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
61 { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
62 { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
63 { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
64 };
65 
66 static struct musb_hdrc_config jz4740_musb_config = {
67 	/* Silicon does not implement USB OTG. */
68 	.multipoint = 0,
69 	/* Max EPs scanned, driver will decide which EP can be used. */
70 	.num_eps    = 4,
71 	/* RAMbits needed to configure EPs from table */
72 	.ram_bits   = 9,
73 	.fifo_cfg = jz4740_musb_fifo_cfg,
74 	.fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
75 };
76 
77 static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
78 	.mode   = MUSB_PERIPHERAL,
79 	.config = &jz4740_musb_config,
80 };
81 
82 static int jz4740_musb_init(struct musb *musb)
83 {
84 	usb_phy_generic_register();
85 	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
86 	if (!musb->xceiv) {
87 		pr_err("HS UDC: no transceiver configured\n");
88 		return -ENODEV;
89 	}
90 
91 	/* Silicon does not implement ConfigData register.
92 	 * Set dyn_fifo to avoid reading EP config from hardware.
93 	 */
94 	musb->dyn_fifo = true;
95 
96 	musb->isr = jz4740_musb_interrupt;
97 
98 	return 0;
99 }
100 
101 static int jz4740_musb_exit(struct musb *musb)
102 {
103 	usb_put_phy(musb->xceiv);
104 
105 	return 0;
106 }
107 
108 static const struct musb_platform_ops jz4740_musb_ops = {
109 	.quirks		= MUSB_INDEXED_EP,
110 	.fifo_mode	= 2,
111 	.init		= jz4740_musb_init,
112 	.exit		= jz4740_musb_exit,
113 };
114 
115 static int jz4740_probe(struct platform_device *pdev)
116 {
117 	struct musb_hdrc_platform_data	*pdata = &jz4740_musb_platform_data;
118 	struct platform_device		*musb;
119 	struct jz4740_glue		*glue;
120 	struct clk                      *clk;
121 	int				ret;
122 
123 	glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
124 	if (!glue)
125 		return -ENOMEM;
126 
127 	musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
128 	if (!musb) {
129 		dev_err(&pdev->dev, "failed to allocate musb device\n");
130 		return -ENOMEM;
131 	}
132 
133 	clk = devm_clk_get(&pdev->dev, "udc");
134 	if (IS_ERR(clk)) {
135 		dev_err(&pdev->dev, "failed to get clock\n");
136 		ret = PTR_ERR(clk);
137 		goto err_platform_device_put;
138 	}
139 
140 	ret = clk_prepare_enable(clk);
141 	if (ret) {
142 		dev_err(&pdev->dev, "failed to enable clock\n");
143 		goto err_platform_device_put;
144 	}
145 
146 	musb->dev.parent		= &pdev->dev;
147 
148 	glue->dev			= &pdev->dev;
149 	glue->musb			= musb;
150 	glue->clk			= clk;
151 
152 	pdata->platform_ops		= &jz4740_musb_ops;
153 
154 	platform_set_drvdata(pdev, glue);
155 
156 	ret = platform_device_add_resources(musb, pdev->resource,
157 					    pdev->num_resources);
158 	if (ret) {
159 		dev_err(&pdev->dev, "failed to add resources\n");
160 		goto err_clk_disable;
161 	}
162 
163 	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
164 	if (ret) {
165 		dev_err(&pdev->dev, "failed to add platform_data\n");
166 		goto err_clk_disable;
167 	}
168 
169 	ret = platform_device_add(musb);
170 	if (ret) {
171 		dev_err(&pdev->dev, "failed to register musb device\n");
172 		goto err_clk_disable;
173 	}
174 
175 	return 0;
176 
177 err_clk_disable:
178 	clk_disable_unprepare(clk);
179 err_platform_device_put:
180 	platform_device_put(musb);
181 	return ret;
182 }
183 
184 static int jz4740_remove(struct platform_device *pdev)
185 {
186 	struct jz4740_glue	*glue = platform_get_drvdata(pdev);
187 
188 	platform_device_unregister(glue->musb);
189 	usb_phy_generic_unregister(pdev);
190 	clk_disable_unprepare(glue->clk);
191 
192 	return 0;
193 }
194 
195 static struct platform_driver jz4740_driver = {
196 	.probe		= jz4740_probe,
197 	.remove		= jz4740_remove,
198 	.driver		= {
199 		.name	= "musb-jz4740",
200 	},
201 };
202 
203 MODULE_DESCRIPTION("JZ4740 MUSB Glue Layer");
204 MODULE_AUTHOR("Apelete Seketeli <apelete@seketeli.net>");
205 MODULE_LICENSE("GPL v2");
206 module_platform_driver(jz4740_driver);
207