xref: /linux/drivers/usb/isp1760/isp1760-core.c (revision a74f639c5b5618e2c9f311c93bc3e7405de8ca85)
15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0
27ef077a8SLaurent Pinchart /*
37ef077a8SLaurent Pinchart  * Driver for the NXP ISP1760 chip
47ef077a8SLaurent Pinchart  *
57ef077a8SLaurent Pinchart  * Copyright 2014 Laurent Pinchart
67ef077a8SLaurent Pinchart  * Copyright 2007 Sebastian Siewior
77ef077a8SLaurent Pinchart  *
87ef077a8SLaurent Pinchart  * Contacts:
97ef077a8SLaurent Pinchart  *	Sebastian Siewior <bigeasy@linutronix.de>
107ef077a8SLaurent Pinchart  *	Laurent Pinchart <laurent.pinchart@ideasonboard.com>
117ef077a8SLaurent Pinchart  */
127ef077a8SLaurent Pinchart 
137ef077a8SLaurent Pinchart #include <linux/delay.h>
147ef077a8SLaurent Pinchart #include <linux/gpio/consumer.h>
157ef077a8SLaurent Pinchart #include <linux/io.h>
167ef077a8SLaurent Pinchart #include <linux/kernel.h>
177ef077a8SLaurent Pinchart #include <linux/module.h>
181da9e1c0SRui Miguel Silva #include <linux/regmap.h>
197ef077a8SLaurent Pinchart #include <linux/slab.h>
207ef077a8SLaurent Pinchart #include <linux/usb.h>
217ef077a8SLaurent Pinchart 
227ef077a8SLaurent Pinchart #include "isp1760-core.h"
237ef077a8SLaurent Pinchart #include "isp1760-hcd.h"
247ef077a8SLaurent Pinchart #include "isp1760-regs.h"
257ef077a8SLaurent Pinchart #include "isp1760-udc.h"
267ef077a8SLaurent Pinchart 
277ef077a8SLaurent Pinchart static void isp1760_init_core(struct isp1760_device *isp)
287ef077a8SLaurent Pinchart {
291da9e1c0SRui Miguel Silva 	struct isp1760_hcd *hcd = &isp->hcd;
301da9e1c0SRui Miguel Silva 	struct isp1760_udc *udc = &isp->udc;
317ef077a8SLaurent Pinchart 
327ef077a8SLaurent Pinchart 	/* Low-level chip reset */
337ef077a8SLaurent Pinchart 	if (isp->rst_gpio) {
347ef077a8SLaurent Pinchart 		gpiod_set_value_cansleep(isp->rst_gpio, 1);
350f029008SJia-Ju Bai 		msleep(50);
367ef077a8SLaurent Pinchart 		gpiod_set_value_cansleep(isp->rst_gpio, 0);
377ef077a8SLaurent Pinchart 	}
387ef077a8SLaurent Pinchart 
397ef077a8SLaurent Pinchart 	/*
407ef077a8SLaurent Pinchart 	 * Reset the host controller, including the CPU interface
417ef077a8SLaurent Pinchart 	 * configuration.
427ef077a8SLaurent Pinchart 	 */
431da9e1c0SRui Miguel Silva 	isp1760_field_set(hcd->fields, SW_RESET_RESET_ALL);
447ef077a8SLaurent Pinchart 	msleep(100);
457ef077a8SLaurent Pinchart 
467ef077a8SLaurent Pinchart 	/* Setup HW Mode Control: This assumes a level active-low interrupt */
477ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16)
481da9e1c0SRui Miguel Silva 		isp1760_field_clear(hcd->fields, HW_DATA_BUS_WIDTH);
497ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_ANALOG_OC)
501da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_ANA_DIGI_OC);
517ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH)
521da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_DACK_POL_HIGH);
537ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH)
541da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_DREQ_POL_HIGH);
557ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH)
561da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_INTR_HIGH_ACT);
577ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG)
581da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_INTR_EDGE_TRIG);
597ef077a8SLaurent Pinchart 
607ef077a8SLaurent Pinchart 	/*
617ef077a8SLaurent Pinchart 	 * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC
627ef077a8SLaurent Pinchart 	 * IRQ line for both the host and device controllers. Hardcode IRQ
637ef077a8SLaurent Pinchart 	 * sharing for now and disable the DC interrupts globally to avoid
647ef077a8SLaurent Pinchart 	 * spurious interrupts during HCD registration.
657ef077a8SLaurent Pinchart 	 */
667ef077a8SLaurent Pinchart 	if (isp->devflags & ISP1760_FLAG_ISP1761) {
671da9e1c0SRui Miguel Silva 		isp1760_reg_write(udc->regs, ISP176x_DC_MODE, 0);
681da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_COMN_IRQ);
697ef077a8SLaurent Pinchart 	}
707ef077a8SLaurent Pinchart 
717ef077a8SLaurent Pinchart 	/*
727ef077a8SLaurent Pinchart 	 * PORT 1 Control register of the ISP1760 is the OTG control register
737ef077a8SLaurent Pinchart 	 * on ISP1761.
747ef077a8SLaurent Pinchart 	 *
757ef077a8SLaurent Pinchart 	 * TODO: Really support OTG. For now we configure port 1 in device mode
767ef077a8SLaurent Pinchart 	 * when OTG is requested.
777ef077a8SLaurent Pinchart 	 */
787ef077a8SLaurent Pinchart 	if ((isp->devflags & ISP1760_FLAG_ISP1761) &&
791da9e1c0SRui Miguel Silva 	    (isp->devflags & ISP1760_FLAG_OTG_EN)) {
801da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_DM_PULLDOWN);
811da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_DP_PULLDOWN);
821da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_OTG_DISABLE);
831da9e1c0SRui Miguel Silva 	} else {
841da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC);
851da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_VBUS_DRV);
861da9e1c0SRui Miguel Silva 		isp1760_field_set(hcd->fields, HW_SEL_CP_EXT);
871da9e1c0SRui Miguel Silva 	}
887ef077a8SLaurent Pinchart 
897ef077a8SLaurent Pinchart 	dev_info(isp->dev, "bus width: %u, oc: %s\n",
907ef077a8SLaurent Pinchart 		 isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32,
917ef077a8SLaurent Pinchart 		 isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital");
927ef077a8SLaurent Pinchart }
937ef077a8SLaurent Pinchart 
947ef077a8SLaurent Pinchart void isp1760_set_pullup(struct isp1760_device *isp, bool enable)
957ef077a8SLaurent Pinchart {
961da9e1c0SRui Miguel Silva 	struct isp1760_udc *udc = &isp->udc;
971da9e1c0SRui Miguel Silva 
981da9e1c0SRui Miguel Silva 	if (enable)
991da9e1c0SRui Miguel Silva 		isp1760_field_set(udc->fields, HW_DP_PULLUP);
1001da9e1c0SRui Miguel Silva 	else
1011da9e1c0SRui Miguel Silva 		isp1760_field_set(udc->fields, HW_DP_PULLUP_CLEAR);
1027ef077a8SLaurent Pinchart }
1037ef077a8SLaurent Pinchart 
104*a74f639cSRui Miguel Silva /*
105*a74f639cSRui Miguel Silva  * 60kb divided in:
106*a74f639cSRui Miguel Silva  * - 32 blocks @ 256  bytes
107*a74f639cSRui Miguel Silva  * - 20 blocks @ 1024 bytes
108*a74f639cSRui Miguel Silva  * -  4 blocks @ 8192 bytes
109*a74f639cSRui Miguel Silva  */
110*a74f639cSRui Miguel Silva static const struct isp1760_memory_layout isp176x_memory_conf = {
111*a74f639cSRui Miguel Silva 	.blocks[0]		= 32,
112*a74f639cSRui Miguel Silva 	.blocks_size[0]		= 256,
113*a74f639cSRui Miguel Silva 	.blocks[1]		= 20,
114*a74f639cSRui Miguel Silva 	.blocks_size[1]		= 1024,
115*a74f639cSRui Miguel Silva 	.blocks[2]		= 4,
116*a74f639cSRui Miguel Silva 	.blocks_size[2]		= 8192,
117*a74f639cSRui Miguel Silva 
118*a74f639cSRui Miguel Silva 	.ptd_num		= 32,
119*a74f639cSRui Miguel Silva 	.payload_blocks		= 32 + 20 + 4,
120*a74f639cSRui Miguel Silva 	.payload_area_size	= 0xf000,
121*a74f639cSRui Miguel Silva };
122*a74f639cSRui Miguel Silva 
1231da9e1c0SRui Miguel Silva static const struct regmap_range isp176x_hc_volatile_ranges[] = {
1241da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP176x_HC_USBCMD, ISP176x_HC_ATL_PTD_LASTPTD),
1251da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP176x_HC_BUFFER_STATUS, ISP176x_HC_MEMORY),
1261da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP176x_HC_INTERRUPT, ISP176x_HC_ATL_IRQ_MASK_AND),
1271da9e1c0SRui Miguel Silva };
1281da9e1c0SRui Miguel Silva 
1291da9e1c0SRui Miguel Silva static const struct regmap_access_table isp176x_hc_volatile_table = {
1301da9e1c0SRui Miguel Silva 	.yes_ranges	= isp176x_hc_volatile_ranges,
1311da9e1c0SRui Miguel Silva 	.n_yes_ranges	= ARRAY_SIZE(isp176x_hc_volatile_ranges),
1321da9e1c0SRui Miguel Silva };
1331da9e1c0SRui Miguel Silva 
1341da9e1c0SRui Miguel Silva static struct regmap_config isp1760_hc_regmap_conf = {
1351da9e1c0SRui Miguel Silva 	.name = "isp1760-hc",
1361da9e1c0SRui Miguel Silva 	.reg_bits = 16,
1371da9e1c0SRui Miguel Silva 	.reg_stride = 4,
1381da9e1c0SRui Miguel Silva 	.val_bits = 32,
1391da9e1c0SRui Miguel Silva 	.fast_io = true,
1401da9e1c0SRui Miguel Silva 	.max_register = ISP176x_HC_MEMORY,
1411da9e1c0SRui Miguel Silva 	.volatile_table = &isp176x_hc_volatile_table,
1421da9e1c0SRui Miguel Silva };
1431da9e1c0SRui Miguel Silva 
1441da9e1c0SRui Miguel Silva static const struct reg_field isp1760_hc_reg_fields[] = {
1451da9e1c0SRui Miguel Silva 	[HCS_PPC]		= REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4),
1461da9e1c0SRui Miguel Silva 	[HCS_N_PORTS]		= REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3),
1471da9e1c0SRui Miguel Silva 	[HCC_ISOC_CACHE]	= REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7),
1481da9e1c0SRui Miguel Silva 	[HCC_ISOC_THRES]	= REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6),
1491da9e1c0SRui Miguel Silva 	[CMD_LRESET]		= REG_FIELD(ISP176x_HC_USBCMD, 7, 7),
1501da9e1c0SRui Miguel Silva 	[CMD_RESET]		= REG_FIELD(ISP176x_HC_USBCMD, 1, 1),
1511da9e1c0SRui Miguel Silva 	[CMD_RUN]		= REG_FIELD(ISP176x_HC_USBCMD, 0, 0),
1521da9e1c0SRui Miguel Silva 	[STS_PCD]		= REG_FIELD(ISP176x_HC_USBSTS, 2, 2),
1531da9e1c0SRui Miguel Silva 	[HC_FRINDEX]		= REG_FIELD(ISP176x_HC_FRINDEX, 0, 13),
1541da9e1c0SRui Miguel Silva 	[FLAG_CF]		= REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0),
1551da9e1c0SRui Miguel Silva 	[PORT_OWNER]		= REG_FIELD(ISP176x_HC_PORTSC1, 13, 13),
1561da9e1c0SRui Miguel Silva 	[PORT_POWER]		= REG_FIELD(ISP176x_HC_PORTSC1, 12, 12),
1571da9e1c0SRui Miguel Silva 	[PORT_LSTATUS]		= REG_FIELD(ISP176x_HC_PORTSC1, 10, 11),
1581da9e1c0SRui Miguel Silva 	[PORT_RESET]		= REG_FIELD(ISP176x_HC_PORTSC1, 8, 8),
1591da9e1c0SRui Miguel Silva 	[PORT_SUSPEND]		= REG_FIELD(ISP176x_HC_PORTSC1, 7, 7),
1601da9e1c0SRui Miguel Silva 	[PORT_RESUME]		= REG_FIELD(ISP176x_HC_PORTSC1, 6, 6),
1611da9e1c0SRui Miguel Silva 	[PORT_PE]		= REG_FIELD(ISP176x_HC_PORTSC1, 2, 2),
1621da9e1c0SRui Miguel Silva 	[PORT_CSC]		= REG_FIELD(ISP176x_HC_PORTSC1, 1, 1),
1631da9e1c0SRui Miguel Silva 	[PORT_CONNECT]		= REG_FIELD(ISP176x_HC_PORTSC1, 0, 0),
1641da9e1c0SRui Miguel Silva 	[ALL_ATX_RESET]		= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31),
1651da9e1c0SRui Miguel Silva 	[HW_ANA_DIGI_OC]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15),
1661da9e1c0SRui Miguel Silva 	[HW_COMN_IRQ]		= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10),
1671da9e1c0SRui Miguel Silva 	[HW_DATA_BUS_WIDTH]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8),
1681da9e1c0SRui Miguel Silva 	[HW_DACK_POL_HIGH]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6),
1691da9e1c0SRui Miguel Silva 	[HW_DREQ_POL_HIGH]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5),
1701da9e1c0SRui Miguel Silva 	[HW_INTR_HIGH_ACT]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2),
1711da9e1c0SRui Miguel Silva 	[HW_INTR_EDGE_TRIG]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1),
1721da9e1c0SRui Miguel Silva 	[HW_GLOBAL_INTR_EN]	= REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0),
1731da9e1c0SRui Miguel Silva 	[SW_RESET_RESET_ALL]	= REG_FIELD(ISP176x_HC_RESET, 0, 0),
1741da9e1c0SRui Miguel Silva 	[INT_BUF_FILL]		= REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1),
1751da9e1c0SRui Miguel Silva 	[ATL_BUF_FILL]		= REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0),
1761da9e1c0SRui Miguel Silva 	[MEM_BANK_SEL]		= REG_FIELD(ISP176x_HC_MEMORY, 16, 17),
1771da9e1c0SRui Miguel Silva 	[MEM_START_ADDR]	= REG_FIELD(ISP176x_HC_MEMORY, 0, 15),
1781da9e1c0SRui Miguel Silva 	[HC_INT_ENABLE]		= REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 8),
1791da9e1c0SRui Miguel Silva };
1801da9e1c0SRui Miguel Silva 
1811da9e1c0SRui Miguel Silva static const struct regmap_range isp176x_dc_volatile_ranges[] = {
1821da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP176x_DC_EPMAXPKTSZ, ISP176x_DC_EPTYPE),
1831da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP176x_DC_BUFLEN, ISP176x_DC_EPINDEX),
1841da9e1c0SRui Miguel Silva 	regmap_reg_range(ISP1761_DC_OTG_CTRL_SET, ISP1761_DC_OTG_CTRL_CLEAR),
1851da9e1c0SRui Miguel Silva };
1861da9e1c0SRui Miguel Silva 
1871da9e1c0SRui Miguel Silva static const struct regmap_access_table isp176x_dc_volatile_table = {
1881da9e1c0SRui Miguel Silva 	.yes_ranges	= isp176x_dc_volatile_ranges,
1891da9e1c0SRui Miguel Silva 	.n_yes_ranges	= ARRAY_SIZE(isp176x_dc_volatile_ranges),
1901da9e1c0SRui Miguel Silva };
1911da9e1c0SRui Miguel Silva 
1921da9e1c0SRui Miguel Silva static struct regmap_config isp1761_dc_regmap_conf = {
1931da9e1c0SRui Miguel Silva 	.name = "isp1761-dc",
1941da9e1c0SRui Miguel Silva 	.reg_bits = 16,
1951da9e1c0SRui Miguel Silva 	.reg_stride = 4,
1961da9e1c0SRui Miguel Silva 	.val_bits = 32,
1971da9e1c0SRui Miguel Silva 	.fast_io = true,
1981da9e1c0SRui Miguel Silva 	.max_register = ISP1761_DC_OTG_CTRL_CLEAR,
1991da9e1c0SRui Miguel Silva 	.volatile_table = &isp176x_dc_volatile_table,
2001da9e1c0SRui Miguel Silva };
2011da9e1c0SRui Miguel Silva 
2021da9e1c0SRui Miguel Silva static const struct reg_field isp1761_dc_reg_fields[] = {
2031da9e1c0SRui Miguel Silva 	[DC_DEVEN]		= REG_FIELD(ISP176x_DC_ADDRESS, 7, 7),
2041da9e1c0SRui Miguel Silva 	[DC_DEVADDR]		= REG_FIELD(ISP176x_DC_ADDRESS, 0, 6),
2051da9e1c0SRui Miguel Silva 	[DC_VBUSSTAT]		= REG_FIELD(ISP176x_DC_MODE, 8, 8),
2061da9e1c0SRui Miguel Silva 	[DC_SFRESET]		= REG_FIELD(ISP176x_DC_MODE, 4, 4),
2071da9e1c0SRui Miguel Silva 	[DC_GLINTENA]		= REG_FIELD(ISP176x_DC_MODE, 3, 3),
2081da9e1c0SRui Miguel Silva 	[DC_CDBGMOD_ACK]	= REG_FIELD(ISP176x_DC_INTCONF, 6, 6),
2091da9e1c0SRui Miguel Silva 	[DC_DDBGMODIN_ACK]	= REG_FIELD(ISP176x_DC_INTCONF, 4, 4),
2101da9e1c0SRui Miguel Silva 	[DC_DDBGMODOUT_ACK]	= REG_FIELD(ISP176x_DC_INTCONF, 2, 2),
2111da9e1c0SRui Miguel Silva 	[DC_INTPOL]		= REG_FIELD(ISP176x_DC_INTCONF, 0, 0),
2121da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_7]		= REG_FIELD(ISP176x_DC_INTENABLE, 25, 25),
2131da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_6]		= REG_FIELD(ISP176x_DC_INTENABLE, 23, 23),
2141da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_5]		= REG_FIELD(ISP176x_DC_INTENABLE, 21, 21),
2151da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_4]		= REG_FIELD(ISP176x_DC_INTENABLE, 19, 19),
2161da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_3]		= REG_FIELD(ISP176x_DC_INTENABLE, 17, 17),
2171da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_2]		= REG_FIELD(ISP176x_DC_INTENABLE, 15, 15),
2181da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_1]		= REG_FIELD(ISP176x_DC_INTENABLE, 13, 13),
2191da9e1c0SRui Miguel Silva 	[DC_IEPRXTX_0]		= REG_FIELD(ISP176x_DC_INTENABLE, 11, 11),
2201da9e1c0SRui Miguel Silva 	[DC_IEP0SETUP]		= REG_FIELD(ISP176x_DC_INTENABLE, 8, 8),
2211da9e1c0SRui Miguel Silva 	[DC_IEVBUS]		= REG_FIELD(ISP176x_DC_INTENABLE, 7, 7),
2221da9e1c0SRui Miguel Silva 	[DC_IEHS_STA]		= REG_FIELD(ISP176x_DC_INTENABLE, 5, 5),
2231da9e1c0SRui Miguel Silva 	[DC_IERESM]		= REG_FIELD(ISP176x_DC_INTENABLE, 4, 4),
2241da9e1c0SRui Miguel Silva 	[DC_IESUSP]		= REG_FIELD(ISP176x_DC_INTENABLE, 3, 3),
2251da9e1c0SRui Miguel Silva 	[DC_IEBRST]		= REG_FIELD(ISP176x_DC_INTENABLE, 0, 0),
2261da9e1c0SRui Miguel Silva 	[DC_EP0SETUP]		= REG_FIELD(ISP176x_DC_EPINDEX, 5, 5),
2271da9e1c0SRui Miguel Silva 	[DC_ENDPIDX]		= REG_FIELD(ISP176x_DC_EPINDEX, 1, 4),
2281da9e1c0SRui Miguel Silva 	[DC_EPDIR]		= REG_FIELD(ISP176x_DC_EPINDEX, 0, 0),
2291da9e1c0SRui Miguel Silva 	[DC_CLBUF]		= REG_FIELD(ISP176x_DC_CTRLFUNC, 4, 4),
2301da9e1c0SRui Miguel Silva 	[DC_VENDP]		= REG_FIELD(ISP176x_DC_CTRLFUNC, 3, 3),
2311da9e1c0SRui Miguel Silva 	[DC_DSEN]		= REG_FIELD(ISP176x_DC_CTRLFUNC, 2, 2),
2321da9e1c0SRui Miguel Silva 	[DC_STATUS]		= REG_FIELD(ISP176x_DC_CTRLFUNC, 1, 1),
2331da9e1c0SRui Miguel Silva 	[DC_STALL]		= REG_FIELD(ISP176x_DC_CTRLFUNC, 0, 0),
2341da9e1c0SRui Miguel Silva 	[DC_BUFLEN]		= REG_FIELD(ISP176x_DC_BUFLEN, 0, 15),
2351da9e1c0SRui Miguel Silva 	[DC_FFOSZ]		= REG_FIELD(ISP176x_DC_EPMAXPKTSZ, 0, 10),
2361da9e1c0SRui Miguel Silva 	[DC_EPENABLE]		= REG_FIELD(ISP176x_DC_EPTYPE, 3, 3),
2371da9e1c0SRui Miguel Silva 	[DC_ENDPTYP]		= REG_FIELD(ISP176x_DC_EPTYPE, 0, 1),
2381da9e1c0SRui Miguel Silva 	[DC_UFRAMENUM]		= REG_FIELD(ISP176x_DC_FRAMENUM, 11, 13),
2391da9e1c0SRui Miguel Silva 	[DC_FRAMENUM]		= REG_FIELD(ISP176x_DC_FRAMENUM, 0, 10),
2401da9e1c0SRui Miguel Silva 	[HW_OTG_DISABLE]	= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 10, 10),
2411da9e1c0SRui Miguel Silva 	[HW_SW_SEL_HC_DC]	= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 7, 7),
2421da9e1c0SRui Miguel Silva 	[HW_VBUS_DRV]		= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 4, 4),
2431da9e1c0SRui Miguel Silva 	[HW_SEL_CP_EXT]		= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 3, 3),
2441da9e1c0SRui Miguel Silva 	[HW_DM_PULLDOWN]	= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 2, 2),
2451da9e1c0SRui Miguel Silva 	[HW_DP_PULLDOWN]	= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 1, 1),
2461da9e1c0SRui Miguel Silva 	[HW_DP_PULLUP]		= REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 0, 0),
2471da9e1c0SRui Miguel Silva 	[HW_OTG_DISABLE_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 10, 10),
2481da9e1c0SRui Miguel Silva 	[HW_SW_SEL_HC_DC_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 7, 7),
2491da9e1c0SRui Miguel Silva 	[HW_VBUS_DRV_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 4, 4),
2501da9e1c0SRui Miguel Silva 	[HW_SEL_CP_EXT_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 3, 3),
2511da9e1c0SRui Miguel Silva 	[HW_DM_PULLDOWN_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 2, 2),
2521da9e1c0SRui Miguel Silva 	[HW_DP_PULLDOWN_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 1, 1),
2531da9e1c0SRui Miguel Silva 	[HW_DP_PULLUP_CLEAR]	= REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 0, 0),
2541da9e1c0SRui Miguel Silva };
2551da9e1c0SRui Miguel Silva 
2567ef077a8SLaurent Pinchart int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
2577ef077a8SLaurent Pinchart 		     struct device *dev, unsigned int devflags)
2587ef077a8SLaurent Pinchart {
2597ef077a8SLaurent Pinchart 	struct isp1760_device *isp;
2601da9e1c0SRui Miguel Silva 	struct isp1760_hcd *hcd;
2611da9e1c0SRui Miguel Silva 	struct isp1760_udc *udc;
262d21daf1eSLaurent Pinchart 	bool udc_disabled = !(devflags & ISP1760_FLAG_ISP1761);
2631da9e1c0SRui Miguel Silva 	struct regmap_field *f;
2641da9e1c0SRui Miguel Silva 	void __iomem *base;
2657ef077a8SLaurent Pinchart 	int ret;
2661da9e1c0SRui Miguel Silva 	int i;
2677ef077a8SLaurent Pinchart 
268d21daf1eSLaurent Pinchart 	/*
269d21daf1eSLaurent Pinchart 	 * If neither the HCD not the UDC is enabled return an error, as no
270d21daf1eSLaurent Pinchart 	 * device would be registered.
271d21daf1eSLaurent Pinchart 	 */
272d21daf1eSLaurent Pinchart 	if ((!IS_ENABLED(CONFIG_USB_ISP1760_HCD) || usb_disabled()) &&
273d21daf1eSLaurent Pinchart 	    (!IS_ENABLED(CONFIG_USB_ISP1761_UDC) || udc_disabled))
2747ef077a8SLaurent Pinchart 		return -ENODEV;
2757ef077a8SLaurent Pinchart 
2767ef077a8SLaurent Pinchart 	isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL);
2777ef077a8SLaurent Pinchart 	if (!isp)
2787ef077a8SLaurent Pinchart 		return -ENOMEM;
2797ef077a8SLaurent Pinchart 
2807ef077a8SLaurent Pinchart 	isp->dev = dev;
2817ef077a8SLaurent Pinchart 	isp->devflags = devflags;
2821da9e1c0SRui Miguel Silva 	hcd = &isp->hcd;
2831da9e1c0SRui Miguel Silva 	udc = &isp->udc;
2841da9e1c0SRui Miguel Silva 
2851da9e1c0SRui Miguel Silva 	if (devflags & ISP1760_FLAG_BUS_WIDTH_16) {
2861da9e1c0SRui Miguel Silva 		isp1760_hc_regmap_conf.val_bits = 16;
2871da9e1c0SRui Miguel Silva 		isp1761_dc_regmap_conf.val_bits = 16;
2881da9e1c0SRui Miguel Silva 	}
2897ef077a8SLaurent Pinchart 
2907ef077a8SLaurent Pinchart 	isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH);
2917ef077a8SLaurent Pinchart 	if (IS_ERR(isp->rst_gpio))
2927ef077a8SLaurent Pinchart 		return PTR_ERR(isp->rst_gpio);
2937ef077a8SLaurent Pinchart 
2941da9e1c0SRui Miguel Silva 	hcd->base = devm_ioremap_resource(dev, mem);
2951da9e1c0SRui Miguel Silva 	if (IS_ERR(hcd->base))
2961da9e1c0SRui Miguel Silva 		return PTR_ERR(hcd->base);
2971da9e1c0SRui Miguel Silva 
2981da9e1c0SRui Miguel Silva 	hcd->regs = devm_regmap_init_mmio(dev, base, &isp1760_hc_regmap_conf);
2991da9e1c0SRui Miguel Silva 	if (IS_ERR(hcd->regs))
3001da9e1c0SRui Miguel Silva 		return PTR_ERR(hcd->regs);
3011da9e1c0SRui Miguel Silva 
3021da9e1c0SRui Miguel Silva 	for (i = 0; i < HC_FIELD_MAX; i++) {
3031da9e1c0SRui Miguel Silva 		f = devm_regmap_field_alloc(dev, hcd->regs,
3041da9e1c0SRui Miguel Silva 					    isp1760_hc_reg_fields[i]);
3051da9e1c0SRui Miguel Silva 		if (IS_ERR(f))
3061da9e1c0SRui Miguel Silva 			return PTR_ERR(f);
3071da9e1c0SRui Miguel Silva 
3081da9e1c0SRui Miguel Silva 		hcd->fields[i] = f;
3091da9e1c0SRui Miguel Silva 	}
3101da9e1c0SRui Miguel Silva 
3111da9e1c0SRui Miguel Silva 	udc->regs = devm_regmap_init_mmio(dev, base, &isp1761_dc_regmap_conf);
3121da9e1c0SRui Miguel Silva 	if (IS_ERR(udc->regs))
3131da9e1c0SRui Miguel Silva 		return PTR_ERR(udc->regs);
3141da9e1c0SRui Miguel Silva 
3151da9e1c0SRui Miguel Silva 	for (i = 0; i < DC_FIELD_MAX; i++) {
3161da9e1c0SRui Miguel Silva 		f = devm_regmap_field_alloc(dev, udc->regs,
3171da9e1c0SRui Miguel Silva 					    isp1761_dc_reg_fields[i]);
3181da9e1c0SRui Miguel Silva 		if (IS_ERR(f))
3191da9e1c0SRui Miguel Silva 			return PTR_ERR(f);
3201da9e1c0SRui Miguel Silva 
3211da9e1c0SRui Miguel Silva 		udc->fields[i] = f;
3221da9e1c0SRui Miguel Silva 	}
3237ef077a8SLaurent Pinchart 
324*a74f639cSRui Miguel Silva 	hcd->memory_layout = &isp176x_memory_conf;
325*a74f639cSRui Miguel Silva 
3267ef077a8SLaurent Pinchart 	isp1760_init_core(isp);
3277ef077a8SLaurent Pinchart 
328d21daf1eSLaurent Pinchart 	if (IS_ENABLED(CONFIG_USB_ISP1760_HCD) && !usb_disabled()) {
3291da9e1c0SRui Miguel Silva 		ret = isp1760_hcd_register(hcd, mem, irq,
3307ef077a8SLaurent Pinchart 					   irqflags | IRQF_SHARED, dev);
3317ef077a8SLaurent Pinchart 		if (ret < 0)
3327ef077a8SLaurent Pinchart 			return ret;
333d21daf1eSLaurent Pinchart 	}
3347ef077a8SLaurent Pinchart 
335d21daf1eSLaurent Pinchart 	if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && !udc_disabled) {
33680b4a0f8SValentin Rothberg 		ret = isp1760_udc_register(isp, irq, irqflags);
3377ef077a8SLaurent Pinchart 		if (ret < 0) {
3381da9e1c0SRui Miguel Silva 			isp1760_hcd_unregister(hcd);
3397ef077a8SLaurent Pinchart 			return ret;
3407ef077a8SLaurent Pinchart 		}
3417ef077a8SLaurent Pinchart 	}
3427ef077a8SLaurent Pinchart 
3437ef077a8SLaurent Pinchart 	dev_set_drvdata(dev, isp);
3447ef077a8SLaurent Pinchart 
3457ef077a8SLaurent Pinchart 	return 0;
3467ef077a8SLaurent Pinchart }
3477ef077a8SLaurent Pinchart 
3487ef077a8SLaurent Pinchart void isp1760_unregister(struct device *dev)
3497ef077a8SLaurent Pinchart {
3507ef077a8SLaurent Pinchart 	struct isp1760_device *isp = dev_get_drvdata(dev);
3517ef077a8SLaurent Pinchart 
3527ef077a8SLaurent Pinchart 	isp1760_udc_unregister(isp);
3537ef077a8SLaurent Pinchart 	isp1760_hcd_unregister(&isp->hcd);
3547ef077a8SLaurent Pinchart }
3557ef077a8SLaurent Pinchart 
3567ef077a8SLaurent Pinchart MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP");
3577ef077a8SLaurent Pinchart MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>");
3587ef077a8SLaurent Pinchart MODULE_LICENSE("GPL v2");
359