15fd54aceSGreg Kroah-Hartman // SPDX-License-Identifier: GPL-2.0 27ef077a8SLaurent Pinchart /* 37ef077a8SLaurent Pinchart * Driver for the NXP ISP1760 chip 47ef077a8SLaurent Pinchart * 57ef077a8SLaurent Pinchart * Copyright 2014 Laurent Pinchart 67ef077a8SLaurent Pinchart * Copyright 2007 Sebastian Siewior 77ef077a8SLaurent Pinchart * 87ef077a8SLaurent Pinchart * Contacts: 97ef077a8SLaurent Pinchart * Sebastian Siewior <bigeasy@linutronix.de> 107ef077a8SLaurent Pinchart * Laurent Pinchart <laurent.pinchart@ideasonboard.com> 117ef077a8SLaurent Pinchart */ 127ef077a8SLaurent Pinchart 137ef077a8SLaurent Pinchart #include <linux/delay.h> 147ef077a8SLaurent Pinchart #include <linux/gpio/consumer.h> 157ef077a8SLaurent Pinchart #include <linux/io.h> 167ef077a8SLaurent Pinchart #include <linux/kernel.h> 177ef077a8SLaurent Pinchart #include <linux/module.h> 18*1da9e1c0SRui Miguel Silva #include <linux/regmap.h> 197ef077a8SLaurent Pinchart #include <linux/slab.h> 207ef077a8SLaurent Pinchart #include <linux/usb.h> 217ef077a8SLaurent Pinchart 227ef077a8SLaurent Pinchart #include "isp1760-core.h" 237ef077a8SLaurent Pinchart #include "isp1760-hcd.h" 247ef077a8SLaurent Pinchart #include "isp1760-regs.h" 257ef077a8SLaurent Pinchart #include "isp1760-udc.h" 267ef077a8SLaurent Pinchart 277ef077a8SLaurent Pinchart static void isp1760_init_core(struct isp1760_device *isp) 287ef077a8SLaurent Pinchart { 29*1da9e1c0SRui Miguel Silva struct isp1760_hcd *hcd = &isp->hcd; 30*1da9e1c0SRui Miguel Silva struct isp1760_udc *udc = &isp->udc; 317ef077a8SLaurent Pinchart 327ef077a8SLaurent Pinchart /* Low-level chip reset */ 337ef077a8SLaurent Pinchart if (isp->rst_gpio) { 347ef077a8SLaurent Pinchart gpiod_set_value_cansleep(isp->rst_gpio, 1); 350f029008SJia-Ju Bai msleep(50); 367ef077a8SLaurent Pinchart gpiod_set_value_cansleep(isp->rst_gpio, 0); 377ef077a8SLaurent Pinchart } 387ef077a8SLaurent Pinchart 397ef077a8SLaurent Pinchart /* 407ef077a8SLaurent Pinchart * Reset the host controller, including the CPU interface 417ef077a8SLaurent Pinchart * configuration. 427ef077a8SLaurent Pinchart */ 43*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, SW_RESET_RESET_ALL); 447ef077a8SLaurent Pinchart msleep(100); 457ef077a8SLaurent Pinchart 467ef077a8SLaurent Pinchart /* Setup HW Mode Control: This assumes a level active-low interrupt */ 477ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_BUS_WIDTH_16) 48*1da9e1c0SRui Miguel Silva isp1760_field_clear(hcd->fields, HW_DATA_BUS_WIDTH); 497ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_ANALOG_OC) 50*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_ANA_DIGI_OC); 517ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_DACK_POL_HIGH) 52*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_DACK_POL_HIGH); 537ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_DREQ_POL_HIGH) 54*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_DREQ_POL_HIGH); 557ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_INTR_POL_HIGH) 56*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_INTR_HIGH_ACT); 577ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_INTR_EDGE_TRIG) 58*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_INTR_EDGE_TRIG); 597ef077a8SLaurent Pinchart 607ef077a8SLaurent Pinchart /* 617ef077a8SLaurent Pinchart * The ISP1761 has a dedicated DC IRQ line but supports sharing the HC 627ef077a8SLaurent Pinchart * IRQ line for both the host and device controllers. Hardcode IRQ 637ef077a8SLaurent Pinchart * sharing for now and disable the DC interrupts globally to avoid 647ef077a8SLaurent Pinchart * spurious interrupts during HCD registration. 657ef077a8SLaurent Pinchart */ 667ef077a8SLaurent Pinchart if (isp->devflags & ISP1760_FLAG_ISP1761) { 67*1da9e1c0SRui Miguel Silva isp1760_reg_write(udc->regs, ISP176x_DC_MODE, 0); 68*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_COMN_IRQ); 697ef077a8SLaurent Pinchart } 707ef077a8SLaurent Pinchart 717ef077a8SLaurent Pinchart /* 727ef077a8SLaurent Pinchart * PORT 1 Control register of the ISP1760 is the OTG control register 737ef077a8SLaurent Pinchart * on ISP1761. 747ef077a8SLaurent Pinchart * 757ef077a8SLaurent Pinchart * TODO: Really support OTG. For now we configure port 1 in device mode 767ef077a8SLaurent Pinchart * when OTG is requested. 777ef077a8SLaurent Pinchart */ 787ef077a8SLaurent Pinchart if ((isp->devflags & ISP1760_FLAG_ISP1761) && 79*1da9e1c0SRui Miguel Silva (isp->devflags & ISP1760_FLAG_OTG_EN)) { 80*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_DM_PULLDOWN); 81*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_DP_PULLDOWN); 82*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_OTG_DISABLE); 83*1da9e1c0SRui Miguel Silva } else { 84*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_SW_SEL_HC_DC); 85*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_VBUS_DRV); 86*1da9e1c0SRui Miguel Silva isp1760_field_set(hcd->fields, HW_SEL_CP_EXT); 87*1da9e1c0SRui Miguel Silva } 887ef077a8SLaurent Pinchart 897ef077a8SLaurent Pinchart dev_info(isp->dev, "bus width: %u, oc: %s\n", 907ef077a8SLaurent Pinchart isp->devflags & ISP1760_FLAG_BUS_WIDTH_16 ? 16 : 32, 917ef077a8SLaurent Pinchart isp->devflags & ISP1760_FLAG_ANALOG_OC ? "analog" : "digital"); 927ef077a8SLaurent Pinchart } 937ef077a8SLaurent Pinchart 947ef077a8SLaurent Pinchart void isp1760_set_pullup(struct isp1760_device *isp, bool enable) 957ef077a8SLaurent Pinchart { 96*1da9e1c0SRui Miguel Silva struct isp1760_udc *udc = &isp->udc; 97*1da9e1c0SRui Miguel Silva 98*1da9e1c0SRui Miguel Silva if (enable) 99*1da9e1c0SRui Miguel Silva isp1760_field_set(udc->fields, HW_DP_PULLUP); 100*1da9e1c0SRui Miguel Silva else 101*1da9e1c0SRui Miguel Silva isp1760_field_set(udc->fields, HW_DP_PULLUP_CLEAR); 1027ef077a8SLaurent Pinchart } 1037ef077a8SLaurent Pinchart 104*1da9e1c0SRui Miguel Silva static const struct regmap_range isp176x_hc_volatile_ranges[] = { 105*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP176x_HC_USBCMD, ISP176x_HC_ATL_PTD_LASTPTD), 106*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP176x_HC_BUFFER_STATUS, ISP176x_HC_MEMORY), 107*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP176x_HC_INTERRUPT, ISP176x_HC_ATL_IRQ_MASK_AND), 108*1da9e1c0SRui Miguel Silva }; 109*1da9e1c0SRui Miguel Silva 110*1da9e1c0SRui Miguel Silva static const struct regmap_access_table isp176x_hc_volatile_table = { 111*1da9e1c0SRui Miguel Silva .yes_ranges = isp176x_hc_volatile_ranges, 112*1da9e1c0SRui Miguel Silva .n_yes_ranges = ARRAY_SIZE(isp176x_hc_volatile_ranges), 113*1da9e1c0SRui Miguel Silva }; 114*1da9e1c0SRui Miguel Silva 115*1da9e1c0SRui Miguel Silva static struct regmap_config isp1760_hc_regmap_conf = { 116*1da9e1c0SRui Miguel Silva .name = "isp1760-hc", 117*1da9e1c0SRui Miguel Silva .reg_bits = 16, 118*1da9e1c0SRui Miguel Silva .reg_stride = 4, 119*1da9e1c0SRui Miguel Silva .val_bits = 32, 120*1da9e1c0SRui Miguel Silva .fast_io = true, 121*1da9e1c0SRui Miguel Silva .max_register = ISP176x_HC_MEMORY, 122*1da9e1c0SRui Miguel Silva .volatile_table = &isp176x_hc_volatile_table, 123*1da9e1c0SRui Miguel Silva }; 124*1da9e1c0SRui Miguel Silva 125*1da9e1c0SRui Miguel Silva static const struct reg_field isp1760_hc_reg_fields[] = { 126*1da9e1c0SRui Miguel Silva [HCS_PPC] = REG_FIELD(ISP176x_HC_HCSPARAMS, 4, 4), 127*1da9e1c0SRui Miguel Silva [HCS_N_PORTS] = REG_FIELD(ISP176x_HC_HCSPARAMS, 0, 3), 128*1da9e1c0SRui Miguel Silva [HCC_ISOC_CACHE] = REG_FIELD(ISP176x_HC_HCCPARAMS, 7, 7), 129*1da9e1c0SRui Miguel Silva [HCC_ISOC_THRES] = REG_FIELD(ISP176x_HC_HCCPARAMS, 4, 6), 130*1da9e1c0SRui Miguel Silva [CMD_LRESET] = REG_FIELD(ISP176x_HC_USBCMD, 7, 7), 131*1da9e1c0SRui Miguel Silva [CMD_RESET] = REG_FIELD(ISP176x_HC_USBCMD, 1, 1), 132*1da9e1c0SRui Miguel Silva [CMD_RUN] = REG_FIELD(ISP176x_HC_USBCMD, 0, 0), 133*1da9e1c0SRui Miguel Silva [STS_PCD] = REG_FIELD(ISP176x_HC_USBSTS, 2, 2), 134*1da9e1c0SRui Miguel Silva [HC_FRINDEX] = REG_FIELD(ISP176x_HC_FRINDEX, 0, 13), 135*1da9e1c0SRui Miguel Silva [FLAG_CF] = REG_FIELD(ISP176x_HC_CONFIGFLAG, 0, 0), 136*1da9e1c0SRui Miguel Silva [PORT_OWNER] = REG_FIELD(ISP176x_HC_PORTSC1, 13, 13), 137*1da9e1c0SRui Miguel Silva [PORT_POWER] = REG_FIELD(ISP176x_HC_PORTSC1, 12, 12), 138*1da9e1c0SRui Miguel Silva [PORT_LSTATUS] = REG_FIELD(ISP176x_HC_PORTSC1, 10, 11), 139*1da9e1c0SRui Miguel Silva [PORT_RESET] = REG_FIELD(ISP176x_HC_PORTSC1, 8, 8), 140*1da9e1c0SRui Miguel Silva [PORT_SUSPEND] = REG_FIELD(ISP176x_HC_PORTSC1, 7, 7), 141*1da9e1c0SRui Miguel Silva [PORT_RESUME] = REG_FIELD(ISP176x_HC_PORTSC1, 6, 6), 142*1da9e1c0SRui Miguel Silva [PORT_PE] = REG_FIELD(ISP176x_HC_PORTSC1, 2, 2), 143*1da9e1c0SRui Miguel Silva [PORT_CSC] = REG_FIELD(ISP176x_HC_PORTSC1, 1, 1), 144*1da9e1c0SRui Miguel Silva [PORT_CONNECT] = REG_FIELD(ISP176x_HC_PORTSC1, 0, 0), 145*1da9e1c0SRui Miguel Silva [ALL_ATX_RESET] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 31, 31), 146*1da9e1c0SRui Miguel Silva [HW_ANA_DIGI_OC] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 15, 15), 147*1da9e1c0SRui Miguel Silva [HW_COMN_IRQ] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 10, 10), 148*1da9e1c0SRui Miguel Silva [HW_DATA_BUS_WIDTH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 8, 8), 149*1da9e1c0SRui Miguel Silva [HW_DACK_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 6, 6), 150*1da9e1c0SRui Miguel Silva [HW_DREQ_POL_HIGH] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 5, 5), 151*1da9e1c0SRui Miguel Silva [HW_INTR_HIGH_ACT] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 2, 2), 152*1da9e1c0SRui Miguel Silva [HW_INTR_EDGE_TRIG] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 1, 1), 153*1da9e1c0SRui Miguel Silva [HW_GLOBAL_INTR_EN] = REG_FIELD(ISP176x_HC_HW_MODE_CTRL, 0, 0), 154*1da9e1c0SRui Miguel Silva [SW_RESET_RESET_ALL] = REG_FIELD(ISP176x_HC_RESET, 0, 0), 155*1da9e1c0SRui Miguel Silva [INT_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 1, 1), 156*1da9e1c0SRui Miguel Silva [ATL_BUF_FILL] = REG_FIELD(ISP176x_HC_BUFFER_STATUS, 0, 0), 157*1da9e1c0SRui Miguel Silva [MEM_BANK_SEL] = REG_FIELD(ISP176x_HC_MEMORY, 16, 17), 158*1da9e1c0SRui Miguel Silva [MEM_START_ADDR] = REG_FIELD(ISP176x_HC_MEMORY, 0, 15), 159*1da9e1c0SRui Miguel Silva [HC_INT_ENABLE] = REG_FIELD(ISP176x_HC_INTERRUPT_ENABLE, 7, 8), 160*1da9e1c0SRui Miguel Silva }; 161*1da9e1c0SRui Miguel Silva 162*1da9e1c0SRui Miguel Silva static const struct regmap_range isp176x_dc_volatile_ranges[] = { 163*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP176x_DC_EPMAXPKTSZ, ISP176x_DC_EPTYPE), 164*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP176x_DC_BUFLEN, ISP176x_DC_EPINDEX), 165*1da9e1c0SRui Miguel Silva regmap_reg_range(ISP1761_DC_OTG_CTRL_SET, ISP1761_DC_OTG_CTRL_CLEAR), 166*1da9e1c0SRui Miguel Silva }; 167*1da9e1c0SRui Miguel Silva 168*1da9e1c0SRui Miguel Silva static const struct regmap_access_table isp176x_dc_volatile_table = { 169*1da9e1c0SRui Miguel Silva .yes_ranges = isp176x_dc_volatile_ranges, 170*1da9e1c0SRui Miguel Silva .n_yes_ranges = ARRAY_SIZE(isp176x_dc_volatile_ranges), 171*1da9e1c0SRui Miguel Silva }; 172*1da9e1c0SRui Miguel Silva 173*1da9e1c0SRui Miguel Silva static struct regmap_config isp1761_dc_regmap_conf = { 174*1da9e1c0SRui Miguel Silva .name = "isp1761-dc", 175*1da9e1c0SRui Miguel Silva .reg_bits = 16, 176*1da9e1c0SRui Miguel Silva .reg_stride = 4, 177*1da9e1c0SRui Miguel Silva .val_bits = 32, 178*1da9e1c0SRui Miguel Silva .fast_io = true, 179*1da9e1c0SRui Miguel Silva .max_register = ISP1761_DC_OTG_CTRL_CLEAR, 180*1da9e1c0SRui Miguel Silva .volatile_table = &isp176x_dc_volatile_table, 181*1da9e1c0SRui Miguel Silva }; 182*1da9e1c0SRui Miguel Silva 183*1da9e1c0SRui Miguel Silva static const struct reg_field isp1761_dc_reg_fields[] = { 184*1da9e1c0SRui Miguel Silva [DC_DEVEN] = REG_FIELD(ISP176x_DC_ADDRESS, 7, 7), 185*1da9e1c0SRui Miguel Silva [DC_DEVADDR] = REG_FIELD(ISP176x_DC_ADDRESS, 0, 6), 186*1da9e1c0SRui Miguel Silva [DC_VBUSSTAT] = REG_FIELD(ISP176x_DC_MODE, 8, 8), 187*1da9e1c0SRui Miguel Silva [DC_SFRESET] = REG_FIELD(ISP176x_DC_MODE, 4, 4), 188*1da9e1c0SRui Miguel Silva [DC_GLINTENA] = REG_FIELD(ISP176x_DC_MODE, 3, 3), 189*1da9e1c0SRui Miguel Silva [DC_CDBGMOD_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 6, 6), 190*1da9e1c0SRui Miguel Silva [DC_DDBGMODIN_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 4, 4), 191*1da9e1c0SRui Miguel Silva [DC_DDBGMODOUT_ACK] = REG_FIELD(ISP176x_DC_INTCONF, 2, 2), 192*1da9e1c0SRui Miguel Silva [DC_INTPOL] = REG_FIELD(ISP176x_DC_INTCONF, 0, 0), 193*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_7] = REG_FIELD(ISP176x_DC_INTENABLE, 25, 25), 194*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_6] = REG_FIELD(ISP176x_DC_INTENABLE, 23, 23), 195*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_5] = REG_FIELD(ISP176x_DC_INTENABLE, 21, 21), 196*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_4] = REG_FIELD(ISP176x_DC_INTENABLE, 19, 19), 197*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_3] = REG_FIELD(ISP176x_DC_INTENABLE, 17, 17), 198*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_2] = REG_FIELD(ISP176x_DC_INTENABLE, 15, 15), 199*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_1] = REG_FIELD(ISP176x_DC_INTENABLE, 13, 13), 200*1da9e1c0SRui Miguel Silva [DC_IEPRXTX_0] = REG_FIELD(ISP176x_DC_INTENABLE, 11, 11), 201*1da9e1c0SRui Miguel Silva [DC_IEP0SETUP] = REG_FIELD(ISP176x_DC_INTENABLE, 8, 8), 202*1da9e1c0SRui Miguel Silva [DC_IEVBUS] = REG_FIELD(ISP176x_DC_INTENABLE, 7, 7), 203*1da9e1c0SRui Miguel Silva [DC_IEHS_STA] = REG_FIELD(ISP176x_DC_INTENABLE, 5, 5), 204*1da9e1c0SRui Miguel Silva [DC_IERESM] = REG_FIELD(ISP176x_DC_INTENABLE, 4, 4), 205*1da9e1c0SRui Miguel Silva [DC_IESUSP] = REG_FIELD(ISP176x_DC_INTENABLE, 3, 3), 206*1da9e1c0SRui Miguel Silva [DC_IEBRST] = REG_FIELD(ISP176x_DC_INTENABLE, 0, 0), 207*1da9e1c0SRui Miguel Silva [DC_EP0SETUP] = REG_FIELD(ISP176x_DC_EPINDEX, 5, 5), 208*1da9e1c0SRui Miguel Silva [DC_ENDPIDX] = REG_FIELD(ISP176x_DC_EPINDEX, 1, 4), 209*1da9e1c0SRui Miguel Silva [DC_EPDIR] = REG_FIELD(ISP176x_DC_EPINDEX, 0, 0), 210*1da9e1c0SRui Miguel Silva [DC_CLBUF] = REG_FIELD(ISP176x_DC_CTRLFUNC, 4, 4), 211*1da9e1c0SRui Miguel Silva [DC_VENDP] = REG_FIELD(ISP176x_DC_CTRLFUNC, 3, 3), 212*1da9e1c0SRui Miguel Silva [DC_DSEN] = REG_FIELD(ISP176x_DC_CTRLFUNC, 2, 2), 213*1da9e1c0SRui Miguel Silva [DC_STATUS] = REG_FIELD(ISP176x_DC_CTRLFUNC, 1, 1), 214*1da9e1c0SRui Miguel Silva [DC_STALL] = REG_FIELD(ISP176x_DC_CTRLFUNC, 0, 0), 215*1da9e1c0SRui Miguel Silva [DC_BUFLEN] = REG_FIELD(ISP176x_DC_BUFLEN, 0, 15), 216*1da9e1c0SRui Miguel Silva [DC_FFOSZ] = REG_FIELD(ISP176x_DC_EPMAXPKTSZ, 0, 10), 217*1da9e1c0SRui Miguel Silva [DC_EPENABLE] = REG_FIELD(ISP176x_DC_EPTYPE, 3, 3), 218*1da9e1c0SRui Miguel Silva [DC_ENDPTYP] = REG_FIELD(ISP176x_DC_EPTYPE, 0, 1), 219*1da9e1c0SRui Miguel Silva [DC_UFRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 11, 13), 220*1da9e1c0SRui Miguel Silva [DC_FRAMENUM] = REG_FIELD(ISP176x_DC_FRAMENUM, 0, 10), 221*1da9e1c0SRui Miguel Silva [HW_OTG_DISABLE] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 10, 10), 222*1da9e1c0SRui Miguel Silva [HW_SW_SEL_HC_DC] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 7, 7), 223*1da9e1c0SRui Miguel Silva [HW_VBUS_DRV] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 4, 4), 224*1da9e1c0SRui Miguel Silva [HW_SEL_CP_EXT] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 3, 3), 225*1da9e1c0SRui Miguel Silva [HW_DM_PULLDOWN] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 2, 2), 226*1da9e1c0SRui Miguel Silva [HW_DP_PULLDOWN] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 1, 1), 227*1da9e1c0SRui Miguel Silva [HW_DP_PULLUP] = REG_FIELD(ISP1761_DC_OTG_CTRL_SET, 0, 0), 228*1da9e1c0SRui Miguel Silva [HW_OTG_DISABLE_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 10, 10), 229*1da9e1c0SRui Miguel Silva [HW_SW_SEL_HC_DC_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 7, 7), 230*1da9e1c0SRui Miguel Silva [HW_VBUS_DRV_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 4, 4), 231*1da9e1c0SRui Miguel Silva [HW_SEL_CP_EXT_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 3, 3), 232*1da9e1c0SRui Miguel Silva [HW_DM_PULLDOWN_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 2, 2), 233*1da9e1c0SRui Miguel Silva [HW_DP_PULLDOWN_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 1, 1), 234*1da9e1c0SRui Miguel Silva [HW_DP_PULLUP_CLEAR] = REG_FIELD(ISP1761_DC_OTG_CTRL_CLEAR, 0, 0), 235*1da9e1c0SRui Miguel Silva }; 236*1da9e1c0SRui Miguel Silva 2377ef077a8SLaurent Pinchart int isp1760_register(struct resource *mem, int irq, unsigned long irqflags, 2387ef077a8SLaurent Pinchart struct device *dev, unsigned int devflags) 2397ef077a8SLaurent Pinchart { 2407ef077a8SLaurent Pinchart struct isp1760_device *isp; 241*1da9e1c0SRui Miguel Silva struct isp1760_hcd *hcd; 242*1da9e1c0SRui Miguel Silva struct isp1760_udc *udc; 243d21daf1eSLaurent Pinchart bool udc_disabled = !(devflags & ISP1760_FLAG_ISP1761); 244*1da9e1c0SRui Miguel Silva struct regmap_field *f; 245*1da9e1c0SRui Miguel Silva void __iomem *base; 2467ef077a8SLaurent Pinchart int ret; 247*1da9e1c0SRui Miguel Silva int i; 2487ef077a8SLaurent Pinchart 249d21daf1eSLaurent Pinchart /* 250d21daf1eSLaurent Pinchart * If neither the HCD not the UDC is enabled return an error, as no 251d21daf1eSLaurent Pinchart * device would be registered. 252d21daf1eSLaurent Pinchart */ 253d21daf1eSLaurent Pinchart if ((!IS_ENABLED(CONFIG_USB_ISP1760_HCD) || usb_disabled()) && 254d21daf1eSLaurent Pinchart (!IS_ENABLED(CONFIG_USB_ISP1761_UDC) || udc_disabled)) 2557ef077a8SLaurent Pinchart return -ENODEV; 2567ef077a8SLaurent Pinchart 2577ef077a8SLaurent Pinchart isp = devm_kzalloc(dev, sizeof(*isp), GFP_KERNEL); 2587ef077a8SLaurent Pinchart if (!isp) 2597ef077a8SLaurent Pinchart return -ENOMEM; 2607ef077a8SLaurent Pinchart 2617ef077a8SLaurent Pinchart isp->dev = dev; 2627ef077a8SLaurent Pinchart isp->devflags = devflags; 263*1da9e1c0SRui Miguel Silva hcd = &isp->hcd; 264*1da9e1c0SRui Miguel Silva udc = &isp->udc; 265*1da9e1c0SRui Miguel Silva 266*1da9e1c0SRui Miguel Silva if (devflags & ISP1760_FLAG_BUS_WIDTH_16) { 267*1da9e1c0SRui Miguel Silva isp1760_hc_regmap_conf.val_bits = 16; 268*1da9e1c0SRui Miguel Silva isp1761_dc_regmap_conf.val_bits = 16; 269*1da9e1c0SRui Miguel Silva } 2707ef077a8SLaurent Pinchart 2717ef077a8SLaurent Pinchart isp->rst_gpio = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); 2727ef077a8SLaurent Pinchart if (IS_ERR(isp->rst_gpio)) 2737ef077a8SLaurent Pinchart return PTR_ERR(isp->rst_gpio); 2747ef077a8SLaurent Pinchart 275*1da9e1c0SRui Miguel Silva hcd->base = devm_ioremap_resource(dev, mem); 276*1da9e1c0SRui Miguel Silva if (IS_ERR(hcd->base)) 277*1da9e1c0SRui Miguel Silva return PTR_ERR(hcd->base); 278*1da9e1c0SRui Miguel Silva 279*1da9e1c0SRui Miguel Silva hcd->regs = devm_regmap_init_mmio(dev, base, &isp1760_hc_regmap_conf); 280*1da9e1c0SRui Miguel Silva if (IS_ERR(hcd->regs)) 281*1da9e1c0SRui Miguel Silva return PTR_ERR(hcd->regs); 282*1da9e1c0SRui Miguel Silva 283*1da9e1c0SRui Miguel Silva for (i = 0; i < HC_FIELD_MAX; i++) { 284*1da9e1c0SRui Miguel Silva f = devm_regmap_field_alloc(dev, hcd->regs, 285*1da9e1c0SRui Miguel Silva isp1760_hc_reg_fields[i]); 286*1da9e1c0SRui Miguel Silva if (IS_ERR(f)) 287*1da9e1c0SRui Miguel Silva return PTR_ERR(f); 288*1da9e1c0SRui Miguel Silva 289*1da9e1c0SRui Miguel Silva hcd->fields[i] = f; 290*1da9e1c0SRui Miguel Silva } 291*1da9e1c0SRui Miguel Silva 292*1da9e1c0SRui Miguel Silva udc->regs = devm_regmap_init_mmio(dev, base, &isp1761_dc_regmap_conf); 293*1da9e1c0SRui Miguel Silva if (IS_ERR(udc->regs)) 294*1da9e1c0SRui Miguel Silva return PTR_ERR(udc->regs); 295*1da9e1c0SRui Miguel Silva 296*1da9e1c0SRui Miguel Silva for (i = 0; i < DC_FIELD_MAX; i++) { 297*1da9e1c0SRui Miguel Silva f = devm_regmap_field_alloc(dev, udc->regs, 298*1da9e1c0SRui Miguel Silva isp1761_dc_reg_fields[i]); 299*1da9e1c0SRui Miguel Silva if (IS_ERR(f)) 300*1da9e1c0SRui Miguel Silva return PTR_ERR(f); 301*1da9e1c0SRui Miguel Silva 302*1da9e1c0SRui Miguel Silva udc->fields[i] = f; 303*1da9e1c0SRui Miguel Silva } 3047ef077a8SLaurent Pinchart 3057ef077a8SLaurent Pinchart isp1760_init_core(isp); 3067ef077a8SLaurent Pinchart 307d21daf1eSLaurent Pinchart if (IS_ENABLED(CONFIG_USB_ISP1760_HCD) && !usb_disabled()) { 308*1da9e1c0SRui Miguel Silva ret = isp1760_hcd_register(hcd, mem, irq, 3097ef077a8SLaurent Pinchart irqflags | IRQF_SHARED, dev); 3107ef077a8SLaurent Pinchart if (ret < 0) 3117ef077a8SLaurent Pinchart return ret; 312d21daf1eSLaurent Pinchart } 3137ef077a8SLaurent Pinchart 314d21daf1eSLaurent Pinchart if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && !udc_disabled) { 31580b4a0f8SValentin Rothberg ret = isp1760_udc_register(isp, irq, irqflags); 3167ef077a8SLaurent Pinchart if (ret < 0) { 317*1da9e1c0SRui Miguel Silva isp1760_hcd_unregister(hcd); 3187ef077a8SLaurent Pinchart return ret; 3197ef077a8SLaurent Pinchart } 3207ef077a8SLaurent Pinchart } 3217ef077a8SLaurent Pinchart 3227ef077a8SLaurent Pinchart dev_set_drvdata(dev, isp); 3237ef077a8SLaurent Pinchart 3247ef077a8SLaurent Pinchart return 0; 3257ef077a8SLaurent Pinchart } 3267ef077a8SLaurent Pinchart 3277ef077a8SLaurent Pinchart void isp1760_unregister(struct device *dev) 3287ef077a8SLaurent Pinchart { 3297ef077a8SLaurent Pinchart struct isp1760_device *isp = dev_get_drvdata(dev); 3307ef077a8SLaurent Pinchart 3317ef077a8SLaurent Pinchart isp1760_udc_unregister(isp); 3327ef077a8SLaurent Pinchart isp1760_hcd_unregister(&isp->hcd); 3337ef077a8SLaurent Pinchart } 3347ef077a8SLaurent Pinchart 3357ef077a8SLaurent Pinchart MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP"); 3367ef077a8SLaurent Pinchart MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>"); 3377ef077a8SLaurent Pinchart MODULE_LICENSE("GPL v2"); 338