xref: /linux/drivers/usb/host/xhci-rcar.c (revision af50e4ba34f4c45e92535364133d4deb5931c1c5)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * xHCI host controller driver for R-Car SoCs
4  *
5  * Copyright (C) 2014 Renesas Electronics Corporation
6  */
7 
8 #include <linux/firmware.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/of.h>
12 #include <linux/usb/phy.h>
13 #include <linux/sys_soc.h>
14 
15 #include "xhci.h"
16 #include "xhci-plat.h"
17 #include "xhci-rcar.h"
18 
19 /*
20 * - The V3 firmware is for r8a7796 (with good performance) and r8a7795 es2.0
21 *   or later.
22 * - The V2 firmware can be used on both r8a7795 (es1.x) and r8a7796.
23 * - The V2 firmware is possible to use on R-Car Gen2. However, the V2 causes
24 *   performance degradation. So, this driver continues to use the V1 if R-Car
25 *   Gen2.
26 * - The V1 firmware is impossible to use on R-Car Gen3.
27 */
28 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V1);
29 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V2);
30 MODULE_FIRMWARE(XHCI_RCAR_FIRMWARE_NAME_V3);
31 
32 /*** Register Offset ***/
33 #define RCAR_USB3_INT_ENA	0x224	/* Interrupt Enable */
34 #define RCAR_USB3_DL_CTRL	0x250	/* FW Download Control & Status */
35 #define RCAR_USB3_FW_DATA0	0x258	/* FW Data0 */
36 
37 #define RCAR_USB3_LCLK		0xa44	/* LCLK Select */
38 #define RCAR_USB3_CONF1		0xa48	/* USB3.0 Configuration1 */
39 #define RCAR_USB3_CONF2		0xa5c	/* USB3.0 Configuration2 */
40 #define RCAR_USB3_CONF3		0xaa8	/* USB3.0 Configuration3 */
41 #define RCAR_USB3_RX_POL	0xab0	/* USB3.0 RX Polarity */
42 #define RCAR_USB3_TX_POL	0xab8	/* USB3.0 TX Polarity */
43 
44 /*** Register Settings ***/
45 /* Interrupt Enable */
46 #define RCAR_USB3_INT_XHC_ENA	0x00000001
47 #define RCAR_USB3_INT_PME_ENA	0x00000002
48 #define RCAR_USB3_INT_HSE_ENA	0x00000004
49 #define RCAR_USB3_INT_ENA_VAL	(RCAR_USB3_INT_XHC_ENA | \
50 				RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA)
51 
52 /* FW Download Control & Status */
53 #define RCAR_USB3_DL_CTRL_ENABLE	0x00000001
54 #define RCAR_USB3_DL_CTRL_FW_SUCCESS	0x00000010
55 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0	0x00000100
56 
57 /* LCLK Select */
58 #define RCAR_USB3_LCLK_ENA_VAL	0x01030001
59 
60 /* USB3.0 Configuration */
61 #define RCAR_USB3_CONF1_VAL	0x00030204
62 #define RCAR_USB3_CONF2_VAL	0x00030300
63 #define RCAR_USB3_CONF3_VAL	0x13802007
64 
65 /* USB3.0 Polarity */
66 #define RCAR_USB3_RX_POL_VAL	BIT(21)
67 #define RCAR_USB3_TX_POL_VAL	BIT(4)
68 
69 /* For soc_device_attribute */
70 #define RCAR_XHCI_FIRMWARE_V2   BIT(0) /* FIRMWARE V2 */
71 #define RCAR_XHCI_FIRMWARE_V3   BIT(1) /* FIRMWARE V3 */
72 
73 static const struct soc_device_attribute rcar_quirks_match[]  = {
74 	{
75 		.soc_id = "r8a7795", .revision = "ES1.*",
76 		.data = (void *)RCAR_XHCI_FIRMWARE_V2,
77 	},
78 	{
79 		.soc_id = "r8a7795",
80 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
81 	},
82 	{
83 		.soc_id = "r8a7796",
84 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
85 	},
86 	{
87 		.soc_id = "r8a77965",
88 		.data = (void *)RCAR_XHCI_FIRMWARE_V3,
89 	},
90 	{ /* sentinel */ },
91 };
92 
93 static void xhci_rcar_start_gen2(struct usb_hcd *hcd)
94 {
95 	/* LCLK Select */
96 	writel(RCAR_USB3_LCLK_ENA_VAL, hcd->regs + RCAR_USB3_LCLK);
97 	/* USB3.0 Configuration */
98 	writel(RCAR_USB3_CONF1_VAL, hcd->regs + RCAR_USB3_CONF1);
99 	writel(RCAR_USB3_CONF2_VAL, hcd->regs + RCAR_USB3_CONF2);
100 	writel(RCAR_USB3_CONF3_VAL, hcd->regs + RCAR_USB3_CONF3);
101 	/* USB3.0 Polarity */
102 	writel(RCAR_USB3_RX_POL_VAL, hcd->regs + RCAR_USB3_RX_POL);
103 	writel(RCAR_USB3_TX_POL_VAL, hcd->regs + RCAR_USB3_TX_POL);
104 }
105 
106 static int xhci_rcar_is_gen2(struct device *dev)
107 {
108 	struct device_node *node = dev->of_node;
109 
110 	return of_device_is_compatible(node, "renesas,xhci-r8a7790") ||
111 		of_device_is_compatible(node, "renesas,xhci-r8a7791") ||
112 		of_device_is_compatible(node, "renesas,xhci-r8a7793") ||
113 		of_device_is_compatible(node, "renensas,rcar-gen2-xhci");
114 }
115 
116 static int xhci_rcar_is_gen3(struct device *dev)
117 {
118 	struct device_node *node = dev->of_node;
119 
120 	return of_device_is_compatible(node, "renesas,xhci-r8a7795") ||
121 		of_device_is_compatible(node, "renesas,xhci-r8a7796") ||
122 		of_device_is_compatible(node, "renesas,rcar-gen3-xhci");
123 }
124 
125 void xhci_rcar_start(struct usb_hcd *hcd)
126 {
127 	u32 temp;
128 
129 	if (hcd->regs != NULL) {
130 		/* Interrupt Enable */
131 		temp = readl(hcd->regs + RCAR_USB3_INT_ENA);
132 		temp |= RCAR_USB3_INT_ENA_VAL;
133 		writel(temp, hcd->regs + RCAR_USB3_INT_ENA);
134 		if (xhci_rcar_is_gen2(hcd->self.controller))
135 			xhci_rcar_start_gen2(hcd);
136 	}
137 }
138 
139 static int xhci_rcar_download_firmware(struct usb_hcd *hcd)
140 {
141 	struct device *dev = hcd->self.controller;
142 	void __iomem *regs = hcd->regs;
143 	struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd);
144 	const struct firmware *fw;
145 	int retval, index, j, time;
146 	int timeout = 10000;
147 	u32 data, val, temp;
148 	u32 quirks = 0;
149 	const struct soc_device_attribute *attr;
150 	const char *firmware_name;
151 
152 	attr = soc_device_match(rcar_quirks_match);
153 	if (attr)
154 		quirks = (uintptr_t)attr->data;
155 
156 	if (quirks & RCAR_XHCI_FIRMWARE_V2)
157 		firmware_name = XHCI_RCAR_FIRMWARE_NAME_V2;
158 	else if (quirks & RCAR_XHCI_FIRMWARE_V3)
159 		firmware_name = XHCI_RCAR_FIRMWARE_NAME_V3;
160 	else
161 		firmware_name = priv->firmware_name;
162 
163 	/* request R-Car USB3.0 firmware */
164 	retval = request_firmware(&fw, firmware_name, dev);
165 	if (retval)
166 		return retval;
167 
168 	/* download R-Car USB3.0 firmware */
169 	temp = readl(regs + RCAR_USB3_DL_CTRL);
170 	temp |= RCAR_USB3_DL_CTRL_ENABLE;
171 	writel(temp, regs + RCAR_USB3_DL_CTRL);
172 
173 	for (index = 0; index < fw->size; index += 4) {
174 		/* to avoid reading beyond the end of the buffer */
175 		for (data = 0, j = 3; j >= 0; j--) {
176 			if ((j + index) < fw->size)
177 				data |= fw->data[index + j] << (8 * j);
178 		}
179 		writel(data, regs + RCAR_USB3_FW_DATA0);
180 		temp = readl(regs + RCAR_USB3_DL_CTRL);
181 		temp |= RCAR_USB3_DL_CTRL_FW_SET_DATA0;
182 		writel(temp, regs + RCAR_USB3_DL_CTRL);
183 
184 		for (time = 0; time < timeout; time++) {
185 			val = readl(regs + RCAR_USB3_DL_CTRL);
186 			if ((val & RCAR_USB3_DL_CTRL_FW_SET_DATA0) == 0)
187 				break;
188 			udelay(1);
189 		}
190 		if (time == timeout) {
191 			retval = -ETIMEDOUT;
192 			break;
193 		}
194 	}
195 
196 	temp = readl(regs + RCAR_USB3_DL_CTRL);
197 	temp &= ~RCAR_USB3_DL_CTRL_ENABLE;
198 	writel(temp, regs + RCAR_USB3_DL_CTRL);
199 
200 	for (time = 0; time < timeout; time++) {
201 		val = readl(regs + RCAR_USB3_DL_CTRL);
202 		if (val & RCAR_USB3_DL_CTRL_FW_SUCCESS) {
203 			retval = 0;
204 			break;
205 		}
206 		udelay(1);
207 	}
208 	if (time == timeout)
209 		retval = -ETIMEDOUT;
210 
211 	release_firmware(fw);
212 
213 	return retval;
214 }
215 
216 /* This function needs to initialize a "phy" of usb before */
217 int xhci_rcar_init_quirk(struct usb_hcd *hcd)
218 {
219 	struct xhci_hcd *xhci = hcd_to_xhci(hcd);
220 
221 	/* If hcd->regs is NULL, we don't just call the following function */
222 	if (!hcd->regs)
223 		return 0;
224 
225 	/*
226 	 * On R-Car Gen2 and Gen3, the AC64 bit (bit 0) of HCCPARAMS1 is set
227 	 * to 1. However, these SoCs don't support 64-bit address memory
228 	 * pointers. So, this driver clears the AC64 bit of xhci->hcc_params
229 	 * to call dma_set_coherent_mask(dev, DMA_BIT_MASK(32)) in
230 	 * xhci_gen_setup().
231 	 */
232 	if (xhci_rcar_is_gen2(hcd->self.controller) ||
233 			xhci_rcar_is_gen3(hcd->self.controller))
234 		xhci->quirks |= XHCI_NO_64BIT_SUPPORT;
235 
236 	return xhci_rcar_download_firmware(hcd);
237 }
238 
239 int xhci_rcar_resume_quirk(struct usb_hcd *hcd)
240 {
241 	int ret;
242 
243 	ret = xhci_rcar_download_firmware(hcd);
244 	if (!ret)
245 		xhci_rcar_start(hcd);
246 
247 	return ret;
248 }
249