1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #ifndef __XHCI_RCAR_H 3 #define __XHCI_RCAR_H 4 5 /*** Register Offset ***/ 6 #define RCAR_USB3_AXH_STA 0x104 /* AXI Host Control Status */ 7 #define RCAR_USB3_INT_ENA 0x224 /* Interrupt Enable */ 8 #define RCAR_USB3_DL_CTRL 0x250 /* FW Download Control & Status */ 9 #define RCAR_USB3_FW_DATA0 0x258 /* FW Data0 */ 10 11 #define RCAR_USB3_LCLK 0xa44 /* LCLK Select */ 12 #define RCAR_USB3_CONF1 0xa48 /* USB3.0 Configuration1 */ 13 #define RCAR_USB3_CONF2 0xa5c /* USB3.0 Configuration2 */ 14 #define RCAR_USB3_CONF3 0xaa8 /* USB3.0 Configuration3 */ 15 #define RCAR_USB3_RX_POL 0xab0 /* USB3.0 RX Polarity */ 16 #define RCAR_USB3_TX_POL 0xab8 /* USB3.0 TX Polarity */ 17 18 /*** Register Settings ***/ 19 /* AXI Host Control Status */ 20 #define RCAR_USB3_AXH_STA_B3_PLL_ACTIVE 0x00010000 21 #define RCAR_USB3_AXH_STA_B2_PLL_ACTIVE 0x00000001 22 #define RCAR_USB3_AXH_STA_PLL_ACTIVE_MASK (RCAR_USB3_AXH_STA_B3_PLL_ACTIVE | \ 23 RCAR_USB3_AXH_STA_B2_PLL_ACTIVE) 24 25 /* Interrupt Enable */ 26 #define RCAR_USB3_INT_XHC_ENA 0x00000001 27 #define RCAR_USB3_INT_PME_ENA 0x00000002 28 #define RCAR_USB3_INT_HSE_ENA 0x00000004 29 #define RCAR_USB3_INT_ENA_VAL (RCAR_USB3_INT_XHC_ENA | \ 30 RCAR_USB3_INT_PME_ENA | RCAR_USB3_INT_HSE_ENA) 31 32 /* FW Download Control & Status */ 33 #define RCAR_USB3_DL_CTRL_ENABLE 0x00000001 34 #define RCAR_USB3_DL_CTRL_FW_SUCCESS 0x00000010 35 #define RCAR_USB3_DL_CTRL_FW_SET_DATA0 0x00000100 36 37 /* LCLK Select */ 38 #define RCAR_USB3_LCLK_ENA_VAL 0x01030001 39 40 /* USB3.0 Configuration */ 41 #define RCAR_USB3_CONF1_VAL 0x00030204 42 #define RCAR_USB3_CONF2_VAL 0x00030300 43 #define RCAR_USB3_CONF3_VAL 0x13802007 44 45 /* USB3.0 Polarity */ 46 #define RCAR_USB3_RX_POL_VAL BIT(21) 47 #define RCAR_USB3_TX_POL_VAL BIT(4) 48 49 #endif /* __XHCI_RCAR_H */ 50