1 /* 2 * xHCI host controller driver PCI Bus Glue. 3 * 4 * Copyright (C) 2008 Intel Corp. 5 * 6 * Author: Sarah Sharp 7 * Some code borrowed from the Linux EHCI driver. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 * for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software Foundation, 20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/slab.h> 25 #include <linux/module.h> 26 27 #include "xhci.h" 28 #include "xhci-trace.h" 29 30 /* Device for a quirk */ 31 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400 34 35 #define PCI_VENDOR_ID_ETRON 0x1b6f 36 #define PCI_DEVICE_ID_EJ168 0x7023 37 38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31 39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 40 41 static const char hcd_name[] = "xhci_hcd"; 42 43 static struct hc_driver __read_mostly xhci_pci_hc_driver; 44 45 /* called after powerup, by probe or system-pm "wakeup" */ 46 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) 47 { 48 /* 49 * TODO: Implement finding debug ports later. 50 * TODO: see if there are any quirks that need to be added to handle 51 * new extended capabilities. 52 */ 53 54 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ 55 if (!pci_set_mwi(pdev)) 56 xhci_dbg(xhci, "MWI active\n"); 57 58 xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); 59 return 0; 60 } 61 62 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) 63 { 64 struct pci_dev *pdev = to_pci_dev(dev); 65 66 /* Look for vendor-specific quirks */ 67 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 68 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK || 69 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) { 70 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 71 pdev->revision == 0x0) { 72 xhci->quirks |= XHCI_RESET_EP_QUIRK; 73 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 74 "QUIRK: Fresco Logic xHC needs configure" 75 " endpoint cmd after reset endpoint"); 76 } 77 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 78 pdev->revision == 0x4) { 79 xhci->quirks |= XHCI_SLOW_SUSPEND; 80 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 81 "QUIRK: Fresco Logic xHC revision %u" 82 "must be suspended extra slowly", 83 pdev->revision); 84 } 85 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) 86 xhci->quirks |= XHCI_BROKEN_STREAMS; 87 /* Fresco Logic confirms: all revisions of this chip do not 88 * support MSI, even though some of them claim to in their PCI 89 * capabilities. 90 */ 91 xhci->quirks |= XHCI_BROKEN_MSI; 92 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 93 "QUIRK: Fresco Logic revision %u " 94 "has broken MSI implementation", 95 pdev->revision); 96 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 97 } 98 99 if (pdev->vendor == PCI_VENDOR_ID_NEC) 100 xhci->quirks |= XHCI_NEC_HOST; 101 102 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96) 103 xhci->quirks |= XHCI_AMD_0x96_HOST; 104 105 /* AMD PLL quirk */ 106 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) 107 xhci->quirks |= XHCI_AMD_PLL_FIX; 108 109 if (pdev->vendor == PCI_VENDOR_ID_AMD) 110 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 111 112 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 113 xhci->quirks |= XHCI_LPM_SUPPORT; 114 xhci->quirks |= XHCI_INTEL_HOST; 115 } 116 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 117 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) { 118 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; 119 xhci->limit_active_eps = 64; 120 xhci->quirks |= XHCI_SW_BW_CHECKING; 121 /* 122 * PPT desktop boards DH77EB and DH77DF will power back on after 123 * a few seconds of being shutdown. The fix for this is to 124 * switch the ports from xHCI to EHCI on shutdown. We can't use 125 * DMI information to find those particular boards (since each 126 * vendor will change the board name), so we have to key off all 127 * PPT chipsets. 128 */ 129 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 130 xhci->quirks |= XHCI_AVOID_BEI; 131 } 132 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 133 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) { 134 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 135 } 136 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 137 pdev->device == PCI_DEVICE_ID_EJ168) { 138 xhci->quirks |= XHCI_RESET_ON_RESUME; 139 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 140 xhci->quirks |= XHCI_BROKEN_STREAMS; 141 } 142 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 143 pdev->device == 0x0015) 144 xhci->quirks |= XHCI_RESET_ON_RESUME; 145 if (pdev->vendor == PCI_VENDOR_ID_VIA) 146 xhci->quirks |= XHCI_RESET_ON_RESUME; 147 148 /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */ 149 if (pdev->vendor == PCI_VENDOR_ID_VIA && 150 pdev->device == 0x3432) 151 xhci->quirks |= XHCI_BROKEN_STREAMS; 152 153 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && 154 pdev->device == 0x1042) 155 xhci->quirks |= XHCI_BROKEN_STREAMS; 156 157 if (xhci->quirks & XHCI_RESET_ON_RESUME) 158 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 159 "QUIRK: Resetting on resume"); 160 } 161 162 /* called during probe() after chip reset completes */ 163 static int xhci_pci_setup(struct usb_hcd *hcd) 164 { 165 struct xhci_hcd *xhci; 166 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 167 int retval; 168 169 retval = xhci_gen_setup(hcd, xhci_pci_quirks); 170 if (retval) 171 return retval; 172 173 xhci = hcd_to_xhci(hcd); 174 if (!usb_hcd_is_primary_hcd(hcd)) 175 return 0; 176 177 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn); 178 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); 179 180 /* Find any debug ports */ 181 retval = xhci_pci_reinit(xhci, pdev); 182 if (!retval) 183 return retval; 184 185 kfree(xhci); 186 return retval; 187 } 188 189 /* 190 * We need to register our own PCI probe function (instead of the USB core's 191 * function) in order to create a second roothub under xHCI. 192 */ 193 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 194 { 195 int retval; 196 struct xhci_hcd *xhci; 197 struct hc_driver *driver; 198 struct usb_hcd *hcd; 199 200 driver = (struct hc_driver *)id->driver_data; 201 202 /* Prevent runtime suspending between USB-2 and USB-3 initialization */ 203 pm_runtime_get_noresume(&dev->dev); 204 205 /* Register the USB 2.0 roothub. 206 * FIXME: USB core must know to register the USB 2.0 roothub first. 207 * This is sort of silly, because we could just set the HCD driver flags 208 * to say USB 2.0, but I'm not sure what the implications would be in 209 * the other parts of the HCD code. 210 */ 211 retval = usb_hcd_pci_probe(dev, id); 212 213 if (retval) 214 goto put_runtime_pm; 215 216 /* USB 2.0 roothub is stored in the PCI device now. */ 217 hcd = dev_get_drvdata(&dev->dev); 218 xhci = hcd_to_xhci(hcd); 219 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev, 220 pci_name(dev), hcd); 221 if (!xhci->shared_hcd) { 222 retval = -ENOMEM; 223 goto dealloc_usb2_hcd; 224 } 225 226 /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset) 227 * is called by usb_add_hcd(). 228 */ 229 *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci; 230 231 retval = usb_add_hcd(xhci->shared_hcd, dev->irq, 232 IRQF_SHARED); 233 if (retval) 234 goto put_usb3_hcd; 235 /* Roothub already marked as USB 3.0 speed */ 236 237 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) && 238 HCC_MAX_PSA(xhci->hcc_params) >= 4) 239 xhci->shared_hcd->can_do_streams = 1; 240 241 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */ 242 pm_runtime_put_noidle(&dev->dev); 243 244 return 0; 245 246 put_usb3_hcd: 247 usb_put_hcd(xhci->shared_hcd); 248 dealloc_usb2_hcd: 249 usb_hcd_pci_remove(dev); 250 put_runtime_pm: 251 pm_runtime_put_noidle(&dev->dev); 252 return retval; 253 } 254 255 static void xhci_pci_remove(struct pci_dev *dev) 256 { 257 struct xhci_hcd *xhci; 258 259 xhci = hcd_to_xhci(pci_get_drvdata(dev)); 260 if (xhci->shared_hcd) { 261 usb_remove_hcd(xhci->shared_hcd); 262 usb_put_hcd(xhci->shared_hcd); 263 } 264 usb_hcd_pci_remove(dev); 265 266 /* Workaround for spurious wakeups at shutdown with HSW */ 267 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 268 pci_set_power_state(dev, PCI_D3hot); 269 270 kfree(xhci); 271 } 272 273 #ifdef CONFIG_PM 274 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) 275 { 276 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 277 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 278 279 /* 280 * Systems with the TI redriver that loses port status change events 281 * need to have the registers polled during D3, so avoid D3cold. 282 */ 283 if (xhci->quirks & XHCI_COMP_MODE_QUIRK) 284 pdev->no_d3cold = true; 285 286 return xhci_suspend(xhci, do_wakeup); 287 } 288 289 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) 290 { 291 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 292 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 293 int retval = 0; 294 295 /* The BIOS on systems with the Intel Panther Point chipset may or may 296 * not support xHCI natively. That means that during system resume, it 297 * may switch the ports back to EHCI so that users can use their 298 * keyboard to select a kernel from GRUB after resume from hibernate. 299 * 300 * The BIOS is supposed to remember whether the OS had xHCI ports 301 * enabled before resume, and switch the ports back to xHCI when the 302 * BIOS/OS semaphore is written, but we all know we can't trust BIOS 303 * writers. 304 * 305 * Unconditionally switch the ports back to xHCI after a system resume. 306 * It should not matter whether the EHCI or xHCI controller is 307 * resumed first. It's enough to do the switchover in xHCI because 308 * USB core won't notice anything as the hub driver doesn't start 309 * running again until after all the devices (including both EHCI and 310 * xHCI host controllers) have been resumed. 311 */ 312 313 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 314 usb_enable_intel_xhci_ports(pdev); 315 316 retval = xhci_resume(xhci, hibernated); 317 return retval; 318 } 319 #endif /* CONFIG_PM */ 320 321 /*-------------------------------------------------------------------------*/ 322 323 /* PCI driver selection metadata; PCI hotplugging uses this */ 324 static const struct pci_device_id pci_ids[] = { { 325 /* handle any USB 3.0 xHCI controller */ 326 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0), 327 .driver_data = (unsigned long) &xhci_pci_hc_driver, 328 }, 329 { /* end: all zeroes */ } 330 }; 331 MODULE_DEVICE_TABLE(pci, pci_ids); 332 333 /* pci driver glue; this is a "new style" PCI driver module */ 334 static struct pci_driver xhci_pci_driver = { 335 .name = (char *) hcd_name, 336 .id_table = pci_ids, 337 338 .probe = xhci_pci_probe, 339 .remove = xhci_pci_remove, 340 /* suspend and resume implemented later */ 341 342 .shutdown = usb_hcd_pci_shutdown, 343 #ifdef CONFIG_PM 344 .driver = { 345 .pm = &usb_hcd_pci_pm_ops 346 }, 347 #endif 348 }; 349 350 static int __init xhci_pci_init(void) 351 { 352 xhci_init_driver(&xhci_pci_hc_driver, xhci_pci_setup); 353 #ifdef CONFIG_PM 354 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend; 355 xhci_pci_hc_driver.pci_resume = xhci_pci_resume; 356 #endif 357 return pci_register_driver(&xhci_pci_driver); 358 } 359 module_init(xhci_pci_init); 360 361 static void __exit xhci_pci_exit(void) 362 { 363 pci_unregister_driver(&xhci_pci_driver); 364 } 365 module_exit(xhci_pci_exit); 366 367 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver"); 368 MODULE_LICENSE("GPL"); 369