1 /* 2 * xHCI host controller driver PCI Bus Glue. 3 * 4 * Copyright (C) 2008 Intel Corp. 5 * 6 * Author: Sarah Sharp 7 * Some code borrowed from the Linux EHCI driver. 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 * for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software Foundation, 20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23 #include <linux/pci.h> 24 #include <linux/slab.h> 25 #include <linux/module.h> 26 27 #include "xhci.h" 28 #include "xhci-trace.h" 29 30 /* Device for a quirk */ 31 #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400 0x1400 34 35 #define PCI_VENDOR_ID_ETRON 0x1b6f 36 #define PCI_DEVICE_ID_EJ168 0x7023 37 38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31 39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 40 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5 41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f 42 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f 43 44 static const char hcd_name[] = "xhci_hcd"; 45 46 static struct hc_driver __read_mostly xhci_pci_hc_driver; 47 48 static int xhci_pci_setup(struct usb_hcd *hcd); 49 50 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = { 51 .extra_priv_size = sizeof(struct xhci_hcd), 52 .reset = xhci_pci_setup, 53 }; 54 55 /* called after powerup, by probe or system-pm "wakeup" */ 56 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) 57 { 58 /* 59 * TODO: Implement finding debug ports later. 60 * TODO: see if there are any quirks that need to be added to handle 61 * new extended capabilities. 62 */ 63 64 /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */ 65 if (!pci_set_mwi(pdev)) 66 xhci_dbg(xhci, "MWI active\n"); 67 68 xhci_dbg(xhci, "Finished xhci_pci_reinit\n"); 69 return 0; 70 } 71 72 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) 73 { 74 struct pci_dev *pdev = to_pci_dev(dev); 75 76 /* Look for vendor-specific quirks */ 77 if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && 78 (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK || 79 pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) { 80 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 81 pdev->revision == 0x0) { 82 xhci->quirks |= XHCI_RESET_EP_QUIRK; 83 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 84 "QUIRK: Fresco Logic xHC needs configure" 85 " endpoint cmd after reset endpoint"); 86 } 87 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && 88 pdev->revision == 0x4) { 89 xhci->quirks |= XHCI_SLOW_SUSPEND; 90 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 91 "QUIRK: Fresco Logic xHC revision %u" 92 "must be suspended extra slowly", 93 pdev->revision); 94 } 95 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) 96 xhci->quirks |= XHCI_BROKEN_STREAMS; 97 /* Fresco Logic confirms: all revisions of this chip do not 98 * support MSI, even though some of them claim to in their PCI 99 * capabilities. 100 */ 101 xhci->quirks |= XHCI_BROKEN_MSI; 102 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 103 "QUIRK: Fresco Logic revision %u " 104 "has broken MSI implementation", 105 pdev->revision); 106 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 107 } 108 109 if (pdev->vendor == PCI_VENDOR_ID_NEC) 110 xhci->quirks |= XHCI_NEC_HOST; 111 112 if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96) 113 xhci->quirks |= XHCI_AMD_0x96_HOST; 114 115 /* AMD PLL quirk */ 116 if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info()) 117 xhci->quirks |= XHCI_AMD_PLL_FIX; 118 119 if (pdev->vendor == PCI_VENDOR_ID_AMD) 120 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 121 122 if (pdev->vendor == PCI_VENDOR_ID_INTEL) { 123 xhci->quirks |= XHCI_LPM_SUPPORT; 124 xhci->quirks |= XHCI_INTEL_HOST; 125 xhci->quirks |= XHCI_AVOID_BEI; 126 } 127 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 128 pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) { 129 xhci->quirks |= XHCI_EP_LIMIT_QUIRK; 130 xhci->limit_active_eps = 64; 131 xhci->quirks |= XHCI_SW_BW_CHECKING; 132 /* 133 * PPT desktop boards DH77EB and DH77DF will power back on after 134 * a few seconds of being shutdown. The fix for this is to 135 * switch the ports from xHCI to EHCI on shutdown. We can't use 136 * DMI information to find those particular boards (since each 137 * vendor will change the board name), so we have to key off all 138 * PPT chipsets. 139 */ 140 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 141 } 142 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 143 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) { 144 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 145 } 146 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 147 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI || 148 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI || 149 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) { 150 xhci->quirks |= XHCI_PME_STUCK_QUIRK; 151 } 152 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 153 pdev->device == PCI_DEVICE_ID_EJ168) { 154 xhci->quirks |= XHCI_RESET_ON_RESUME; 155 xhci->quirks |= XHCI_TRUST_TX_LENGTH; 156 xhci->quirks |= XHCI_BROKEN_STREAMS; 157 } 158 if (pdev->vendor == PCI_VENDOR_ID_RENESAS && 159 pdev->device == 0x0015) 160 xhci->quirks |= XHCI_RESET_ON_RESUME; 161 if (pdev->vendor == PCI_VENDOR_ID_VIA) 162 xhci->quirks |= XHCI_RESET_ON_RESUME; 163 164 /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */ 165 if (pdev->vendor == PCI_VENDOR_ID_VIA && 166 pdev->device == 0x3432) 167 xhci->quirks |= XHCI_BROKEN_STREAMS; 168 169 if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && 170 pdev->device == 0x1042) 171 xhci->quirks |= XHCI_BROKEN_STREAMS; 172 173 if (xhci->quirks & XHCI_RESET_ON_RESUME) 174 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks, 175 "QUIRK: Resetting on resume"); 176 } 177 178 /* 179 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear 180 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4 181 */ 182 static void xhci_pme_quirk(struct xhci_hcd *xhci) 183 { 184 u32 val; 185 void __iomem *reg; 186 187 reg = (void __iomem *) xhci->cap_regs + 0x80a4; 188 val = readl(reg); 189 writel(val | BIT(28), reg); 190 readl(reg); 191 } 192 193 /* called during probe() after chip reset completes */ 194 static int xhci_pci_setup(struct usb_hcd *hcd) 195 { 196 struct xhci_hcd *xhci; 197 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 198 int retval; 199 200 retval = xhci_gen_setup(hcd, xhci_pci_quirks); 201 if (retval) 202 return retval; 203 204 xhci = hcd_to_xhci(hcd); 205 if (!usb_hcd_is_primary_hcd(hcd)) 206 return 0; 207 208 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn); 209 xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn); 210 211 /* Find any debug ports */ 212 retval = xhci_pci_reinit(xhci, pdev); 213 if (!retval) 214 return retval; 215 216 return retval; 217 } 218 219 /* 220 * We need to register our own PCI probe function (instead of the USB core's 221 * function) in order to create a second roothub under xHCI. 222 */ 223 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) 224 { 225 int retval; 226 struct xhci_hcd *xhci; 227 struct hc_driver *driver; 228 struct usb_hcd *hcd; 229 230 driver = (struct hc_driver *)id->driver_data; 231 232 /* Prevent runtime suspending between USB-2 and USB-3 initialization */ 233 pm_runtime_get_noresume(&dev->dev); 234 235 /* Register the USB 2.0 roothub. 236 * FIXME: USB core must know to register the USB 2.0 roothub first. 237 * This is sort of silly, because we could just set the HCD driver flags 238 * to say USB 2.0, but I'm not sure what the implications would be in 239 * the other parts of the HCD code. 240 */ 241 retval = usb_hcd_pci_probe(dev, id); 242 243 if (retval) 244 goto put_runtime_pm; 245 246 /* USB 2.0 roothub is stored in the PCI device now. */ 247 hcd = dev_get_drvdata(&dev->dev); 248 xhci = hcd_to_xhci(hcd); 249 xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev, 250 pci_name(dev), hcd); 251 if (!xhci->shared_hcd) { 252 retval = -ENOMEM; 253 goto dealloc_usb2_hcd; 254 } 255 256 retval = usb_add_hcd(xhci->shared_hcd, dev->irq, 257 IRQF_SHARED); 258 if (retval) 259 goto put_usb3_hcd; 260 /* Roothub already marked as USB 3.0 speed */ 261 262 if (!(xhci->quirks & XHCI_BROKEN_STREAMS) && 263 HCC_MAX_PSA(xhci->hcc_params) >= 4) 264 xhci->shared_hcd->can_do_streams = 1; 265 266 /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */ 267 pm_runtime_put_noidle(&dev->dev); 268 269 return 0; 270 271 put_usb3_hcd: 272 usb_put_hcd(xhci->shared_hcd); 273 dealloc_usb2_hcd: 274 usb_hcd_pci_remove(dev); 275 put_runtime_pm: 276 pm_runtime_put_noidle(&dev->dev); 277 return retval; 278 } 279 280 static void xhci_pci_remove(struct pci_dev *dev) 281 { 282 struct xhci_hcd *xhci; 283 284 xhci = hcd_to_xhci(pci_get_drvdata(dev)); 285 if (xhci->shared_hcd) { 286 usb_remove_hcd(xhci->shared_hcd); 287 usb_put_hcd(xhci->shared_hcd); 288 } 289 usb_hcd_pci_remove(dev); 290 291 /* Workaround for spurious wakeups at shutdown with HSW */ 292 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP) 293 pci_set_power_state(dev, PCI_D3hot); 294 } 295 296 #ifdef CONFIG_PM 297 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) 298 { 299 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 300 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 301 302 /* 303 * Systems with the TI redriver that loses port status change events 304 * need to have the registers polled during D3, so avoid D3cold. 305 */ 306 if (xhci->quirks & XHCI_COMP_MODE_QUIRK) 307 pdev->no_d3cold = true; 308 309 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) 310 xhci_pme_quirk(xhci); 311 312 return xhci_suspend(xhci, do_wakeup); 313 } 314 315 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated) 316 { 317 struct xhci_hcd *xhci = hcd_to_xhci(hcd); 318 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 319 int retval = 0; 320 321 /* The BIOS on systems with the Intel Panther Point chipset may or may 322 * not support xHCI natively. That means that during system resume, it 323 * may switch the ports back to EHCI so that users can use their 324 * keyboard to select a kernel from GRUB after resume from hibernate. 325 * 326 * The BIOS is supposed to remember whether the OS had xHCI ports 327 * enabled before resume, and switch the ports back to xHCI when the 328 * BIOS/OS semaphore is written, but we all know we can't trust BIOS 329 * writers. 330 * 331 * Unconditionally switch the ports back to xHCI after a system resume. 332 * It should not matter whether the EHCI or xHCI controller is 333 * resumed first. It's enough to do the switchover in xHCI because 334 * USB core won't notice anything as the hub driver doesn't start 335 * running again until after all the devices (including both EHCI and 336 * xHCI host controllers) have been resumed. 337 */ 338 339 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 340 usb_enable_intel_xhci_ports(pdev); 341 342 if (xhci->quirks & XHCI_PME_STUCK_QUIRK) 343 xhci_pme_quirk(xhci); 344 345 retval = xhci_resume(xhci, hibernated); 346 return retval; 347 } 348 #endif /* CONFIG_PM */ 349 350 /*-------------------------------------------------------------------------*/ 351 352 /* PCI driver selection metadata; PCI hotplugging uses this */ 353 static const struct pci_device_id pci_ids[] = { { 354 /* handle any USB 3.0 xHCI controller */ 355 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0), 356 .driver_data = (unsigned long) &xhci_pci_hc_driver, 357 }, 358 { /* end: all zeroes */ } 359 }; 360 MODULE_DEVICE_TABLE(pci, pci_ids); 361 362 /* pci driver glue; this is a "new style" PCI driver module */ 363 static struct pci_driver xhci_pci_driver = { 364 .name = (char *) hcd_name, 365 .id_table = pci_ids, 366 367 .probe = xhci_pci_probe, 368 .remove = xhci_pci_remove, 369 /* suspend and resume implemented later */ 370 371 .shutdown = usb_hcd_pci_shutdown, 372 #ifdef CONFIG_PM 373 .driver = { 374 .pm = &usb_hcd_pci_pm_ops 375 }, 376 #endif 377 }; 378 379 static int __init xhci_pci_init(void) 380 { 381 xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides); 382 #ifdef CONFIG_PM 383 xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend; 384 xhci_pci_hc_driver.pci_resume = xhci_pci_resume; 385 #endif 386 return pci_register_driver(&xhci_pci_driver); 387 } 388 module_init(xhci_pci_init); 389 390 static void __exit xhci_pci_exit(void) 391 { 392 pci_unregister_driver(&xhci_pci_driver); 393 } 394 module_exit(xhci_pci_exit); 395 396 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver"); 397 MODULE_LICENSE("GPL"); 398