1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2015 MediaTek Inc. 4 * Author: 5 * Zhigang.Wei <zhigang.wei@mediatek.com> 6 * Chunfeng.Yun <chunfeng.yun@mediatek.com> 7 */ 8 9 #ifndef _XHCI_MTK_H_ 10 #define _XHCI_MTK_H_ 11 12 #include <linux/clk.h> 13 #include <linux/hashtable.h> 14 #include <linux/regulator/consumer.h> 15 16 #include "xhci.h" 17 18 #define BULK_CLKS_NUM 6 19 #define BULK_VREGS_NUM 2 20 21 /* support at most 64 ep, use 32 size hash table */ 22 #define SCH_EP_HASH_BITS 5 23 24 /* 25 * To simplify scheduler algorithm, set a upper limit for ESIT, 26 * if a synchromous ep's ESIT is larger than @XHCI_MTK_MAX_ESIT, 27 * round down to the limit value, that means allocating more 28 * bandwidth to it. 29 */ 30 #define XHCI_MTK_MAX_ESIT (1 << 6) 31 #define XHCI_MTK_BW_INDEX(x) ((x) & (XHCI_MTK_MAX_ESIT - 1)) 32 33 #define UFRAMES_PER_FRAME 8 34 #define XHCI_MTK_FRAMES_CNT (XHCI_MTK_MAX_ESIT / UFRAMES_PER_FRAME) 35 36 /** 37 * struct mu3h_sch_tt - TT scheduling data 38 * @fs_bus_bw_out: save bandwidth used by FS/LS OUT eps in each uframes 39 * @fs_bus_bw_in: save bandwidth used by FS/LS IN eps in each uframes 40 * @ls_bus_bw: save bandwidth used by LS eps in each uframes 41 * @fs_frame_bw: save bandwidth used by FS/LS eps in each FS frames 42 * @in_ss_cnt: the count of Start-Split for IN eps 43 * @ep_list: Endpoints using this TT 44 */ 45 struct mu3h_sch_tt { 46 u16 fs_bus_bw_out[XHCI_MTK_MAX_ESIT]; 47 u16 fs_bus_bw_in[XHCI_MTK_MAX_ESIT]; 48 u8 ls_bus_bw[XHCI_MTK_MAX_ESIT]; 49 u16 fs_frame_bw[XHCI_MTK_FRAMES_CNT]; 50 u8 in_ss_cnt[XHCI_MTK_MAX_ESIT]; 51 struct list_head ep_list; 52 }; 53 54 /** 55 * struct mu3h_sch_bw_info - schedule information for bandwidth domain 56 * 57 * @bus_bw: array to keep track of bandwidth already used at each uframes 58 * 59 * treat a HS root port as a bandwidth domain, but treat a SS root port as 60 * two bandwidth domains, one for IN eps and another for OUT eps. 61 */ 62 struct mu3h_sch_bw_info { 63 u32 bus_bw[XHCI_MTK_MAX_ESIT]; 64 }; 65 66 /** 67 * struct mu3h_sch_ep_info - schedule information for endpoint 68 * 69 * @esit: unit is 125us, equal to 2 << Interval field in ep-context 70 * @num_esit: number of @esit in a period 71 * @num_budget_microframes: number of continuous uframes 72 * (@repeat==1) scheduled within the interval 73 * @hentry: hash table entry 74 * @endpoint: linked into bandwidth domain which it belongs to 75 * @tt_endpoint: linked into mu3h_sch_tt's list which it belongs to 76 * @bw_info: bandwidth domain which this endpoint belongs 77 * @sch_tt: mu3h_sch_tt linked into 78 * @ep_type: endpoint type 79 * @maxpkt: max packet size of endpoint 80 * @ep: address of usb_host_endpoint struct 81 * @speed: usb device speed 82 * @allocated: the bandwidth is aready allocated from bus_bw 83 * @offset: which uframe of the interval that transfer should be 84 * scheduled first time within the interval 85 * @repeat: the time gap between two uframes that transfers are 86 * scheduled within a interval. in the simple algorithm, only 87 * assign 0 or 1 to it; 0 means using only one uframe in a 88 * interval, and 1 means using @num_budget_microframes 89 * continuous uframes 90 * @pkts: number of packets to be transferred in the scheduled uframes 91 * @cs_count: number of CS that host will trigger 92 * @burst_mode: burst mode for scheduling. 0: normal burst mode, 93 * distribute the bMaxBurst+1 packets for a single burst 94 * according to @pkts and @repeat, repeate the burst multiple 95 * times; 1: distribute the (bMaxBurst+1)*(Mult+1) packets 96 * according to @pkts and @repeat. normal mode is used by 97 * default 98 * @bw_budget_table: table to record bandwidth budget per microframe 99 */ 100 struct mu3h_sch_ep_info { 101 u32 esit; 102 u32 num_esit; 103 u32 num_budget_microframes; 104 struct list_head endpoint; 105 struct hlist_node hentry; 106 struct list_head tt_endpoint; 107 struct mu3h_sch_bw_info *bw_info; 108 struct mu3h_sch_tt *sch_tt; 109 u32 ep_type; 110 u32 maxpkt; 111 struct usb_host_endpoint *ep; 112 enum usb_device_speed speed; 113 bool allocated; 114 /* 115 * mtk xHCI scheduling information put into reserved DWs 116 * in ep context 117 */ 118 u32 offset; 119 u32 repeat; 120 u32 pkts; 121 u32 cs_count; 122 u32 burst_mode; 123 u32 bw_budget_table[]; 124 }; 125 126 #define MU3C_U3_PORT_MAX 4 127 #define MU3C_U2_PORT_MAX 5 128 129 /** 130 * struct mu3c_ippc_regs - MTK ssusb ip port control registers 131 * @ip_pw_ctr0~3: ip power and clock control registers 132 * @ip_pw_sts1~2: ip power and clock status registers 133 * @ip_xhci_cap: ip xHCI capability register 134 * @u3_ctrl_p[x]: ip usb3 port x control register, only low 4bytes are used 135 * @u2_ctrl_p[x]: ip usb2 port x control register, only low 4bytes are used 136 * @u2_phy_pll: usb2 phy pll control register 137 */ 138 struct mu3c_ippc_regs { 139 __le32 ip_pw_ctr0; 140 __le32 ip_pw_ctr1; 141 __le32 ip_pw_ctr2; 142 __le32 ip_pw_ctr3; 143 __le32 ip_pw_sts1; 144 __le32 ip_pw_sts2; 145 __le32 reserved0[3]; 146 __le32 ip_xhci_cap; 147 __le32 reserved1[2]; 148 __le64 u3_ctrl_p[MU3C_U3_PORT_MAX]; 149 __le64 u2_ctrl_p[MU3C_U2_PORT_MAX]; 150 __le32 reserved2; 151 __le32 u2_phy_pll; 152 __le32 reserved3[33]; /* 0x80 ~ 0xff */ 153 }; 154 155 struct xhci_hcd_mtk { 156 struct device *dev; 157 struct usb_hcd *hcd; 158 struct mu3h_sch_bw_info *sch_array; 159 struct list_head bw_ep_chk_list; 160 DECLARE_HASHTABLE(sch_ep_hash, SCH_EP_HASH_BITS); 161 struct mu3c_ippc_regs __iomem *ippc_regs; 162 int num_u2_ports; 163 int num_u3_ports; 164 int u2p_dis_msk; 165 int u3p_dis_msk; 166 struct clk_bulk_data clks[BULK_CLKS_NUM]; 167 struct regulator_bulk_data supplies[BULK_VREGS_NUM]; 168 unsigned int has_ippc:1; 169 unsigned int lpm_support:1; 170 unsigned int u2_lpm_disable:1; 171 /* usb remote wakeup */ 172 unsigned int uwk_en:1; 173 struct regmap *uwk; 174 u32 uwk_reg_base; 175 u32 uwk_vers; 176 /* quirk */ 177 u32 rxfifo_depth; 178 }; 179 180 static inline struct xhci_hcd_mtk *hcd_to_mtk(struct usb_hcd *hcd) 181 { 182 return dev_get_drvdata(hcd->self.controller); 183 } 184 185 int xhci_mtk_sch_init(struct xhci_hcd_mtk *mtk); 186 void xhci_mtk_sch_exit(struct xhci_hcd_mtk *mtk); 187 int xhci_mtk_add_ep(struct usb_hcd *hcd, struct usb_device *udev, 188 struct usb_host_endpoint *ep); 189 int xhci_mtk_drop_ep(struct usb_hcd *hcd, struct usb_device *udev, 190 struct usb_host_endpoint *ep); 191 int xhci_mtk_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev); 192 void xhci_mtk_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev); 193 194 #endif /* _XHCI_MTK_H_ */ 195