xref: /linux/drivers/usb/host/uhci-q.c (revision 20d0021394c1b070bf04b22c5bc8fdb437edd4c5)
1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
13  * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
14  *               support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
15  * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
16  * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
17  */
18 
19 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
20 static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb);
21 static void uhci_remove_pending_urbps(struct uhci_hcd *uhci);
22 static void uhci_free_pending_qhs(struct uhci_hcd *uhci);
23 static void uhci_free_pending_tds(struct uhci_hcd *uhci);
24 
25 /*
26  * Technically, updating td->status here is a race, but it's not really a
27  * problem. The worst that can happen is that we set the IOC bit again
28  * generating a spurious interrupt. We could fix this by creating another
29  * QH and leaving the IOC bit always set, but then we would have to play
30  * games with the FSBR code to make sure we get the correct order in all
31  * the cases. I don't think it's worth the effort
32  */
33 static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci)
34 {
35 	if (uhci->is_stopped)
36 		mod_timer(&uhci->stall_timer, jiffies);
37 	uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
38 }
39 
40 static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
41 {
42 	uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
43 }
44 
45 static inline void uhci_moveto_complete(struct uhci_hcd *uhci,
46 					struct urb_priv *urbp)
47 {
48 	list_move_tail(&urbp->urb_list, &uhci->complete_list);
49 }
50 
51 static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
52 {
53 	dma_addr_t dma_handle;
54 	struct uhci_td *td;
55 
56 	td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
57 	if (!td)
58 		return NULL;
59 
60 	td->dma_handle = dma_handle;
61 
62 	td->link = UHCI_PTR_TERM;
63 	td->buffer = 0;
64 
65 	td->frame = -1;
66 
67 	INIT_LIST_HEAD(&td->list);
68 	INIT_LIST_HEAD(&td->remove_list);
69 	INIT_LIST_HEAD(&td->fl_list);
70 
71 	return td;
72 }
73 
74 static inline void uhci_fill_td(struct uhci_td *td, u32 status,
75 		u32 token, u32 buffer)
76 {
77 	td->status = cpu_to_le32(status);
78 	td->token = cpu_to_le32(token);
79 	td->buffer = cpu_to_le32(buffer);
80 }
81 
82 /*
83  * We insert Isochronous URB's directly into the frame list at the beginning
84  */
85 static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum)
86 {
87 	framenum &= (UHCI_NUMFRAMES - 1);
88 
89 	td->frame = framenum;
90 
91 	/* Is there a TD already mapped there? */
92 	if (uhci->fl->frame_cpu[framenum]) {
93 		struct uhci_td *ftd, *ltd;
94 
95 		ftd = uhci->fl->frame_cpu[framenum];
96 		ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
97 
98 		list_add_tail(&td->fl_list, &ftd->fl_list);
99 
100 		td->link = ltd->link;
101 		wmb();
102 		ltd->link = cpu_to_le32(td->dma_handle);
103 	} else {
104 		td->link = uhci->fl->frame[framenum];
105 		wmb();
106 		uhci->fl->frame[framenum] = cpu_to_le32(td->dma_handle);
107 		uhci->fl->frame_cpu[framenum] = td;
108 	}
109 }
110 
111 static void uhci_remove_td(struct uhci_hcd *uhci, struct uhci_td *td)
112 {
113 	/* If it's not inserted, don't remove it */
114 	if (td->frame == -1 && list_empty(&td->fl_list))
115 		return;
116 
117 	if (td->frame != -1 && uhci->fl->frame_cpu[td->frame] == td) {
118 		if (list_empty(&td->fl_list)) {
119 			uhci->fl->frame[td->frame] = td->link;
120 			uhci->fl->frame_cpu[td->frame] = NULL;
121 		} else {
122 			struct uhci_td *ntd;
123 
124 			ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
125 			uhci->fl->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
126 			uhci->fl->frame_cpu[td->frame] = ntd;
127 		}
128 	} else {
129 		struct uhci_td *ptd;
130 
131 		ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
132 		ptd->link = td->link;
133 	}
134 
135 	wmb();
136 	td->link = UHCI_PTR_TERM;
137 
138 	list_del_init(&td->fl_list);
139 	td->frame = -1;
140 }
141 
142 /*
143  * Inserts a td list into qh.
144  */
145 static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth)
146 {
147 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
148 	struct uhci_td *td;
149 	__le32 *plink;
150 
151 	/* Ordering isn't important here yet since the QH hasn't been */
152 	/* inserted into the schedule yet */
153 	plink = &qh->element;
154 	list_for_each_entry(td, &urbp->td_list, list) {
155 		*plink = cpu_to_le32(td->dma_handle) | breadth;
156 		plink = &td->link;
157 	}
158 	*plink = UHCI_PTR_TERM;
159 }
160 
161 static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
162 {
163 	if (!list_empty(&td->list))
164 		dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
165 	if (!list_empty(&td->remove_list))
166 		dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td);
167 	if (!list_empty(&td->fl_list))
168 		dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
169 
170 	dma_pool_free(uhci->td_pool, td, td->dma_handle);
171 }
172 
173 static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci)
174 {
175 	dma_addr_t dma_handle;
176 	struct uhci_qh *qh;
177 
178 	qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
179 	if (!qh)
180 		return NULL;
181 
182 	qh->dma_handle = dma_handle;
183 
184 	qh->element = UHCI_PTR_TERM;
185 	qh->link = UHCI_PTR_TERM;
186 
187 	qh->urbp = NULL;
188 
189 	INIT_LIST_HEAD(&qh->list);
190 	INIT_LIST_HEAD(&qh->remove_list);
191 
192 	return qh;
193 }
194 
195 static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
196 {
197 	if (!list_empty(&qh->list))
198 		dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
199 	if (!list_empty(&qh->remove_list))
200 		dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh);
201 
202 	dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
203 }
204 
205 /*
206  * Append this urb's qh after the last qh in skelqh->list
207  *
208  * Note that urb_priv.queue_list doesn't have a separate queue head;
209  * it's a ring with every element "live".
210  */
211 static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb)
212 {
213 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
214 	struct urb_priv *turbp;
215 	struct uhci_qh *lqh;
216 
217 	/* Grab the last QH */
218 	lqh = list_entry(skelqh->list.prev, struct uhci_qh, list);
219 
220 	/* Point to the next skelqh */
221 	urbp->qh->link = lqh->link;
222 	wmb();				/* Ordering is important */
223 
224 	/*
225 	 * Patch QHs for previous endpoint's queued URBs?  HC goes
226 	 * here next, not to the next skelqh it now points to.
227 	 *
228 	 *    lqh --> td ... --> qh ... --> td --> qh ... --> td
229 	 *     |                 |                 |
230 	 *     v                 v                 v
231 	 *     +<----------------+-----------------+
232 	 *     v
233 	 *    newqh --> td ... --> td
234 	 *     |
235 	 *     v
236 	 *    ...
237 	 *
238 	 * The HC could see (and use!) any of these as we write them.
239 	 */
240 	lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
241 	if (lqh->urbp) {
242 		list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list)
243 			turbp->qh->link = lqh->link;
244 	}
245 
246 	list_add_tail(&urbp->qh->list, &skelqh->list);
247 }
248 
249 /*
250  * Start removal of QH from schedule; it finishes next frame.
251  * TDs should be unlinked before this is called.
252  */
253 static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
254 {
255 	struct uhci_qh *pqh;
256 	__le32 newlink;
257 
258 	if (!qh)
259 		return;
260 
261 	/*
262 	 * Only go through the hoops if it's actually linked in
263 	 */
264 	if (!list_empty(&qh->list)) {
265 
266 		/* If our queue is nonempty, make the next URB the head */
267 		if (!list_empty(&qh->urbp->queue_list)) {
268 			struct urb_priv *nurbp;
269 
270 			nurbp = list_entry(qh->urbp->queue_list.next,
271 					struct urb_priv, queue_list);
272 			nurbp->queued = 0;
273 			list_add(&nurbp->qh->list, &qh->list);
274 			newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
275 		} else
276 			newlink = qh->link;
277 
278 		/* Fix up the previous QH's queue to link to either
279 		 * the new head of this queue or the start of the
280 		 * next endpoint's queue. */
281 		pqh = list_entry(qh->list.prev, struct uhci_qh, list);
282 		pqh->link = newlink;
283 		if (pqh->urbp) {
284 			struct urb_priv *turbp;
285 
286 			list_for_each_entry(turbp, &pqh->urbp->queue_list,
287 					queue_list)
288 				turbp->qh->link = newlink;
289 		}
290 		wmb();
291 
292 		/* Leave qh->link in case the HC is on the QH now, it will */
293 		/* continue the rest of the schedule */
294 		qh->element = UHCI_PTR_TERM;
295 
296 		list_del_init(&qh->list);
297 	}
298 
299 	list_del_init(&qh->urbp->queue_list);
300 	qh->urbp = NULL;
301 
302 	uhci_get_current_frame_number(uhci);
303 	if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) {
304 		uhci_free_pending_qhs(uhci);
305 		uhci->qh_remove_age = uhci->frame_number;
306 	}
307 
308 	/* Check to see if the remove list is empty. Set the IOC bit */
309 	/* to force an interrupt so we can remove the QH */
310 	if (list_empty(&uhci->qh_remove_list))
311 		uhci_set_next_interrupt(uhci);
312 
313 	list_add(&qh->remove_list, &uhci->qh_remove_list);
314 }
315 
316 static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle)
317 {
318 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
319 	struct uhci_td *td;
320 
321 	list_for_each_entry(td, &urbp->td_list, list) {
322 		if (toggle)
323 			td->token |= cpu_to_le32(TD_TOKEN_TOGGLE);
324 		else
325 			td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE);
326 
327 		toggle ^= 1;
328 	}
329 
330 	return toggle;
331 }
332 
333 /* This function will append one URB's QH to another URB's QH. This is for */
334 /* queuing interrupt, control or bulk transfers */
335 static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb)
336 {
337 	struct urb_priv *eurbp, *urbp, *furbp, *lurbp;
338 	struct uhci_td *lltd;
339 
340 	eurbp = eurb->hcpriv;
341 	urbp = urb->hcpriv;
342 
343 	/* Find the first URB in the queue */
344 	furbp = eurbp;
345 	if (eurbp->queued) {
346 		list_for_each_entry(furbp, &eurbp->queue_list, queue_list)
347 			if (!furbp->queued)
348 				break;
349 	}
350 
351 	lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list);
352 
353 	lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list);
354 
355 	/* Control transfers always start with toggle 0 */
356 	if (!usb_pipecontrol(urb->pipe))
357 		usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
358 				usb_pipeout(urb->pipe),
359 				uhci_fixup_toggle(urb,
360 					uhci_toggle(td_token(lltd)) ^ 1));
361 
362 	/* All qh's in the queue need to link to the next queue */
363 	urbp->qh->link = eurbp->qh->link;
364 
365 	wmb();			/* Make sure we flush everything */
366 
367 	lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
368 
369 	list_add_tail(&urbp->queue_list, &furbp->queue_list);
370 
371 	urbp->queued = 1;
372 }
373 
374 static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb)
375 {
376 	struct urb_priv *urbp, *nurbp, *purbp, *turbp;
377 	struct uhci_td *pltd;
378 	unsigned int toggle;
379 
380 	urbp = urb->hcpriv;
381 
382 	if (list_empty(&urbp->queue_list))
383 		return;
384 
385 	nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list);
386 
387 	/*
388 	 * Fix up the toggle for the following URBs in the queue.
389 	 * Only needed for bulk and interrupt: control and isochronous
390 	 * endpoints don't propagate toggles between messages.
391 	 */
392 	if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) {
393 		if (!urbp->queued)
394 			/* We just set the toggle in uhci_unlink_generic */
395 			toggle = usb_gettoggle(urb->dev,
396 					usb_pipeendpoint(urb->pipe),
397 					usb_pipeout(urb->pipe));
398 		else {
399 			/* If we're in the middle of the queue, grab the */
400 			/* toggle from the TD previous to us */
401 			purbp = list_entry(urbp->queue_list.prev,
402 					struct urb_priv, queue_list);
403 			pltd = list_entry(purbp->td_list.prev,
404 					struct uhci_td, list);
405 			toggle = uhci_toggle(td_token(pltd)) ^ 1;
406 		}
407 
408 		list_for_each_entry(turbp, &urbp->queue_list, queue_list) {
409 			if (!turbp->queued)
410 				break;
411 			toggle = uhci_fixup_toggle(turbp->urb, toggle);
412 		}
413 
414 		usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
415 				usb_pipeout(urb->pipe), toggle);
416 	}
417 
418 	if (urbp->queued) {
419 		/* We're somewhere in the middle (or end).  The case where
420 		 * we're at the head is handled in uhci_remove_qh(). */
421 		purbp = list_entry(urbp->queue_list.prev, struct urb_priv,
422 				queue_list);
423 
424 		pltd = list_entry(purbp->td_list.prev, struct uhci_td, list);
425 		if (nurbp->queued)
426 			pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
427 		else
428 			/* The next URB happens to be the beginning, so */
429 			/*  we're the last, end the chain */
430 			pltd->link = UHCI_PTR_TERM;
431 	}
432 
433 	/* urbp->queue_list is handled in uhci_remove_qh() */
434 }
435 
436 static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
437 {
438 	struct urb_priv *urbp;
439 
440 	urbp = kmem_cache_alloc(uhci_up_cachep, SLAB_ATOMIC);
441 	if (!urbp)
442 		return NULL;
443 
444 	memset((void *)urbp, 0, sizeof(*urbp));
445 
446 	urbp->inserttime = jiffies;
447 	urbp->fsbrtime = jiffies;
448 	urbp->urb = urb;
449 
450 	INIT_LIST_HEAD(&urbp->td_list);
451 	INIT_LIST_HEAD(&urbp->queue_list);
452 	INIT_LIST_HEAD(&urbp->urb_list);
453 
454 	list_add_tail(&urbp->urb_list, &uhci->urb_list);
455 
456 	urb->hcpriv = urbp;
457 
458 	return urbp;
459 }
460 
461 static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
462 {
463 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
464 
465 	td->urb = urb;
466 
467 	list_add_tail(&td->list, &urbp->td_list);
468 }
469 
470 static void uhci_remove_td_from_urb(struct uhci_td *td)
471 {
472 	if (list_empty(&td->list))
473 		return;
474 
475 	list_del_init(&td->list);
476 
477 	td->urb = NULL;
478 }
479 
480 static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
481 {
482 	struct uhci_td *td, *tmp;
483 	struct urb_priv *urbp;
484 
485 	urbp = (struct urb_priv *)urb->hcpriv;
486 	if (!urbp)
487 		return;
488 
489 	if (!list_empty(&urbp->urb_list))
490 		dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list "
491 				"or uhci->remove_list!\n", urb);
492 
493 	uhci_get_current_frame_number(uhci);
494 	if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) {
495 		uhci_free_pending_tds(uhci);
496 		uhci->td_remove_age = uhci->frame_number;
497 	}
498 
499 	/* Check to see if the remove list is empty. Set the IOC bit */
500 	/* to force an interrupt so we can remove the TD's*/
501 	if (list_empty(&uhci->td_remove_list))
502 		uhci_set_next_interrupt(uhci);
503 
504 	list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
505 		uhci_remove_td_from_urb(td);
506 		uhci_remove_td(uhci, td);
507 		list_add(&td->remove_list, &uhci->td_remove_list);
508 	}
509 
510 	urb->hcpriv = NULL;
511 	kmem_cache_free(uhci_up_cachep, urbp);
512 }
513 
514 static void uhci_inc_fsbr(struct uhci_hcd *uhci, struct urb *urb)
515 {
516 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
517 
518 	if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
519 		urbp->fsbr = 1;
520 		if (!uhci->fsbr++ && !uhci->fsbrtimeout)
521 			uhci->skel_term_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
522 	}
523 }
524 
525 static void uhci_dec_fsbr(struct uhci_hcd *uhci, struct urb *urb)
526 {
527 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
528 
529 	if ((!(urb->transfer_flags & URB_NO_FSBR)) && urbp->fsbr) {
530 		urbp->fsbr = 0;
531 		if (!--uhci->fsbr)
532 			uhci->fsbrtimeout = jiffies + FSBR_DELAY;
533 	}
534 }
535 
536 /*
537  * Map status to standard result codes
538  *
539  * <status> is (td_status(td) & 0xF60000), a.k.a.
540  * uhci_status_bits(td_status(td)).
541  * Note: <status> does not include the TD_CTRL_NAK bit.
542  * <dir_out> is True for output TDs and False for input TDs.
543  */
544 static int uhci_map_status(int status, int dir_out)
545 {
546 	if (!status)
547 		return 0;
548 	if (status & TD_CTRL_BITSTUFF)			/* Bitstuff error */
549 		return -EPROTO;
550 	if (status & TD_CTRL_CRCTIMEO) {		/* CRC/Timeout */
551 		if (dir_out)
552 			return -EPROTO;
553 		else
554 			return -EILSEQ;
555 	}
556 	if (status & TD_CTRL_BABBLE)			/* Babble */
557 		return -EOVERFLOW;
558 	if (status & TD_CTRL_DBUFERR)			/* Buffer error */
559 		return -ENOSR;
560 	if (status & TD_CTRL_STALLED)			/* Stalled */
561 		return -EPIPE;
562 	WARN_ON(status & TD_CTRL_ACTIVE);		/* Active */
563 	return 0;
564 }
565 
566 /*
567  * Control transfers
568  */
569 static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
570 {
571 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
572 	struct uhci_td *td;
573 	struct uhci_qh *qh, *skelqh;
574 	unsigned long destination, status;
575 	int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
576 	int len = urb->transfer_buffer_length;
577 	dma_addr_t data = urb->transfer_dma;
578 
579 	/* The "pipe" thing contains the destination in bits 8--18 */
580 	destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
581 
582 	/* 3 errors */
583 	status = TD_CTRL_ACTIVE | uhci_maxerr(3);
584 	if (urb->dev->speed == USB_SPEED_LOW)
585 		status |= TD_CTRL_LS;
586 
587 	/*
588 	 * Build the TD for the control request setup packet
589 	 */
590 	td = uhci_alloc_td(uhci);
591 	if (!td)
592 		return -ENOMEM;
593 
594 	uhci_add_td_to_urb(urb, td);
595 	uhci_fill_td(td, status, destination | uhci_explen(7),
596 		urb->setup_dma);
597 
598 	/*
599 	 * If direction is "send", change the packet ID from SETUP (0x2D)
600 	 * to OUT (0xE1).  Else change it from SETUP to IN (0x69) and
601 	 * set Short Packet Detect (SPD) for all data packets.
602 	 */
603 	if (usb_pipeout(urb->pipe))
604 		destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
605 	else {
606 		destination ^= (USB_PID_SETUP ^ USB_PID_IN);
607 		status |= TD_CTRL_SPD;
608 	}
609 
610 	/*
611 	 * Build the DATA TD's
612 	 */
613 	while (len > 0) {
614 		int pktsze = len;
615 
616 		if (pktsze > maxsze)
617 			pktsze = maxsze;
618 
619 		td = uhci_alloc_td(uhci);
620 		if (!td)
621 			return -ENOMEM;
622 
623 		/* Alternate Data0/1 (start with Data1) */
624 		destination ^= TD_TOKEN_TOGGLE;
625 
626 		uhci_add_td_to_urb(urb, td);
627 		uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1),
628 			data);
629 
630 		data += pktsze;
631 		len -= pktsze;
632 	}
633 
634 	/*
635 	 * Build the final TD for control status
636 	 */
637 	td = uhci_alloc_td(uhci);
638 	if (!td)
639 		return -ENOMEM;
640 
641 	/*
642 	 * It's IN if the pipe is an output pipe or we're not expecting
643 	 * data back.
644 	 */
645 	destination &= ~TD_TOKEN_PID_MASK;
646 	if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
647 		destination |= USB_PID_IN;
648 	else
649 		destination |= USB_PID_OUT;
650 
651 	destination |= TD_TOKEN_TOGGLE;		/* End in Data1 */
652 
653 	status &= ~TD_CTRL_SPD;
654 
655 	uhci_add_td_to_urb(urb, td);
656 	uhci_fill_td(td, status | TD_CTRL_IOC,
657 		destination | uhci_explen(UHCI_NULL_DATA_SIZE), 0);
658 
659 	qh = uhci_alloc_qh(uhci);
660 	if (!qh)
661 		return -ENOMEM;
662 
663 	urbp->qh = qh;
664 	qh->urbp = urbp;
665 
666 	uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
667 
668 	/* Low-speed transfers get a different queue, and won't hog the bus.
669 	 * Also, some devices enumerate better without FSBR; the easiest way
670 	 * to do that is to put URBs on the low-speed queue while the device
671 	 * is in the DEFAULT state. */
672 	if (urb->dev->speed == USB_SPEED_LOW ||
673 			urb->dev->state == USB_STATE_DEFAULT)
674 		skelqh = uhci->skel_ls_control_qh;
675 	else {
676 		skelqh = uhci->skel_fs_control_qh;
677 		uhci_inc_fsbr(uhci, urb);
678 	}
679 
680 	if (eurb)
681 		uhci_append_queued_urb(uhci, eurb, urb);
682 	else
683 		uhci_insert_qh(uhci, skelqh, urb);
684 
685 	return -EINPROGRESS;
686 }
687 
688 /*
689  * If control-IN transfer was short, the status packet wasn't sent.
690  * This routine changes the element pointer in the QH to point at the
691  * status TD.  It's safe to do this even while the QH is live, because
692  * the hardware only updates the element pointer following a successful
693  * transfer.  The inactive TD for the short packet won't cause an update,
694  * so the pointer won't get overwritten.  The next time the controller
695  * sees this QH, it will send the status packet.
696  */
697 static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb)
698 {
699 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
700 	struct uhci_td *td;
701 
702 	urbp->short_control_packet = 1;
703 
704 	td = list_entry(urbp->td_list.prev, struct uhci_td, list);
705 	urbp->qh->element = cpu_to_le32(td->dma_handle);
706 
707 	return -EINPROGRESS;
708 }
709 
710 
711 static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb)
712 {
713 	struct list_head *tmp, *head;
714 	struct urb_priv *urbp = urb->hcpriv;
715 	struct uhci_td *td;
716 	unsigned int status;
717 	int ret = 0;
718 
719 	if (list_empty(&urbp->td_list))
720 		return -EINVAL;
721 
722 	head = &urbp->td_list;
723 
724 	if (urbp->short_control_packet) {
725 		tmp = head->prev;
726 		goto status_stage;
727 	}
728 
729 	tmp = head->next;
730 	td = list_entry(tmp, struct uhci_td, list);
731 
732 	/* The first TD is the SETUP stage, check the status, but skip */
733 	/*  the count */
734 	status = uhci_status_bits(td_status(td));
735 	if (status & TD_CTRL_ACTIVE)
736 		return -EINPROGRESS;
737 
738 	if (status)
739 		goto td_error;
740 
741 	urb->actual_length = 0;
742 
743 	/* The rest of the TD's (but the last) are data */
744 	tmp = tmp->next;
745 	while (tmp != head && tmp->next != head) {
746 		unsigned int ctrlstat;
747 
748 		td = list_entry(tmp, struct uhci_td, list);
749 		tmp = tmp->next;
750 
751 		ctrlstat = td_status(td);
752 		status = uhci_status_bits(ctrlstat);
753 		if (status & TD_CTRL_ACTIVE)
754 			return -EINPROGRESS;
755 
756 		urb->actual_length += uhci_actual_length(ctrlstat);
757 
758 		if (status)
759 			goto td_error;
760 
761 		/* Check to see if we received a short packet */
762 		if (uhci_actual_length(ctrlstat) <
763 				uhci_expected_length(td_token(td))) {
764 			if (urb->transfer_flags & URB_SHORT_NOT_OK) {
765 				ret = -EREMOTEIO;
766 				goto err;
767 			}
768 
769 			if (uhci_packetid(td_token(td)) == USB_PID_IN)
770 				return usb_control_retrigger_status(uhci, urb);
771 			else
772 				return 0;
773 		}
774 	}
775 
776 status_stage:
777 	td = list_entry(tmp, struct uhci_td, list);
778 
779 	/* Control status stage */
780 	status = td_status(td);
781 
782 #ifdef I_HAVE_BUGGY_APC_BACKUPS
783 	/* APC BackUPS Pro kludge */
784 	/* It tries to send all of the descriptor instead of the amount */
785 	/*  we requested */
786 	if (status & TD_CTRL_IOC &&	/* IOC is masked out by uhci_status_bits */
787 	    status & TD_CTRL_ACTIVE &&
788 	    status & TD_CTRL_NAK)
789 		return 0;
790 #endif
791 
792 	status = uhci_status_bits(status);
793 	if (status & TD_CTRL_ACTIVE)
794 		return -EINPROGRESS;
795 
796 	if (status)
797 		goto td_error;
798 
799 	return 0;
800 
801 td_error:
802 	ret = uhci_map_status(status, uhci_packetout(td_token(td)));
803 
804 err:
805 	if ((debug == 1 && ret != -EPIPE) || debug > 1) {
806 		/* Some debugging code */
807 		dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
808 				__FUNCTION__, status);
809 
810 		if (errbuf) {
811 			/* Print the chain for debugging purposes */
812 			uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
813 
814 			lprintk(errbuf);
815 		}
816 	}
817 
818 	return ret;
819 }
820 
821 /*
822  * Common submit for bulk and interrupt
823  */
824 static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh)
825 {
826 	struct uhci_td *td;
827 	struct uhci_qh *qh;
828 	unsigned long destination, status;
829 	int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
830 	int len = urb->transfer_buffer_length;
831 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
832 	dma_addr_t data = urb->transfer_dma;
833 
834 	if (len < 0)
835 		return -EINVAL;
836 
837 	/* The "pipe" thing contains the destination in bits 8--18 */
838 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
839 
840 	status = uhci_maxerr(3) | TD_CTRL_ACTIVE;
841 	if (urb->dev->speed == USB_SPEED_LOW)
842 		status |= TD_CTRL_LS;
843 	if (usb_pipein(urb->pipe))
844 		status |= TD_CTRL_SPD;
845 
846 	/*
847 	 * Build the DATA TD's
848 	 */
849 	do {	/* Allow zero length packets */
850 		int pktsze = maxsze;
851 
852 		if (pktsze >= len) {
853 			pktsze = len;
854 			if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
855 				status &= ~TD_CTRL_SPD;
856 		}
857 
858 		td = uhci_alloc_td(uhci);
859 		if (!td)
860 			return -ENOMEM;
861 
862 		uhci_add_td_to_urb(urb, td);
863 		uhci_fill_td(td, status, destination | uhci_explen(pktsze - 1) |
864 			(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
865 			 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
866 			data);
867 
868 		data += pktsze;
869 		len -= maxsze;
870 
871 		usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
872 			usb_pipeout(urb->pipe));
873 	} while (len > 0);
874 
875 	/*
876 	 * URB_ZERO_PACKET means adding a 0-length packet, if direction
877 	 * is OUT and the transfer_length was an exact multiple of maxsze,
878 	 * hence (len = transfer_length - N * maxsze) == 0
879 	 * however, if transfer_length == 0, the zero packet was already
880 	 * prepared above.
881 	 */
882 	if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) &&
883 	    !len && urb->transfer_buffer_length) {
884 		td = uhci_alloc_td(uhci);
885 		if (!td)
886 			return -ENOMEM;
887 
888 		uhci_add_td_to_urb(urb, td);
889 		uhci_fill_td(td, status, destination | uhci_explen(UHCI_NULL_DATA_SIZE) |
890 			(usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
891 			 usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
892 			data);
893 
894 		usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
895 			usb_pipeout(urb->pipe));
896 	}
897 
898 	/* Set the interrupt-on-completion flag on the last packet.
899 	 * A more-or-less typical 4 KB URB (= size of one memory page)
900 	 * will require about 3 ms to transfer; that's a little on the
901 	 * fast side but not enough to justify delaying an interrupt
902 	 * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
903 	 * flag setting. */
904 	td->status |= cpu_to_le32(TD_CTRL_IOC);
905 
906 	qh = uhci_alloc_qh(uhci);
907 	if (!qh)
908 		return -ENOMEM;
909 
910 	urbp->qh = qh;
911 	qh->urbp = urbp;
912 
913 	/* Always breadth first */
914 	uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
915 
916 	if (eurb)
917 		uhci_append_queued_urb(uhci, eurb, urb);
918 	else
919 		uhci_insert_qh(uhci, skelqh, urb);
920 
921 	return -EINPROGRESS;
922 }
923 
924 /*
925  * Common result for bulk and interrupt
926  */
927 static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
928 {
929 	struct urb_priv *urbp = urb->hcpriv;
930 	struct uhci_td *td;
931 	unsigned int status = 0;
932 	int ret = 0;
933 
934 	urb->actual_length = 0;
935 
936 	list_for_each_entry(td, &urbp->td_list, list) {
937 		unsigned int ctrlstat = td_status(td);
938 
939 		status = uhci_status_bits(ctrlstat);
940 		if (status & TD_CTRL_ACTIVE)
941 			return -EINPROGRESS;
942 
943 		urb->actual_length += uhci_actual_length(ctrlstat);
944 
945 		if (status)
946 			goto td_error;
947 
948 		if (uhci_actual_length(ctrlstat) <
949 				uhci_expected_length(td_token(td))) {
950 			if (urb->transfer_flags & URB_SHORT_NOT_OK) {
951 				ret = -EREMOTEIO;
952 				goto err;
953 			} else
954 				return 0;
955 		}
956 	}
957 
958 	return 0;
959 
960 td_error:
961 	ret = uhci_map_status(status, uhci_packetout(td_token(td)));
962 
963 err:
964 	/*
965 	 * Enable this chunk of code if you want to see some more debugging.
966 	 * But be careful, it has the tendancy to starve out khubd and prevent
967 	 * disconnects from happening successfully if you have a slow debug
968 	 * log interface (like a serial console.
969 	 */
970 #if 0
971 	if ((debug == 1 && ret != -EPIPE) || debug > 1) {
972 		/* Some debugging code */
973 		dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
974 				__FUNCTION__, status);
975 
976 		if (errbuf) {
977 			/* Print the chain for debugging purposes */
978 			uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
979 
980 			lprintk(errbuf);
981 		}
982 	}
983 #endif
984 	return ret;
985 }
986 
987 static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
988 {
989 	int ret;
990 
991 	/* Can't have low-speed bulk transfers */
992 	if (urb->dev->speed == USB_SPEED_LOW)
993 		return -EINVAL;
994 
995 	ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh);
996 	if (ret == -EINPROGRESS)
997 		uhci_inc_fsbr(uhci, urb);
998 
999 	return ret;
1000 }
1001 
1002 static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
1003 {
1004 	/* USB 1.1 interrupt transfers only involve one packet per interval;
1005 	 * that's the uhci_submit_common() "breadth first" policy.  Drivers
1006 	 * can submit urbs of any length, but longer ones might need many
1007 	 * intervals to complete.
1008 	 */
1009 	return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]);
1010 }
1011 
1012 /*
1013  * Isochronous transfers
1014  */
1015 static int isochronous_find_limits(struct uhci_hcd *uhci, struct urb *urb, unsigned int *start, unsigned int *end)
1016 {
1017 	struct urb *last_urb = NULL;
1018 	struct urb_priv *up;
1019 	int ret = 0;
1020 
1021 	list_for_each_entry(up, &uhci->urb_list, urb_list) {
1022 		struct urb *u = up->urb;
1023 
1024 		/* look for pending URB's with identical pipe handle */
1025 		if ((urb->pipe == u->pipe) && (urb->dev == u->dev) &&
1026 		    (u->status == -EINPROGRESS) && (u != urb)) {
1027 			if (!last_urb)
1028 				*start = u->start_frame;
1029 			last_urb = u;
1030 		}
1031 	}
1032 
1033 	if (last_urb) {
1034 		*end = (last_urb->start_frame + last_urb->number_of_packets *
1035 				last_urb->interval) & (UHCI_NUMFRAMES-1);
1036 		ret = 0;
1037 	} else
1038 		ret = -1;	/* no previous urb found */
1039 
1040 	return ret;
1041 }
1042 
1043 static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb)
1044 {
1045 	int limits;
1046 	unsigned int start = 0, end = 0;
1047 
1048 	if (urb->number_of_packets > 900)	/* 900? Why? */
1049 		return -EFBIG;
1050 
1051 	limits = isochronous_find_limits(uhci, urb, &start, &end);
1052 
1053 	if (urb->transfer_flags & URB_ISO_ASAP) {
1054 		if (limits) {
1055 			uhci_get_current_frame_number(uhci);
1056 			urb->start_frame = (uhci->frame_number + 10)
1057 					& (UHCI_NUMFRAMES - 1);
1058 		} else
1059 			urb->start_frame = end;
1060 	} else {
1061 		urb->start_frame &= (UHCI_NUMFRAMES - 1);
1062 		/* FIXME: Sanity check */
1063 	}
1064 
1065 	return 0;
1066 }
1067 
1068 /*
1069  * Isochronous transfers
1070  */
1071 static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1072 {
1073 	struct uhci_td *td;
1074 	int i, ret, frame;
1075 	int status, destination;
1076 
1077 	status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
1078 	destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
1079 
1080 	ret = isochronous_find_start(uhci, urb);
1081 	if (ret)
1082 		return ret;
1083 
1084 	frame = urb->start_frame;
1085 	for (i = 0; i < urb->number_of_packets; i++, frame += urb->interval) {
1086 		if (!urb->iso_frame_desc[i].length)
1087 			continue;
1088 
1089 		td = uhci_alloc_td(uhci);
1090 		if (!td)
1091 			return -ENOMEM;
1092 
1093 		uhci_add_td_to_urb(urb, td);
1094 		uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length - 1),
1095 			urb->transfer_dma + urb->iso_frame_desc[i].offset);
1096 
1097 		if (i + 1 >= urb->number_of_packets)
1098 			td->status |= cpu_to_le32(TD_CTRL_IOC);
1099 
1100 		uhci_insert_td_frame_list(uhci, td, frame);
1101 	}
1102 
1103 	return -EINPROGRESS;
1104 }
1105 
1106 static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
1107 {
1108 	struct uhci_td *td;
1109 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1110 	int status;
1111 	int i, ret = 0;
1112 
1113 	urb->actual_length = 0;
1114 
1115 	i = 0;
1116 	list_for_each_entry(td, &urbp->td_list, list) {
1117 		int actlength;
1118 		unsigned int ctrlstat = td_status(td);
1119 
1120 		if (ctrlstat & TD_CTRL_ACTIVE)
1121 			return -EINPROGRESS;
1122 
1123 		actlength = uhci_actual_length(ctrlstat);
1124 		urb->iso_frame_desc[i].actual_length = actlength;
1125 		urb->actual_length += actlength;
1126 
1127 		status = uhci_map_status(uhci_status_bits(ctrlstat),
1128 				usb_pipeout(urb->pipe));
1129 		urb->iso_frame_desc[i].status = status;
1130 		if (status) {
1131 			urb->error_count++;
1132 			ret = status;
1133 		}
1134 
1135 		i++;
1136 	}
1137 
1138 	return ret;
1139 }
1140 
1141 static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb)
1142 {
1143 	struct urb_priv *up;
1144 
1145 	/* We don't match Isoc transfers since they are special */
1146 	if (usb_pipeisoc(urb->pipe))
1147 		return NULL;
1148 
1149 	list_for_each_entry(up, &uhci->urb_list, urb_list) {
1150 		struct urb *u = up->urb;
1151 
1152 		if (u->dev == urb->dev && u->status == -EINPROGRESS) {
1153 			/* For control, ignore the direction */
1154 			if (usb_pipecontrol(urb->pipe) &&
1155 			    (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN))
1156 				return u;
1157 			else if (u->pipe == urb->pipe)
1158 				return u;
1159 		}
1160 	}
1161 
1162 	return NULL;
1163 }
1164 
1165 static int uhci_urb_enqueue(struct usb_hcd *hcd,
1166 		struct usb_host_endpoint *ep,
1167 		struct urb *urb, unsigned mem_flags)
1168 {
1169 	int ret;
1170 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1171 	unsigned long flags;
1172 	struct urb *eurb;
1173 	int bustime;
1174 
1175 	spin_lock_irqsave(&uhci->lock, flags);
1176 
1177 	ret = urb->status;
1178 	if (ret != -EINPROGRESS)		/* URB already unlinked! */
1179 		goto out;
1180 
1181 	eurb = uhci_find_urb_ep(uhci, urb);
1182 
1183 	if (!uhci_alloc_urb_priv(uhci, urb)) {
1184 		ret = -ENOMEM;
1185 		goto out;
1186 	}
1187 
1188 	switch (usb_pipetype(urb->pipe)) {
1189 	case PIPE_CONTROL:
1190 		ret = uhci_submit_control(uhci, urb, eurb);
1191 		break;
1192 	case PIPE_INTERRUPT:
1193 		if (!eurb) {
1194 			bustime = usb_check_bandwidth(urb->dev, urb);
1195 			if (bustime < 0)
1196 				ret = bustime;
1197 			else {
1198 				ret = uhci_submit_interrupt(uhci, urb, eurb);
1199 				if (ret == -EINPROGRESS)
1200 					usb_claim_bandwidth(urb->dev, urb, bustime, 0);
1201 			}
1202 		} else {	/* inherit from parent */
1203 			urb->bandwidth = eurb->bandwidth;
1204 			ret = uhci_submit_interrupt(uhci, urb, eurb);
1205 		}
1206 		break;
1207 	case PIPE_BULK:
1208 		ret = uhci_submit_bulk(uhci, urb, eurb);
1209 		break;
1210 	case PIPE_ISOCHRONOUS:
1211 		bustime = usb_check_bandwidth(urb->dev, urb);
1212 		if (bustime < 0) {
1213 			ret = bustime;
1214 			break;
1215 		}
1216 
1217 		ret = uhci_submit_isochronous(uhci, urb);
1218 		if (ret == -EINPROGRESS)
1219 			usb_claim_bandwidth(urb->dev, urb, bustime, 1);
1220 		break;
1221 	}
1222 
1223 	if (ret != -EINPROGRESS) {
1224 		/* Submit failed, so delete it from the urb_list */
1225 		struct urb_priv *urbp = urb->hcpriv;
1226 
1227 		list_del_init(&urbp->urb_list);
1228 		uhci_destroy_urb_priv(uhci, urb);
1229 	} else
1230 		ret = 0;
1231 
1232 out:
1233 	spin_unlock_irqrestore(&uhci->lock, flags);
1234 	return ret;
1235 }
1236 
1237 /*
1238  * Return the result of a transfer
1239  */
1240 static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb)
1241 {
1242 	int ret = -EINPROGRESS;
1243 	struct urb_priv *urbp;
1244 
1245 	spin_lock(&urb->lock);
1246 
1247 	urbp = (struct urb_priv *)urb->hcpriv;
1248 
1249 	if (urb->status != -EINPROGRESS)	/* URB already dequeued */
1250 		goto out;
1251 
1252 	switch (usb_pipetype(urb->pipe)) {
1253 	case PIPE_CONTROL:
1254 		ret = uhci_result_control(uhci, urb);
1255 		break;
1256 	case PIPE_BULK:
1257 	case PIPE_INTERRUPT:
1258 		ret = uhci_result_common(uhci, urb);
1259 		break;
1260 	case PIPE_ISOCHRONOUS:
1261 		ret = uhci_result_isochronous(uhci, urb);
1262 		break;
1263 	}
1264 
1265 	if (ret == -EINPROGRESS)
1266 		goto out;
1267 	urb->status = ret;
1268 
1269 	switch (usb_pipetype(urb->pipe)) {
1270 	case PIPE_CONTROL:
1271 	case PIPE_BULK:
1272 	case PIPE_ISOCHRONOUS:
1273 		/* Release bandwidth for Interrupt or Isoc. transfers */
1274 		if (urb->bandwidth)
1275 			usb_release_bandwidth(urb->dev, urb, 1);
1276 		uhci_unlink_generic(uhci, urb);
1277 		break;
1278 	case PIPE_INTERRUPT:
1279 		/* Release bandwidth for Interrupt or Isoc. transfers */
1280 		/* Make sure we don't release if we have a queued URB */
1281 		if (list_empty(&urbp->queue_list) && urb->bandwidth)
1282 			usb_release_bandwidth(urb->dev, urb, 0);
1283 		else
1284 			/* bandwidth was passed on to queued URB, */
1285 			/* so don't let usb_unlink_urb() release it */
1286 			urb->bandwidth = 0;
1287 		uhci_unlink_generic(uhci, urb);
1288 		break;
1289 	default:
1290 		dev_info(uhci_dev(uhci), "%s: unknown pipe type %d "
1291 				"for urb %p\n",
1292 				__FUNCTION__, usb_pipetype(urb->pipe), urb);
1293 	}
1294 
1295 	/* Move it from uhci->urb_list to uhci->complete_list */
1296 	uhci_moveto_complete(uhci, urbp);
1297 
1298 out:
1299 	spin_unlock(&urb->lock);
1300 }
1301 
1302 static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb)
1303 {
1304 	struct list_head *head;
1305 	struct uhci_td *td;
1306 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1307 	int prevactive = 0;
1308 
1309 	uhci_dec_fsbr(uhci, urb);	/* Safe since it checks */
1310 
1311 	/*
1312 	 * Now we need to find out what the last successful toggle was
1313 	 * so we can update the local data toggle for the next transfer
1314 	 *
1315 	 * There are 2 ways the last successful completed TD is found:
1316 	 *
1317 	 * 1) The TD is NOT active and the actual length < expected length
1318 	 * 2) The TD is NOT active and it's the last TD in the chain
1319 	 *
1320 	 * and a third way the first uncompleted TD is found:
1321 	 *
1322 	 * 3) The TD is active and the previous TD is NOT active
1323 	 *
1324 	 * Control and Isochronous ignore the toggle, so this is safe
1325 	 * for all types
1326 	 *
1327 	 * FIXME: The toggle fixups won't be 100% reliable until we
1328 	 * change over to using a single queue for each endpoint and
1329 	 * stop the queue before unlinking.
1330 	 */
1331 	head = &urbp->td_list;
1332 	list_for_each_entry(td, head, list) {
1333 		unsigned int ctrlstat = td_status(td);
1334 
1335 		if (!(ctrlstat & TD_CTRL_ACTIVE) &&
1336 				(uhci_actual_length(ctrlstat) <
1337 				 uhci_expected_length(td_token(td)) ||
1338 				td->list.next == head))
1339 			usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1340 				uhci_packetout(td_token(td)),
1341 				uhci_toggle(td_token(td)) ^ 1);
1342 		else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive)
1343 			usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
1344 				uhci_packetout(td_token(td)),
1345 				uhci_toggle(td_token(td)));
1346 
1347 		prevactive = ctrlstat & TD_CTRL_ACTIVE;
1348 	}
1349 
1350 	uhci_delete_queued_urb(uhci, urb);
1351 
1352 	/* The interrupt loop will reclaim the QH's */
1353 	uhci_remove_qh(uhci, urbp->qh);
1354 	urbp->qh = NULL;
1355 }
1356 
1357 static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
1358 {
1359 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1360 	unsigned long flags;
1361 	struct urb_priv *urbp;
1362 
1363 	spin_lock_irqsave(&uhci->lock, flags);
1364 	urbp = urb->hcpriv;
1365 	if (!urbp)			/* URB was never linked! */
1366 		goto done;
1367 	list_del_init(&urbp->urb_list);
1368 
1369 	uhci_unlink_generic(uhci, urb);
1370 
1371 	uhci_get_current_frame_number(uhci);
1372 	if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) {
1373 		uhci_remove_pending_urbps(uhci);
1374 		uhci->urb_remove_age = uhci->frame_number;
1375 	}
1376 
1377 	/* If we're the first, set the next interrupt bit */
1378 	if (list_empty(&uhci->urb_remove_list))
1379 		uhci_set_next_interrupt(uhci);
1380 	list_add_tail(&urbp->urb_list, &uhci->urb_remove_list);
1381 
1382 done:
1383 	spin_unlock_irqrestore(&uhci->lock, flags);
1384 	return 0;
1385 }
1386 
1387 static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb)
1388 {
1389 	struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
1390 	struct list_head *head;
1391 	struct uhci_td *td;
1392 	int count = 0;
1393 
1394 	uhci_dec_fsbr(uhci, urb);
1395 
1396 	urbp->fsbr_timeout = 1;
1397 
1398 	/*
1399 	 * Ideally we would want to fix qh->element as well, but it's
1400 	 * read/write by the HC, so that can introduce a race. It's not
1401 	 * really worth the hassle
1402 	 */
1403 
1404 	head = &urbp->td_list;
1405 	list_for_each_entry(td, head, list) {
1406 		/*
1407 		 * Make sure we don't do the last one (since it'll have the
1408 		 * TERM bit set) as well as we skip every so many TD's to
1409 		 * make sure it doesn't hog the bandwidth
1410 		 */
1411 		if (td->list.next != head && (count % DEPTH_INTERVAL) ==
1412 				(DEPTH_INTERVAL - 1))
1413 			td->link |= UHCI_PTR_DEPTH;
1414 
1415 		count++;
1416 	}
1417 
1418 	return 0;
1419 }
1420 
1421 static void uhci_free_pending_qhs(struct uhci_hcd *uhci)
1422 {
1423 	struct uhci_qh *qh, *tmp;
1424 
1425 	list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) {
1426 		list_del_init(&qh->remove_list);
1427 
1428 		uhci_free_qh(uhci, qh);
1429 	}
1430 }
1431 
1432 static void uhci_free_pending_tds(struct uhci_hcd *uhci)
1433 {
1434 	struct uhci_td *td, *tmp;
1435 
1436 	list_for_each_entry_safe(td, tmp, &uhci->td_remove_list, remove_list) {
1437 		list_del_init(&td->remove_list);
1438 
1439 		uhci_free_td(uhci, td);
1440 	}
1441 }
1442 
1443 static void
1444 uhci_finish_urb(struct usb_hcd *hcd, struct urb *urb, struct pt_regs *regs)
1445 __releases(uhci->lock)
1446 __acquires(uhci->lock)
1447 {
1448 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
1449 
1450 	uhci_destroy_urb_priv(uhci, urb);
1451 
1452 	spin_unlock(&uhci->lock);
1453 	usb_hcd_giveback_urb(hcd, urb, regs);
1454 	spin_lock(&uhci->lock);
1455 }
1456 
1457 static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs)
1458 {
1459 	struct urb_priv *urbp, *tmp;
1460 
1461 	list_for_each_entry_safe(urbp, tmp, &uhci->complete_list, urb_list) {
1462 		struct urb *urb = urbp->urb;
1463 
1464 		list_del_init(&urbp->urb_list);
1465 		uhci_finish_urb(uhci_to_hcd(uhci), urb, regs);
1466 	}
1467 }
1468 
1469 static void uhci_remove_pending_urbps(struct uhci_hcd *uhci)
1470 {
1471 
1472 	/* Splice the urb_remove_list onto the end of the complete_list */
1473 	list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev);
1474 }
1475 
1476 /* Process events in the schedule, but only in one thread at a time */
1477 static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
1478 {
1479 	struct urb_priv *urbp, *tmp;
1480 
1481 	/* Don't allow re-entrant calls */
1482 	if (uhci->scan_in_progress) {
1483 		uhci->need_rescan = 1;
1484 		return;
1485 	}
1486 	uhci->scan_in_progress = 1;
1487  rescan:
1488 	uhci->need_rescan = 0;
1489 
1490 	uhci_clear_next_interrupt(uhci);
1491 	uhci_get_current_frame_number(uhci);
1492 
1493 	if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age)
1494 		uhci_free_pending_qhs(uhci);
1495 	if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age)
1496 		uhci_free_pending_tds(uhci);
1497 	if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age)
1498 		uhci_remove_pending_urbps(uhci);
1499 
1500 	/* Walk the list of pending URBs to see which ones completed
1501 	 * (must be _safe because uhci_transfer_result() dequeues URBs) */
1502 	list_for_each_entry_safe(urbp, tmp, &uhci->urb_list, urb_list) {
1503 		struct urb *urb = urbp->urb;
1504 
1505 		/* Checks the status and does all of the magic necessary */
1506 		uhci_transfer_result(uhci, urb);
1507 	}
1508 	uhci_finish_completion(uhci, regs);
1509 
1510 	/* If the controller is stopped, we can finish these off right now */
1511 	if (uhci->is_stopped) {
1512 		uhci_free_pending_qhs(uhci);
1513 		uhci_free_pending_tds(uhci);
1514 		uhci_remove_pending_urbps(uhci);
1515 	}
1516 
1517 	if (uhci->need_rescan)
1518 		goto rescan;
1519 	uhci->scan_in_progress = 0;
1520 
1521 	if (list_empty(&uhci->urb_remove_list) &&
1522 	    list_empty(&uhci->td_remove_list) &&
1523 	    list_empty(&uhci->qh_remove_list))
1524 		uhci_clear_next_interrupt(uhci);
1525 	else
1526 		uhci_set_next_interrupt(uhci);
1527 
1528 	/* Wake up anyone waiting for an URB to complete */
1529 	wake_up_all(&uhci->waitqh);
1530 }
1531 
1532 static void check_fsbr(struct uhci_hcd *uhci)
1533 {
1534 	struct urb_priv *up;
1535 
1536 	list_for_each_entry(up, &uhci->urb_list, urb_list) {
1537 		struct urb *u = up->urb;
1538 
1539 		spin_lock(&u->lock);
1540 
1541 		/* Check if the FSBR timed out */
1542 		if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
1543 			uhci_fsbr_timeout(uhci, u);
1544 
1545 		spin_unlock(&u->lock);
1546 	}
1547 
1548 	/* Really disable FSBR */
1549 	if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
1550 		uhci->fsbrtimeout = 0;
1551 		uhci->skel_term_qh->link = UHCI_PTR_TERM;
1552 	}
1553 }
1554