xref: /linux/drivers/usb/host/uhci-hub.c (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /*
2  * Universal Host Controller Interface driver for USB.
3  *
4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
5  *
6  * (C) Copyright 1999 Linus Torvalds
7  * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
8  * (C) Copyright 1999 Randy Dunlap
9  * (C) Copyright 1999 Georg Acher, acher@in.tum.de
10  * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
11  * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
12  * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
13  */
14 
15 static __u8 root_hub_hub_des[] =
16 {
17 	0x09,			/*  __u8  bLength; */
18 	0x29,			/*  __u8  bDescriptorType; Hub-descriptor */
19 	0x02,			/*  __u8  bNbrPorts; */
20 	0x0a,			/* __u16  wHubCharacteristics; */
21 	0x00,			/*   (per-port OC, no power switching) */
22 	0x01,			/*  __u8  bPwrOn2pwrGood; 2ms */
23 	0x00,			/*  __u8  bHubContrCurrent; 0 mA */
24 	0x00,			/*  __u8  DeviceRemovable; *** 7 Ports max *** */
25 	0xff			/*  __u8  PortPwrCtrlMask; *** 7 ports max *** */
26 };
27 
28 #define	UHCI_RH_MAXCHILD	7
29 
30 /* must write as zeroes */
31 #define WZ_BITS		(USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4)
32 
33 /* status change bits:  nonzero writes will clear */
34 #define RWC_BITS	(USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC)
35 
36 /* A port that either is connected or has a changed-bit set will prevent
37  * us from AUTO_STOPPING.
38  */
39 static int any_ports_active(struct uhci_hcd *uhci)
40 {
41 	int port;
42 
43 	for (port = 0; port < uhci->rh_numports; ++port) {
44 		if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) &
45 				(USBPORTSC_CCS | RWC_BITS)) ||
46 				test_bit(port, &uhci->port_c_suspend))
47 			return 1;
48 	}
49 	return 0;
50 }
51 
52 static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf)
53 {
54 	int port;
55 
56 	*buf = 0;
57 	for (port = 0; port < uhci->rh_numports; ++port) {
58 		if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & RWC_BITS) ||
59 				test_bit(port, &uhci->port_c_suspend))
60 			*buf |= (1 << (port + 1));
61 	}
62 	return !!*buf;
63 }
64 
65 #define OK(x)			len = (x); break
66 
67 #define CLR_RH_PORTSTAT(x) \
68 	status = inw(port_addr); \
69 	status &= ~(RWC_BITS|WZ_BITS); \
70 	status &= ~(x); \
71 	status |= RWC_BITS & (x); \
72 	outw(status, port_addr)
73 
74 #define SET_RH_PORTSTAT(x) \
75 	status = inw(port_addr); \
76 	status |= (x); \
77 	status &= ~(RWC_BITS|WZ_BITS); \
78 	outw(status, port_addr)
79 
80 /* UHCI controllers don't automatically stop resume signalling after 20 msec,
81  * so we have to poll and check timeouts in order to take care of it.
82  */
83 static void uhci_finish_suspend(struct uhci_hcd *uhci, int port,
84 		unsigned long port_addr)
85 {
86 	int status;
87 
88 	if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) {
89 		CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD);
90 		if (test_bit(port, &uhci->resuming_ports))
91 			set_bit(port, &uhci->port_c_suspend);
92 
93 		/* The controller won't actually turn off the RD bit until
94 		 * it has had a chance to send a low-speed EOP sequence,
95 		 * which takes 3 bit times (= 2 microseconds).  We'll delay
96 		 * slightly longer for good luck. */
97 		udelay(4);
98 	}
99 	clear_bit(port, &uhci->resuming_ports);
100 }
101 
102 /* Wait for the UHCI controller in HP's iLO2 server management chip.
103  * It can take up to 250 us to finish a reset and set the CSC bit.
104  */
105 static void wait_for_HP(unsigned long port_addr)
106 {
107 	int i;
108 
109 	for (i = 10; i < 250; i += 10) {
110 		if (inw(port_addr) & USBPORTSC_CSC)
111 			return;
112 		udelay(10);
113 	}
114 	/* Log a warning? */
115 }
116 
117 static void uhci_check_ports(struct uhci_hcd *uhci)
118 {
119 	unsigned int port;
120 	unsigned long port_addr;
121 	int status;
122 
123 	for (port = 0; port < uhci->rh_numports; ++port) {
124 		port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
125 		status = inw(port_addr);
126 		if (unlikely(status & USBPORTSC_PR)) {
127 			if (time_after_eq(jiffies, uhci->ports_timeout)) {
128 				CLR_RH_PORTSTAT(USBPORTSC_PR);
129 				udelay(10);
130 
131 				/* HP's server management chip requires
132 				 * a longer delay. */
133 				if (to_pci_dev(uhci_dev(uhci))->vendor ==
134 						PCI_VENDOR_ID_HP)
135 					wait_for_HP(port_addr);
136 
137 				/* If the port was enabled before, turning
138 				 * reset on caused a port enable change.
139 				 * Turning reset off causes a port connect
140 				 * status change.  Clear these changes. */
141 				CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC);
142 				SET_RH_PORTSTAT(USBPORTSC_PE);
143 			}
144 		}
145 		if (unlikely(status & USBPORTSC_RD)) {
146 			if (!test_bit(port, &uhci->resuming_ports)) {
147 
148 				/* Port received a wakeup request */
149 				set_bit(port, &uhci->resuming_ports);
150 				uhci->ports_timeout = jiffies +
151 						msecs_to_jiffies(20);
152 
153 				/* Make sure we see the port again
154 				 * after the resuming period is over. */
155 				mod_timer(&uhci_to_hcd(uhci)->rh_timer,
156 						uhci->ports_timeout);
157 			} else if (time_after_eq(jiffies,
158 						uhci->ports_timeout)) {
159 				uhci_finish_suspend(uhci, port, port_addr);
160 			}
161 		}
162 	}
163 }
164 
165 static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf)
166 {
167 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
168 	unsigned long flags;
169 	int status = 0;
170 
171 	spin_lock_irqsave(&uhci->lock, flags);
172 
173 	uhci_scan_schedule(uhci, NULL);
174 	if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
175 		goto done;
176 	uhci_check_ports(uhci);
177 
178 	status = get_hub_status_data(uhci, buf);
179 
180 	switch (uhci->rh_state) {
181 	    case UHCI_RH_SUSPENDING:
182 	    case UHCI_RH_SUSPENDED:
183 		/* if port change, ask to be resumed */
184 		if (status)
185 			usb_hcd_resume_root_hub(hcd);
186 		break;
187 
188 	    case UHCI_RH_AUTO_STOPPED:
189 		/* if port change, auto start */
190 		if (status)
191 			wakeup_rh(uhci);
192 		break;
193 
194 	    case UHCI_RH_RUNNING:
195 		/* are any devices attached? */
196 		if (!any_ports_active(uhci)) {
197 			uhci->rh_state = UHCI_RH_RUNNING_NODEVS;
198 			uhci->auto_stop_time = jiffies + HZ;
199 		}
200 		break;
201 
202 	    case UHCI_RH_RUNNING_NODEVS:
203 		/* auto-stop if nothing connected for 1 second */
204 		if (any_ports_active(uhci))
205 			uhci->rh_state = UHCI_RH_RUNNING;
206 		else if (time_after_eq(jiffies, uhci->auto_stop_time))
207 			suspend_rh(uhci, UHCI_RH_AUTO_STOPPED);
208 		break;
209 
210 	    default:
211 		break;
212 	}
213 
214 done:
215 	spin_unlock_irqrestore(&uhci->lock, flags);
216 	return status;
217 }
218 
219 /* size of returned buffer is part of USB spec */
220 static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
221 			u16 wIndex, char *buf, u16 wLength)
222 {
223 	struct uhci_hcd *uhci = hcd_to_uhci(hcd);
224 	int status, lstatus, retval = 0, len = 0;
225 	unsigned int port = wIndex - 1;
226 	unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port;
227 	u16 wPortChange, wPortStatus;
228 	unsigned long flags;
229 
230 	if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead)
231 		return -ETIMEDOUT;
232 
233 	spin_lock_irqsave(&uhci->lock, flags);
234 	switch (typeReq) {
235 
236 	case GetHubStatus:
237 		*(__le32 *)buf = cpu_to_le32(0);
238 		OK(4);		/* hub power */
239 	case GetPortStatus:
240 		if (port >= uhci->rh_numports)
241 			goto err;
242 
243 		uhci_check_ports(uhci);
244 		status = inw(port_addr);
245 
246 		/* Intel controllers report the OverCurrent bit active on.
247 		 * VIA controllers report it active off, so we'll adjust the
248 		 * bit value.  (It's not standardized in the UHCI spec.)
249 		 */
250 		if (to_pci_dev(hcd->self.controller)->vendor ==
251 				PCI_VENDOR_ID_VIA)
252 			status ^= USBPORTSC_OC;
253 
254 		/* UHCI doesn't support C_RESET (always false) */
255 		wPortChange = lstatus = 0;
256 		if (status & USBPORTSC_CSC)
257 			wPortChange |= USB_PORT_STAT_C_CONNECTION;
258 		if (status & USBPORTSC_PEC)
259 			wPortChange |= USB_PORT_STAT_C_ENABLE;
260 		if (status & USBPORTSC_OCC)
261 			wPortChange |= USB_PORT_STAT_C_OVERCURRENT;
262 
263 		if (test_bit(port, &uhci->port_c_suspend)) {
264 			wPortChange |= USB_PORT_STAT_C_SUSPEND;
265 			lstatus |= 1;
266 		}
267 		if (test_bit(port, &uhci->resuming_ports))
268 			lstatus |= 4;
269 
270 		/* UHCI has no power switching (always on) */
271 		wPortStatus = USB_PORT_STAT_POWER;
272 		if (status & USBPORTSC_CCS)
273 			wPortStatus |= USB_PORT_STAT_CONNECTION;
274 		if (status & USBPORTSC_PE) {
275 			wPortStatus |= USB_PORT_STAT_ENABLE;
276 			if (status & (USBPORTSC_SUSP | USBPORTSC_RD))
277 				wPortStatus |= USB_PORT_STAT_SUSPEND;
278 		}
279 		if (status & USBPORTSC_OC)
280 			wPortStatus |= USB_PORT_STAT_OVERCURRENT;
281 		if (status & USBPORTSC_PR)
282 			wPortStatus |= USB_PORT_STAT_RESET;
283 		if (status & USBPORTSC_LSDA)
284 			wPortStatus |= USB_PORT_STAT_LOW_SPEED;
285 
286 		if (wPortChange)
287 			dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n",
288 					wIndex, status, lstatus);
289 
290 		*(__le16 *)buf = cpu_to_le16(wPortStatus);
291 		*(__le16 *)(buf + 2) = cpu_to_le16(wPortChange);
292 		OK(4);
293 	case SetHubFeature:		/* We don't implement these */
294 	case ClearHubFeature:
295 		switch (wValue) {
296 		case C_HUB_OVER_CURRENT:
297 		case C_HUB_LOCAL_POWER:
298 			OK(0);
299 		default:
300 			goto err;
301 		}
302 		break;
303 	case SetPortFeature:
304 		if (port >= uhci->rh_numports)
305 			goto err;
306 
307 		switch (wValue) {
308 		case USB_PORT_FEAT_SUSPEND:
309 			SET_RH_PORTSTAT(USBPORTSC_SUSP);
310 			OK(0);
311 		case USB_PORT_FEAT_RESET:
312 			SET_RH_PORTSTAT(USBPORTSC_PR);
313 
314 			/* Reset terminates Resume signalling */
315 			uhci_finish_suspend(uhci, port, port_addr);
316 
317 			/* USB v2.0 7.1.7.5 */
318 			uhci->ports_timeout = jiffies + msecs_to_jiffies(50);
319 			OK(0);
320 		case USB_PORT_FEAT_POWER:
321 			/* UHCI has no power switching */
322 			OK(0);
323 		default:
324 			goto err;
325 		}
326 		break;
327 	case ClearPortFeature:
328 		if (port >= uhci->rh_numports)
329 			goto err;
330 
331 		switch (wValue) {
332 		case USB_PORT_FEAT_ENABLE:
333 			CLR_RH_PORTSTAT(USBPORTSC_PE);
334 
335 			/* Disable terminates Resume signalling */
336 			uhci_finish_suspend(uhci, port, port_addr);
337 			OK(0);
338 		case USB_PORT_FEAT_C_ENABLE:
339 			CLR_RH_PORTSTAT(USBPORTSC_PEC);
340 			OK(0);
341 		case USB_PORT_FEAT_SUSPEND:
342 			if (!(inw(port_addr) & USBPORTSC_SUSP)) {
343 
344 				/* Make certain the port isn't suspended */
345 				uhci_finish_suspend(uhci, port, port_addr);
346 			} else if (!test_and_set_bit(port,
347 						&uhci->resuming_ports)) {
348 				SET_RH_PORTSTAT(USBPORTSC_RD);
349 
350 				/* The controller won't allow RD to be set
351 				 * if the port is disabled.  When this happens
352 				 * just skip the Resume signalling.
353 				 */
354 				if (!(inw(port_addr) & USBPORTSC_RD))
355 					uhci_finish_suspend(uhci, port,
356 							port_addr);
357 				else
358 					/* USB v2.0 7.1.7.7 */
359 					uhci->ports_timeout = jiffies +
360 						msecs_to_jiffies(20);
361 			}
362 			OK(0);
363 		case USB_PORT_FEAT_C_SUSPEND:
364 			clear_bit(port, &uhci->port_c_suspend);
365 			OK(0);
366 		case USB_PORT_FEAT_POWER:
367 			/* UHCI has no power switching */
368 			goto err;
369 		case USB_PORT_FEAT_C_CONNECTION:
370 			CLR_RH_PORTSTAT(USBPORTSC_CSC);
371 			OK(0);
372 		case USB_PORT_FEAT_C_OVER_CURRENT:
373 			CLR_RH_PORTSTAT(USBPORTSC_OCC);
374 			OK(0);
375 		case USB_PORT_FEAT_C_RESET:
376 			/* this driver won't report these */
377 			OK(0);
378 		default:
379 			goto err;
380 		}
381 		break;
382 	case GetHubDescriptor:
383 		len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
384 		memcpy(buf, root_hub_hub_des, len);
385 		if (len > 2)
386 			buf[2] = uhci->rh_numports;
387 		OK(len);
388 	default:
389 err:
390 		retval = -EPIPE;
391 	}
392 	spin_unlock_irqrestore(&uhci->lock, flags);
393 
394 	return retval;
395 }
396