1 /* 2 * Universal Host Controller Interface driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * (C) Copyright 1999 Linus Torvalds 7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com 8 * (C) Copyright 1999 Randy Dunlap 9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de 10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de 11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch 12 * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu 13 */ 14 15 static __u8 root_hub_hub_des[] = 16 { 17 0x09, /* __u8 bLength; */ 18 0x29, /* __u8 bDescriptorType; Hub-descriptor */ 19 0x02, /* __u8 bNbrPorts; */ 20 0x0a, /* __u16 wHubCharacteristics; */ 21 0x00, /* (per-port OC, no power switching) */ 22 0x01, /* __u8 bPwrOn2pwrGood; 2ms */ 23 0x00, /* __u8 bHubContrCurrent; 0 mA */ 24 0x00, /* __u8 DeviceRemovable; *** 7 Ports max *** */ 25 0xff /* __u8 PortPwrCtrlMask; *** 7 ports max *** */ 26 }; 27 28 #define UHCI_RH_MAXCHILD 7 29 30 /* must write as zeroes */ 31 #define WZ_BITS (USBPORTSC_RES2 | USBPORTSC_RES3 | USBPORTSC_RES4) 32 33 /* status change bits: nonzero writes will clear */ 34 #define RWC_BITS (USBPORTSC_OCC | USBPORTSC_PEC | USBPORTSC_CSC) 35 36 /* A port that either is connected or has a changed-bit set will prevent 37 * us from AUTO_STOPPING. 38 */ 39 static int any_ports_active(struct uhci_hcd *uhci) 40 { 41 int port; 42 43 for (port = 0; port < uhci->rh_numports; ++port) { 44 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & 45 (USBPORTSC_CCS | RWC_BITS)) || 46 test_bit(port, &uhci->port_c_suspend)) 47 return 1; 48 } 49 return 0; 50 } 51 52 static inline int get_hub_status_data(struct uhci_hcd *uhci, char *buf) 53 { 54 int port; 55 int mask = RWC_BITS; 56 57 /* Some boards (both VIA and Intel apparently) report bogus 58 * overcurrent indications, causing massive log spam unless 59 * we completely ignore them. This doesn't seem to be a problem 60 * with the chipset so much as with the way it is connected on 61 * the motherboard; if the overcurrent input is left to float 62 * then it may constantly register false positives. */ 63 if (ignore_oc) 64 mask &= ~USBPORTSC_OCC; 65 66 *buf = 0; 67 for (port = 0; port < uhci->rh_numports; ++port) { 68 if ((inw(uhci->io_addr + USBPORTSC1 + port * 2) & mask) || 69 test_bit(port, &uhci->port_c_suspend)) 70 *buf |= (1 << (port + 1)); 71 } 72 return !!*buf; 73 } 74 75 #define OK(x) len = (x); break 76 77 #define CLR_RH_PORTSTAT(x) \ 78 status = inw(port_addr); \ 79 status &= ~(RWC_BITS|WZ_BITS); \ 80 status &= ~(x); \ 81 status |= RWC_BITS & (x); \ 82 outw(status, port_addr) 83 84 #define SET_RH_PORTSTAT(x) \ 85 status = inw(port_addr); \ 86 status |= (x); \ 87 status &= ~(RWC_BITS|WZ_BITS); \ 88 outw(status, port_addr) 89 90 /* UHCI controllers don't automatically stop resume signalling after 20 msec, 91 * so we have to poll and check timeouts in order to take care of it. 92 */ 93 static void uhci_finish_suspend(struct uhci_hcd *uhci, int port, 94 unsigned long port_addr) 95 { 96 int status; 97 int i; 98 99 if (inw(port_addr) & (USBPORTSC_SUSP | USBPORTSC_RD)) { 100 CLR_RH_PORTSTAT(USBPORTSC_SUSP | USBPORTSC_RD); 101 if (test_bit(port, &uhci->resuming_ports)) 102 set_bit(port, &uhci->port_c_suspend); 103 104 /* The controller won't actually turn off the RD bit until 105 * it has had a chance to send a low-speed EOP sequence, 106 * which is supposed to take 3 bit times (= 2 microseconds). 107 * Experiments show that some controllers take longer, so 108 * we'll poll for completion. */ 109 for (i = 0; i < 10; ++i) { 110 if (!(inw(port_addr) & USBPORTSC_RD)) 111 break; 112 udelay(1); 113 } 114 } 115 clear_bit(port, &uhci->resuming_ports); 116 } 117 118 /* Wait for the UHCI controller in HP's iLO2 server management chip. 119 * It can take up to 250 us to finish a reset and set the CSC bit. 120 */ 121 static void wait_for_HP(unsigned long port_addr) 122 { 123 int i; 124 125 for (i = 10; i < 250; i += 10) { 126 if (inw(port_addr) & USBPORTSC_CSC) 127 return; 128 udelay(10); 129 } 130 /* Log a warning? */ 131 } 132 133 static void uhci_check_ports(struct uhci_hcd *uhci) 134 { 135 unsigned int port; 136 unsigned long port_addr; 137 int status; 138 139 for (port = 0; port < uhci->rh_numports; ++port) { 140 port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 141 status = inw(port_addr); 142 if (unlikely(status & USBPORTSC_PR)) { 143 if (time_after_eq(jiffies, uhci->ports_timeout)) { 144 CLR_RH_PORTSTAT(USBPORTSC_PR); 145 udelay(10); 146 147 /* HP's server management chip requires 148 * a longer delay. */ 149 if (to_pci_dev(uhci_dev(uhci))->vendor == 150 PCI_VENDOR_ID_HP) 151 wait_for_HP(port_addr); 152 153 /* If the port was enabled before, turning 154 * reset on caused a port enable change. 155 * Turning reset off causes a port connect 156 * status change. Clear these changes. */ 157 CLR_RH_PORTSTAT(USBPORTSC_CSC | USBPORTSC_PEC); 158 SET_RH_PORTSTAT(USBPORTSC_PE); 159 } 160 } 161 if (unlikely(status & USBPORTSC_RD)) { 162 if (!test_bit(port, &uhci->resuming_ports)) { 163 164 /* Port received a wakeup request */ 165 set_bit(port, &uhci->resuming_ports); 166 uhci->ports_timeout = jiffies + 167 msecs_to_jiffies(20); 168 169 /* Make sure we see the port again 170 * after the resuming period is over. */ 171 mod_timer(&uhci_to_hcd(uhci)->rh_timer, 172 uhci->ports_timeout); 173 } else if (time_after_eq(jiffies, 174 uhci->ports_timeout)) { 175 uhci_finish_suspend(uhci, port, port_addr); 176 } 177 } 178 } 179 } 180 181 static int uhci_hub_status_data(struct usb_hcd *hcd, char *buf) 182 { 183 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 184 unsigned long flags; 185 int status = 0; 186 187 spin_lock_irqsave(&uhci->lock, flags); 188 189 uhci_scan_schedule(uhci); 190 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) 191 goto done; 192 uhci_check_ports(uhci); 193 194 status = get_hub_status_data(uhci, buf); 195 196 switch (uhci->rh_state) { 197 case UHCI_RH_SUSPENDING: 198 case UHCI_RH_SUSPENDED: 199 /* if port change, ask to be resumed */ 200 if (status) 201 usb_hcd_resume_root_hub(hcd); 202 break; 203 204 case UHCI_RH_AUTO_STOPPED: 205 /* if port change, auto start */ 206 if (status) 207 wakeup_rh(uhci); 208 break; 209 210 case UHCI_RH_RUNNING: 211 /* are any devices attached? */ 212 if (!any_ports_active(uhci)) { 213 uhci->rh_state = UHCI_RH_RUNNING_NODEVS; 214 uhci->auto_stop_time = jiffies + HZ; 215 } 216 break; 217 218 case UHCI_RH_RUNNING_NODEVS: 219 /* auto-stop if nothing connected for 1 second */ 220 if (any_ports_active(uhci)) 221 uhci->rh_state = UHCI_RH_RUNNING; 222 else if (time_after_eq(jiffies, uhci->auto_stop_time)) 223 suspend_rh(uhci, UHCI_RH_AUTO_STOPPED); 224 break; 225 226 default: 227 break; 228 } 229 230 done: 231 spin_unlock_irqrestore(&uhci->lock, flags); 232 return status; 233 } 234 235 /* size of returned buffer is part of USB spec */ 236 static int uhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 237 u16 wIndex, char *buf, u16 wLength) 238 { 239 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 240 int status, lstatus, retval = 0, len = 0; 241 unsigned int port = wIndex - 1; 242 unsigned long port_addr = uhci->io_addr + USBPORTSC1 + 2 * port; 243 u16 wPortChange, wPortStatus; 244 unsigned long flags; 245 246 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) 247 return -ETIMEDOUT; 248 249 spin_lock_irqsave(&uhci->lock, flags); 250 switch (typeReq) { 251 252 case GetHubStatus: 253 *(__le32 *)buf = cpu_to_le32(0); 254 OK(4); /* hub power */ 255 case GetPortStatus: 256 if (port >= uhci->rh_numports) 257 goto err; 258 259 uhci_check_ports(uhci); 260 status = inw(port_addr); 261 262 /* Intel controllers report the OverCurrent bit active on. 263 * VIA controllers report it active off, so we'll adjust the 264 * bit value. (It's not standardized in the UHCI spec.) 265 */ 266 if (to_pci_dev(hcd->self.controller)->vendor == 267 PCI_VENDOR_ID_VIA) 268 status ^= USBPORTSC_OC; 269 270 /* UHCI doesn't support C_RESET (always false) */ 271 wPortChange = lstatus = 0; 272 if (status & USBPORTSC_CSC) 273 wPortChange |= USB_PORT_STAT_C_CONNECTION; 274 if (status & USBPORTSC_PEC) 275 wPortChange |= USB_PORT_STAT_C_ENABLE; 276 if ((status & USBPORTSC_OCC) && !ignore_oc) 277 wPortChange |= USB_PORT_STAT_C_OVERCURRENT; 278 279 if (test_bit(port, &uhci->port_c_suspend)) { 280 wPortChange |= USB_PORT_STAT_C_SUSPEND; 281 lstatus |= 1; 282 } 283 if (test_bit(port, &uhci->resuming_ports)) 284 lstatus |= 4; 285 286 /* UHCI has no power switching (always on) */ 287 wPortStatus = USB_PORT_STAT_POWER; 288 if (status & USBPORTSC_CCS) 289 wPortStatus |= USB_PORT_STAT_CONNECTION; 290 if (status & USBPORTSC_PE) { 291 wPortStatus |= USB_PORT_STAT_ENABLE; 292 if (status & (USBPORTSC_SUSP | USBPORTSC_RD)) 293 wPortStatus |= USB_PORT_STAT_SUSPEND; 294 } 295 if (status & USBPORTSC_OC) 296 wPortStatus |= USB_PORT_STAT_OVERCURRENT; 297 if (status & USBPORTSC_PR) 298 wPortStatus |= USB_PORT_STAT_RESET; 299 if (status & USBPORTSC_LSDA) 300 wPortStatus |= USB_PORT_STAT_LOW_SPEED; 301 302 if (wPortChange) 303 dev_dbg(uhci_dev(uhci), "port %d portsc %04x,%02x\n", 304 wIndex, status, lstatus); 305 306 *(__le16 *)buf = cpu_to_le16(wPortStatus); 307 *(__le16 *)(buf + 2) = cpu_to_le16(wPortChange); 308 OK(4); 309 case SetHubFeature: /* We don't implement these */ 310 case ClearHubFeature: 311 switch (wValue) { 312 case C_HUB_OVER_CURRENT: 313 case C_HUB_LOCAL_POWER: 314 OK(0); 315 default: 316 goto err; 317 } 318 break; 319 case SetPortFeature: 320 if (port >= uhci->rh_numports) 321 goto err; 322 323 switch (wValue) { 324 case USB_PORT_FEAT_SUSPEND: 325 SET_RH_PORTSTAT(USBPORTSC_SUSP); 326 OK(0); 327 case USB_PORT_FEAT_RESET: 328 SET_RH_PORTSTAT(USBPORTSC_PR); 329 330 /* Reset terminates Resume signalling */ 331 uhci_finish_suspend(uhci, port, port_addr); 332 333 /* USB v2.0 7.1.7.5 */ 334 uhci->ports_timeout = jiffies + msecs_to_jiffies(50); 335 OK(0); 336 case USB_PORT_FEAT_POWER: 337 /* UHCI has no power switching */ 338 OK(0); 339 default: 340 goto err; 341 } 342 break; 343 case ClearPortFeature: 344 if (port >= uhci->rh_numports) 345 goto err; 346 347 switch (wValue) { 348 case USB_PORT_FEAT_ENABLE: 349 CLR_RH_PORTSTAT(USBPORTSC_PE); 350 351 /* Disable terminates Resume signalling */ 352 uhci_finish_suspend(uhci, port, port_addr); 353 OK(0); 354 case USB_PORT_FEAT_C_ENABLE: 355 CLR_RH_PORTSTAT(USBPORTSC_PEC); 356 OK(0); 357 case USB_PORT_FEAT_SUSPEND: 358 if (!(inw(port_addr) & USBPORTSC_SUSP)) { 359 360 /* Make certain the port isn't suspended */ 361 uhci_finish_suspend(uhci, port, port_addr); 362 } else if (!test_and_set_bit(port, 363 &uhci->resuming_ports)) { 364 SET_RH_PORTSTAT(USBPORTSC_RD); 365 366 /* The controller won't allow RD to be set 367 * if the port is disabled. When this happens 368 * just skip the Resume signalling. 369 */ 370 if (!(inw(port_addr) & USBPORTSC_RD)) 371 uhci_finish_suspend(uhci, port, 372 port_addr); 373 else 374 /* USB v2.0 7.1.7.7 */ 375 uhci->ports_timeout = jiffies + 376 msecs_to_jiffies(20); 377 } 378 OK(0); 379 case USB_PORT_FEAT_C_SUSPEND: 380 clear_bit(port, &uhci->port_c_suspend); 381 OK(0); 382 case USB_PORT_FEAT_POWER: 383 /* UHCI has no power switching */ 384 goto err; 385 case USB_PORT_FEAT_C_CONNECTION: 386 CLR_RH_PORTSTAT(USBPORTSC_CSC); 387 OK(0); 388 case USB_PORT_FEAT_C_OVER_CURRENT: 389 CLR_RH_PORTSTAT(USBPORTSC_OCC); 390 OK(0); 391 case USB_PORT_FEAT_C_RESET: 392 /* this driver won't report these */ 393 OK(0); 394 default: 395 goto err; 396 } 397 break; 398 case GetHubDescriptor: 399 len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength); 400 memcpy(buf, root_hub_hub_des, len); 401 if (len > 2) 402 buf[2] = uhci->rh_numports; 403 OK(len); 404 default: 405 err: 406 retval = -EPIPE; 407 } 408 spin_unlock_irqrestore(&uhci->lock, flags); 409 410 return retval; 411 } 412