1 /* 2 * Universal Host Controller Interface driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * (C) Copyright 1999 Linus Torvalds 7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com 8 * (C) Copyright 1999 Randy Dunlap 9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de 10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de 11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch 12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at 13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface 14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). 15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) 16 * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu 17 * 18 * Intel documents this fairly well, and as far as I know there 19 * are no royalties or anything like that, but even so there are 20 * people who decided that they want to do the same thing in a 21 * completely different way. 22 * 23 */ 24 25 #include <linux/module.h> 26 #include <linux/pci.h> 27 #include <linux/kernel.h> 28 #include <linux/init.h> 29 #include <linux/delay.h> 30 #include <linux/ioport.h> 31 #include <linux/sched.h> 32 #include <linux/slab.h> 33 #include <linux/errno.h> 34 #include <linux/unistd.h> 35 #include <linux/interrupt.h> 36 #include <linux/spinlock.h> 37 #include <linux/debugfs.h> 38 #include <linux/pm.h> 39 #include <linux/dmapool.h> 40 #include <linux/dma-mapping.h> 41 #include <linux/usb.h> 42 #include <linux/bitops.h> 43 #include <linux/dmi.h> 44 45 #include <asm/uaccess.h> 46 #include <asm/io.h> 47 #include <asm/irq.h> 48 #include <asm/system.h> 49 50 #include "../core/hcd.h" 51 #include "uhci-hcd.h" 52 #include "pci-quirks.h" 53 54 /* 55 * Version Information 56 */ 57 #define DRIVER_VERSION "v3.0" 58 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 59 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 60 Alan Stern" 61 #define DRIVER_DESC "USB Universal Host Controller Interface driver" 62 63 /* for flakey hardware, ignore overcurrent indicators */ 64 static int ignore_oc; 65 module_param(ignore_oc, bool, S_IRUGO); 66 MODULE_PARM_DESC(ignore_oc, "ignore hardware overcurrent indications"); 67 68 /* 69 * debug = 0, no debugging messages 70 * debug = 1, dump failed URBs except for stalls 71 * debug = 2, dump all failed URBs (including stalls) 72 * show all queues in /debug/uhci/[pci_addr] 73 * debug = 3, show all TDs in URBs when dumping 74 */ 75 #ifdef DEBUG 76 #define DEBUG_CONFIGURED 1 77 static int debug = 1; 78 module_param(debug, int, S_IRUGO | S_IWUSR); 79 MODULE_PARM_DESC(debug, "Debug level"); 80 81 #else 82 #define DEBUG_CONFIGURED 0 83 #define debug 0 84 #endif 85 86 static char *errbuf; 87 #define ERRBUF_LEN (32 * 1024) 88 89 static struct kmem_cache *uhci_up_cachep; /* urb_priv */ 90 91 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); 92 static void wakeup_rh(struct uhci_hcd *uhci); 93 static void uhci_get_current_frame_number(struct uhci_hcd *uhci); 94 95 /* 96 * Calculate the link pointer DMA value for the first Skeleton QH in a frame. 97 */ 98 static __le32 uhci_frame_skel_link(struct uhci_hcd *uhci, int frame) 99 { 100 int skelnum; 101 102 /* 103 * The interrupt queues will be interleaved as evenly as possible. 104 * There's not much to be done about period-1 interrupts; they have 105 * to occur in every frame. But we can schedule period-2 interrupts 106 * in odd-numbered frames, period-4 interrupts in frames congruent 107 * to 2 (mod 4), and so on. This way each frame only has two 108 * interrupt QHs, which will help spread out bandwidth utilization. 109 * 110 * ffs (Find First bit Set) does exactly what we need: 111 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[8], 112 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[7], etc. 113 * ffs >= 7 => not on any high-period queue, so use 114 * skel_int1_qh = skelqh[9]. 115 * Add in UHCI_NUMFRAMES to insure at least one bit is set. 116 */ 117 skelnum = 8 - (int) __ffs(frame | UHCI_NUMFRAMES); 118 if (skelnum <= 1) 119 skelnum = 9; 120 return UHCI_PTR_QH | cpu_to_le32(uhci->skelqh[skelnum]->dma_handle); 121 } 122 123 #include "uhci-debug.c" 124 #include "uhci-q.c" 125 #include "uhci-hub.c" 126 127 /* 128 * Finish up a host controller reset and update the recorded state. 129 */ 130 static void finish_reset(struct uhci_hcd *uhci) 131 { 132 int port; 133 134 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect 135 * bits in the port status and control registers. 136 * We have to clear them by hand. 137 */ 138 for (port = 0; port < uhci->rh_numports; ++port) 139 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 140 141 uhci->port_c_suspend = uhci->resuming_ports = 0; 142 uhci->rh_state = UHCI_RH_RESET; 143 uhci->is_stopped = UHCI_IS_STOPPED; 144 uhci_to_hcd(uhci)->state = HC_STATE_HALT; 145 uhci_to_hcd(uhci)->poll_rh = 0; 146 147 uhci->dead = 0; /* Full reset resurrects the controller */ 148 } 149 150 /* 151 * Last rites for a defunct/nonfunctional controller 152 * or one we don't want to use any more. 153 */ 154 static void uhci_hc_died(struct uhci_hcd *uhci) 155 { 156 uhci_get_current_frame_number(uhci); 157 uhci_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr); 158 finish_reset(uhci); 159 uhci->dead = 1; 160 161 /* The current frame may already be partway finished */ 162 ++uhci->frame_number; 163 } 164 165 /* 166 * Initialize a controller that was newly discovered or has lost power 167 * or otherwise been reset while it was suspended. In none of these cases 168 * can we be sure of its previous state. 169 */ 170 static void check_and_reset_hc(struct uhci_hcd *uhci) 171 { 172 if (uhci_check_and_reset_hc(to_pci_dev(uhci_dev(uhci)), uhci->io_addr)) 173 finish_reset(uhci); 174 } 175 176 /* 177 * Store the basic register settings needed by the controller. 178 */ 179 static void configure_hc(struct uhci_hcd *uhci) 180 { 181 /* Set the frame length to the default: 1 ms exactly */ 182 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 183 184 /* Store the frame list base address */ 185 outl(uhci->frame_dma_handle, uhci->io_addr + USBFLBASEADD); 186 187 /* Set the current frame number */ 188 outw(uhci->frame_number & UHCI_MAX_SOF_NUMBER, 189 uhci->io_addr + USBFRNUM); 190 191 /* Mark controller as not halted before we enable interrupts */ 192 uhci_to_hcd(uhci)->state = HC_STATE_SUSPENDED; 193 mb(); 194 195 /* Enable PIRQ */ 196 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 197 USBLEGSUP_DEFAULT); 198 } 199 200 201 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 202 { 203 int port; 204 205 /* If we have to ignore overcurrent events then almost by definition 206 * we can't depend on resume-detect interrupts. */ 207 if (ignore_oc) 208 return 1; 209 210 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 211 default: 212 break; 213 214 case PCI_VENDOR_ID_GENESYS: 215 /* Genesys Logic's GL880S controllers don't generate 216 * resume-detect interrupts. 217 */ 218 return 1; 219 220 case PCI_VENDOR_ID_INTEL: 221 /* Some of Intel's USB controllers have a bug that causes 222 * resume-detect interrupts if any port has an over-current 223 * condition. To make matters worse, some motherboards 224 * hardwire unused USB ports' over-current inputs active! 225 * To prevent problems, we will not enable resume-detect 226 * interrupts if any ports are OC. 227 */ 228 for (port = 0; port < uhci->rh_numports; ++port) { 229 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 230 USBPORTSC_OC) 231 return 1; 232 } 233 break; 234 } 235 return 0; 236 } 237 238 static int remote_wakeup_is_broken(struct uhci_hcd *uhci) 239 { 240 int port; 241 char *sys_info; 242 static char bad_Asus_board[] = "A7V8X"; 243 244 /* One of Asus's motherboards has a bug which causes it to 245 * wake up immediately from suspend-to-RAM if any of the ports 246 * are connected. In such cases we will not set EGSM. 247 */ 248 sys_info = dmi_get_system_info(DMI_BOARD_NAME); 249 if (sys_info && !strcmp(sys_info, bad_Asus_board)) { 250 for (port = 0; port < uhci->rh_numports; ++port) { 251 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 252 USBPORTSC_CCS) 253 return 1; 254 } 255 } 256 257 return 0; 258 } 259 260 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 261 __releases(uhci->lock) 262 __acquires(uhci->lock) 263 { 264 int auto_stop; 265 int int_enable, egsm_enable; 266 267 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); 268 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, 269 "%s%s\n", __FUNCTION__, 270 (auto_stop ? " (auto-stop)" : "")); 271 272 /* If we get a suspend request when we're already auto-stopped 273 * then there's nothing to do. 274 */ 275 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) { 276 uhci->rh_state = new_state; 277 return; 278 } 279 280 /* Enable resume-detect interrupts if they work. 281 * Then enter Global Suspend mode if _it_ works, still configured. 282 */ 283 egsm_enable = USBCMD_EGSM; 284 uhci->working_RD = 1; 285 int_enable = USBINTR_RESUME; 286 if (remote_wakeup_is_broken(uhci)) 287 egsm_enable = 0; 288 if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable || 289 !device_may_wakeup( 290 &uhci_to_hcd(uhci)->self.root_hub->dev)) 291 uhci->working_RD = int_enable = 0; 292 293 outw(int_enable, uhci->io_addr + USBINTR); 294 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); 295 mb(); 296 udelay(5); 297 298 /* If we're auto-stopping then no devices have been attached 299 * for a while, so there shouldn't be any active URBs and the 300 * controller should stop after a few microseconds. Otherwise 301 * we will give the controller one frame to stop. 302 */ 303 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 304 uhci->rh_state = UHCI_RH_SUSPENDING; 305 spin_unlock_irq(&uhci->lock); 306 msleep(1); 307 spin_lock_irq(&uhci->lock); 308 if (uhci->dead) 309 return; 310 } 311 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 312 dev_warn(&uhci_to_hcd(uhci)->self.root_hub->dev, 313 "Controller not stopped yet!\n"); 314 315 uhci_get_current_frame_number(uhci); 316 317 uhci->rh_state = new_state; 318 uhci->is_stopped = UHCI_IS_STOPPED; 319 uhci_to_hcd(uhci)->poll_rh = !int_enable; 320 321 uhci_scan_schedule(uhci); 322 uhci_fsbr_off(uhci); 323 } 324 325 static void start_rh(struct uhci_hcd *uhci) 326 { 327 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 328 uhci->is_stopped = 0; 329 330 /* Mark it configured and running with a 64-byte max packet. 331 * All interrupts are enabled, even though RESUME won't do anything. 332 */ 333 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 334 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 335 uhci->io_addr + USBINTR); 336 mb(); 337 uhci->rh_state = UHCI_RH_RUNNING; 338 uhci_to_hcd(uhci)->poll_rh = 1; 339 } 340 341 static void wakeup_rh(struct uhci_hcd *uhci) 342 __releases(uhci->lock) 343 __acquires(uhci->lock) 344 { 345 dev_dbg(&uhci_to_hcd(uhci)->self.root_hub->dev, 346 "%s%s\n", __FUNCTION__, 347 uhci->rh_state == UHCI_RH_AUTO_STOPPED ? 348 " (auto-start)" : ""); 349 350 /* If we are auto-stopped then no devices are attached so there's 351 * no need for wakeup signals. Otherwise we send Global Resume 352 * for 20 ms. 353 */ 354 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 355 uhci->rh_state = UHCI_RH_RESUMING; 356 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF, 357 uhci->io_addr + USBCMD); 358 spin_unlock_irq(&uhci->lock); 359 msleep(20); 360 spin_lock_irq(&uhci->lock); 361 if (uhci->dead) 362 return; 363 364 /* End Global Resume and wait for EOP to be sent */ 365 outw(USBCMD_CF, uhci->io_addr + USBCMD); 366 mb(); 367 udelay(4); 368 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 369 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 370 } 371 372 start_rh(uhci); 373 374 /* Restart root hub polling */ 375 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); 376 } 377 378 static irqreturn_t uhci_irq(struct usb_hcd *hcd) 379 { 380 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 381 unsigned short status; 382 unsigned long flags; 383 384 /* 385 * Read the interrupt status, and write it back to clear the 386 * interrupt cause. Contrary to the UHCI specification, the 387 * "HC Halted" status bit is persistent: it is RO, not R/WC. 388 */ 389 status = inw(uhci->io_addr + USBSTS); 390 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 391 return IRQ_NONE; 392 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 393 394 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 395 if (status & USBSTS_HSE) 396 dev_err(uhci_dev(uhci), "host system error, " 397 "PCI problems?\n"); 398 if (status & USBSTS_HCPE) 399 dev_err(uhci_dev(uhci), "host controller process " 400 "error, something bad happened!\n"); 401 if (status & USBSTS_HCH) { 402 spin_lock_irqsave(&uhci->lock, flags); 403 if (uhci->rh_state >= UHCI_RH_RUNNING) { 404 dev_err(uhci_dev(uhci), 405 "host controller halted, " 406 "very bad!\n"); 407 if (debug > 1 && errbuf) { 408 /* Print the schedule for debugging */ 409 uhci_sprint_schedule(uhci, 410 errbuf, ERRBUF_LEN); 411 lprintk(errbuf); 412 } 413 uhci_hc_died(uhci); 414 415 /* Force a callback in case there are 416 * pending unlinks */ 417 mod_timer(&hcd->rh_timer, jiffies); 418 } 419 spin_unlock_irqrestore(&uhci->lock, flags); 420 } 421 } 422 423 if (status & USBSTS_RD) 424 usb_hcd_poll_rh_status(hcd); 425 else { 426 spin_lock_irqsave(&uhci->lock, flags); 427 uhci_scan_schedule(uhci); 428 spin_unlock_irqrestore(&uhci->lock, flags); 429 } 430 431 return IRQ_HANDLED; 432 } 433 434 /* 435 * Store the current frame number in uhci->frame_number if the controller 436 * is runnning. Expand from 11 bits (of which we use only 10) to a 437 * full-sized integer. 438 * 439 * Like many other parts of the driver, this code relies on being polled 440 * more than once per second as long as the controller is running. 441 */ 442 static void uhci_get_current_frame_number(struct uhci_hcd *uhci) 443 { 444 if (!uhci->is_stopped) { 445 unsigned delta; 446 447 delta = (inw(uhci->io_addr + USBFRNUM) - uhci->frame_number) & 448 (UHCI_NUMFRAMES - 1); 449 uhci->frame_number += delta; 450 } 451 } 452 453 /* 454 * De-allocate all resources 455 */ 456 static void release_uhci(struct uhci_hcd *uhci) 457 { 458 int i; 459 460 if (DEBUG_CONFIGURED) { 461 spin_lock_irq(&uhci->lock); 462 uhci->is_initialized = 0; 463 spin_unlock_irq(&uhci->lock); 464 465 debugfs_remove(uhci->dentry); 466 } 467 468 for (i = 0; i < UHCI_NUM_SKELQH; i++) 469 uhci_free_qh(uhci, uhci->skelqh[i]); 470 471 uhci_free_td(uhci, uhci->term_td); 472 473 dma_pool_destroy(uhci->qh_pool); 474 475 dma_pool_destroy(uhci->td_pool); 476 477 kfree(uhci->frame_cpu); 478 479 dma_free_coherent(uhci_dev(uhci), 480 UHCI_NUMFRAMES * sizeof(*uhci->frame), 481 uhci->frame, uhci->frame_dma_handle); 482 } 483 484 static int uhci_init(struct usb_hcd *hcd) 485 { 486 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 487 unsigned io_size = (unsigned) hcd->rsrc_len; 488 int port; 489 490 uhci->io_addr = (unsigned long) hcd->rsrc_start; 491 492 /* The UHCI spec says devices must have 2 ports, and goes on to say 493 * they may have more but gives no way to determine how many there 494 * are. However according to the UHCI spec, Bit 7 of the port 495 * status and control register is always set to 1. So we try to 496 * use this to our advantage. Another common failure mode when 497 * a nonexistent register is addressed is to return all ones, so 498 * we test for that also. 499 */ 500 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { 501 unsigned int portstatus; 502 503 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); 504 if (!(portstatus & 0x0080) || portstatus == 0xffff) 505 break; 506 } 507 if (debug) 508 dev_info(uhci_dev(uhci), "detected %d ports\n", port); 509 510 /* Anything greater than 7 is weird so we'll ignore it. */ 511 if (port > UHCI_RH_MAXCHILD) { 512 dev_info(uhci_dev(uhci), "port count misdetected? " 513 "forcing to 2 ports\n"); 514 port = 2; 515 } 516 uhci->rh_numports = port; 517 518 /* Kick BIOS off this hardware and reset if the controller 519 * isn't already safely quiescent. 520 */ 521 check_and_reset_hc(uhci); 522 return 0; 523 } 524 525 /* Make sure the controller is quiescent and that we're not using it 526 * any more. This is mainly for the benefit of programs which, like kexec, 527 * expect the hardware to be idle: not doing DMA or generating IRQs. 528 * 529 * This routine may be called in a damaged or failing kernel. Hence we 530 * do not acquire the spinlock before shutting down the controller. 531 */ 532 static void uhci_shutdown(struct pci_dev *pdev) 533 { 534 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); 535 536 uhci_hc_died(hcd_to_uhci(hcd)); 537 } 538 539 /* 540 * Allocate a frame list, and then setup the skeleton 541 * 542 * The hardware doesn't really know any difference 543 * in the queues, but the order does matter for the 544 * protocols higher up. The order is: 545 * 546 * - any isochronous events handled before any 547 * of the queues. We don't do that here, because 548 * we'll create the actual TD entries on demand. 549 * - The first queue is the interrupt queue. 550 * - The second queue is the control queue, split into low- and full-speed 551 * - The third queue is bulk queue. 552 * - The fourth queue is the bandwidth reclamation queue, which loops back 553 * to the full-speed control queue. 554 */ 555 static int uhci_start(struct usb_hcd *hcd) 556 { 557 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 558 int retval = -EBUSY; 559 int i; 560 struct dentry *dentry; 561 562 hcd->uses_new_polling = 1; 563 564 spin_lock_init(&uhci->lock); 565 setup_timer(&uhci->fsbr_timer, uhci_fsbr_timeout, 566 (unsigned long) uhci); 567 INIT_LIST_HEAD(&uhci->idle_qh_list); 568 init_waitqueue_head(&uhci->waitqh); 569 570 if (DEBUG_CONFIGURED) { 571 dentry = debugfs_create_file(hcd->self.bus_name, 572 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, 573 uhci, &uhci_debug_operations); 574 if (!dentry) { 575 dev_err(uhci_dev(uhci), "couldn't create uhci " 576 "debugfs entry\n"); 577 retval = -ENOMEM; 578 goto err_create_debug_entry; 579 } 580 uhci->dentry = dentry; 581 } 582 583 uhci->frame = dma_alloc_coherent(uhci_dev(uhci), 584 UHCI_NUMFRAMES * sizeof(*uhci->frame), 585 &uhci->frame_dma_handle, 0); 586 if (!uhci->frame) { 587 dev_err(uhci_dev(uhci), "unable to allocate " 588 "consistent memory for frame list\n"); 589 goto err_alloc_frame; 590 } 591 memset(uhci->frame, 0, UHCI_NUMFRAMES * sizeof(*uhci->frame)); 592 593 uhci->frame_cpu = kcalloc(UHCI_NUMFRAMES, sizeof(*uhci->frame_cpu), 594 GFP_KERNEL); 595 if (!uhci->frame_cpu) { 596 dev_err(uhci_dev(uhci), "unable to allocate " 597 "memory for frame pointers\n"); 598 goto err_alloc_frame_cpu; 599 } 600 601 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), 602 sizeof(struct uhci_td), 16, 0); 603 if (!uhci->td_pool) { 604 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); 605 goto err_create_td_pool; 606 } 607 608 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), 609 sizeof(struct uhci_qh), 16, 0); 610 if (!uhci->qh_pool) { 611 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); 612 goto err_create_qh_pool; 613 } 614 615 uhci->term_td = uhci_alloc_td(uhci); 616 if (!uhci->term_td) { 617 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); 618 goto err_alloc_term_td; 619 } 620 621 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 622 uhci->skelqh[i] = uhci_alloc_qh(uhci, NULL, NULL); 623 if (!uhci->skelqh[i]) { 624 dev_err(uhci_dev(uhci), "unable to allocate QH\n"); 625 goto err_alloc_skelqh; 626 } 627 } 628 629 /* 630 * 8 Interrupt queues; link all higher int queues to int1, 631 * then link int1 to control and control to bulk 632 */ 633 uhci->skel_int128_qh->link = 634 uhci->skel_int64_qh->link = 635 uhci->skel_int32_qh->link = 636 uhci->skel_int16_qh->link = 637 uhci->skel_int8_qh->link = 638 uhci->skel_int4_qh->link = 639 uhci->skel_int2_qh->link = UHCI_PTR_QH | 640 cpu_to_le32(uhci->skel_int1_qh->dma_handle); 641 642 uhci->skel_int1_qh->link = UHCI_PTR_QH | 643 cpu_to_le32(uhci->skel_ls_control_qh->dma_handle); 644 uhci->skel_ls_control_qh->link = UHCI_PTR_QH | 645 cpu_to_le32(uhci->skel_fs_control_qh->dma_handle); 646 uhci->skel_fs_control_qh->link = UHCI_PTR_QH | 647 cpu_to_le32(uhci->skel_bulk_qh->dma_handle); 648 uhci->skel_bulk_qh->link = UHCI_PTR_QH | 649 cpu_to_le32(uhci->skel_term_qh->dma_handle); 650 651 /* This dummy TD is to work around a bug in Intel PIIX controllers */ 652 uhci_fill_td(uhci->term_td, 0, uhci_explen(0) | 653 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); 654 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle); 655 656 uhci->skel_term_qh->link = UHCI_PTR_TERM; 657 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle); 658 659 /* 660 * Fill the frame list: make all entries point to the proper 661 * interrupt queue. 662 */ 663 for (i = 0; i < UHCI_NUMFRAMES; i++) { 664 665 /* Only place we don't use the frame list routines */ 666 uhci->frame[i] = uhci_frame_skel_link(uhci, i); 667 } 668 669 /* 670 * Some architectures require a full mb() to enforce completion of 671 * the memory writes above before the I/O transfers in configure_hc(). 672 */ 673 mb(); 674 675 configure_hc(uhci); 676 uhci->is_initialized = 1; 677 start_rh(uhci); 678 return 0; 679 680 /* 681 * error exits: 682 */ 683 err_alloc_skelqh: 684 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 685 if (uhci->skelqh[i]) 686 uhci_free_qh(uhci, uhci->skelqh[i]); 687 } 688 689 uhci_free_td(uhci, uhci->term_td); 690 691 err_alloc_term_td: 692 dma_pool_destroy(uhci->qh_pool); 693 694 err_create_qh_pool: 695 dma_pool_destroy(uhci->td_pool); 696 697 err_create_td_pool: 698 kfree(uhci->frame_cpu); 699 700 err_alloc_frame_cpu: 701 dma_free_coherent(uhci_dev(uhci), 702 UHCI_NUMFRAMES * sizeof(*uhci->frame), 703 uhci->frame, uhci->frame_dma_handle); 704 705 err_alloc_frame: 706 debugfs_remove(uhci->dentry); 707 708 err_create_debug_entry: 709 return retval; 710 } 711 712 static void uhci_stop(struct usb_hcd *hcd) 713 { 714 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 715 716 spin_lock_irq(&uhci->lock); 717 if (test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) && !uhci->dead) 718 uhci_hc_died(uhci); 719 uhci_scan_schedule(uhci); 720 spin_unlock_irq(&uhci->lock); 721 722 del_timer_sync(&uhci->fsbr_timer); 723 release_uhci(uhci); 724 } 725 726 #ifdef CONFIG_PM 727 static int uhci_rh_suspend(struct usb_hcd *hcd) 728 { 729 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 730 int rc = 0; 731 732 spin_lock_irq(&uhci->lock); 733 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 734 rc = -ESHUTDOWN; 735 else if (!uhci->dead) 736 suspend_rh(uhci, UHCI_RH_SUSPENDED); 737 spin_unlock_irq(&uhci->lock); 738 return rc; 739 } 740 741 static int uhci_rh_resume(struct usb_hcd *hcd) 742 { 743 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 744 int rc = 0; 745 746 spin_lock_irq(&uhci->lock); 747 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { 748 dev_warn(&hcd->self.root_hub->dev, "HC isn't running!\n"); 749 rc = -ESHUTDOWN; 750 } else if (!uhci->dead) 751 wakeup_rh(uhci); 752 spin_unlock_irq(&uhci->lock); 753 return rc; 754 } 755 756 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) 757 { 758 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 759 int rc = 0; 760 761 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 762 763 spin_lock_irq(&uhci->lock); 764 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags) || uhci->dead) 765 goto done_okay; /* Already suspended or dead */ 766 767 if (uhci->rh_state > UHCI_RH_SUSPENDED) { 768 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); 769 rc = -EBUSY; 770 goto done; 771 }; 772 773 /* All PCI host controllers are required to disable IRQ generation 774 * at the source, so we must turn off PIRQ. 775 */ 776 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); 777 mb(); 778 hcd->poll_rh = 0; 779 780 /* FIXME: Enable non-PME# remote wakeup? */ 781 782 /* make sure snapshot being resumed re-enumerates everything */ 783 if (message.event == PM_EVENT_PRETHAW) 784 uhci_hc_died(uhci); 785 786 done_okay: 787 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 788 done: 789 spin_unlock_irq(&uhci->lock); 790 return rc; 791 } 792 793 static int uhci_resume(struct usb_hcd *hcd) 794 { 795 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 796 797 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 798 799 /* Since we aren't in D3 any more, it's safe to set this flag 800 * even if the controller was dead. 801 */ 802 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 803 mb(); 804 805 spin_lock_irq(&uhci->lock); 806 807 /* FIXME: Disable non-PME# remote wakeup? */ 808 809 /* The firmware or a boot kernel may have changed the controller 810 * settings during a system wakeup. Check it and reconfigure 811 * to avoid problems. 812 */ 813 check_and_reset_hc(uhci); 814 815 /* If the controller was dead before, it's back alive now */ 816 configure_hc(uhci); 817 818 if (uhci->rh_state == UHCI_RH_RESET) { 819 820 /* The controller had to be reset */ 821 usb_root_hub_lost_power(hcd->self.root_hub); 822 suspend_rh(uhci, UHCI_RH_SUSPENDED); 823 } 824 825 spin_unlock_irq(&uhci->lock); 826 827 if (!uhci->working_RD) { 828 /* Suspended root hub needs to be polled */ 829 hcd->poll_rh = 1; 830 usb_hcd_poll_rh_status(hcd); 831 } 832 return 0; 833 } 834 #endif 835 836 /* Wait until a particular device/endpoint's QH is idle, and free it */ 837 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, 838 struct usb_host_endpoint *hep) 839 { 840 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 841 struct uhci_qh *qh; 842 843 spin_lock_irq(&uhci->lock); 844 qh = (struct uhci_qh *) hep->hcpriv; 845 if (qh == NULL) 846 goto done; 847 848 while (qh->state != QH_STATE_IDLE) { 849 ++uhci->num_waiting; 850 spin_unlock_irq(&uhci->lock); 851 wait_event_interruptible(uhci->waitqh, 852 qh->state == QH_STATE_IDLE); 853 spin_lock_irq(&uhci->lock); 854 --uhci->num_waiting; 855 } 856 857 uhci_free_qh(uhci, qh); 858 done: 859 spin_unlock_irq(&uhci->lock); 860 } 861 862 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) 863 { 864 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 865 unsigned frame_number; 866 unsigned delta; 867 868 /* Minimize latency by avoiding the spinlock */ 869 frame_number = uhci->frame_number; 870 barrier(); 871 delta = (inw(uhci->io_addr + USBFRNUM) - frame_number) & 872 (UHCI_NUMFRAMES - 1); 873 return frame_number + delta; 874 } 875 876 static const char hcd_name[] = "uhci_hcd"; 877 878 static const struct hc_driver uhci_driver = { 879 .description = hcd_name, 880 .product_desc = "UHCI Host Controller", 881 .hcd_priv_size = sizeof(struct uhci_hcd), 882 883 /* Generic hardware linkage */ 884 .irq = uhci_irq, 885 .flags = HCD_USB11, 886 887 /* Basic lifecycle operations */ 888 .reset = uhci_init, 889 .start = uhci_start, 890 #ifdef CONFIG_PM 891 .suspend = uhci_suspend, 892 .resume = uhci_resume, 893 .bus_suspend = uhci_rh_suspend, 894 .bus_resume = uhci_rh_resume, 895 #endif 896 .stop = uhci_stop, 897 898 .urb_enqueue = uhci_urb_enqueue, 899 .urb_dequeue = uhci_urb_dequeue, 900 901 .endpoint_disable = uhci_hcd_endpoint_disable, 902 .get_frame_number = uhci_hcd_get_frame_number, 903 904 .hub_status_data = uhci_hub_status_data, 905 .hub_control = uhci_hub_control, 906 }; 907 908 static const struct pci_device_id uhci_pci_ids[] = { { 909 /* handle any USB UHCI controller */ 910 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_UHCI, ~0), 911 .driver_data = (unsigned long) &uhci_driver, 912 }, { /* end: all zeroes */ } 913 }; 914 915 MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 916 917 static struct pci_driver uhci_pci_driver = { 918 .name = (char *)hcd_name, 919 .id_table = uhci_pci_ids, 920 921 .probe = usb_hcd_pci_probe, 922 .remove = usb_hcd_pci_remove, 923 .shutdown = uhci_shutdown, 924 925 #ifdef CONFIG_PM 926 .suspend = usb_hcd_pci_suspend, 927 .resume = usb_hcd_pci_resume, 928 #endif /* PM */ 929 }; 930 931 static int __init uhci_hcd_init(void) 932 { 933 int retval = -ENOMEM; 934 935 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "%s\n", 936 ignore_oc ? ", overcurrent ignored" : ""); 937 938 if (usb_disabled()) 939 return -ENODEV; 940 941 if (DEBUG_CONFIGURED) { 942 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); 943 if (!errbuf) 944 goto errbuf_failed; 945 uhci_debugfs_root = debugfs_create_dir("uhci", NULL); 946 if (!uhci_debugfs_root) 947 goto debug_failed; 948 } 949 950 uhci_up_cachep = kmem_cache_create("uhci_urb_priv", 951 sizeof(struct urb_priv), 0, 0, NULL, NULL); 952 if (!uhci_up_cachep) 953 goto up_failed; 954 955 retval = pci_register_driver(&uhci_pci_driver); 956 if (retval) 957 goto init_failed; 958 959 return 0; 960 961 init_failed: 962 kmem_cache_destroy(uhci_up_cachep); 963 964 up_failed: 965 debugfs_remove(uhci_debugfs_root); 966 967 debug_failed: 968 kfree(errbuf); 969 970 errbuf_failed: 971 972 return retval; 973 } 974 975 static void __exit uhci_hcd_cleanup(void) 976 { 977 pci_unregister_driver(&uhci_pci_driver); 978 kmem_cache_destroy(uhci_up_cachep); 979 debugfs_remove(uhci_debugfs_root); 980 kfree(errbuf); 981 } 982 983 module_init(uhci_hcd_init); 984 module_exit(uhci_hcd_cleanup); 985 986 MODULE_AUTHOR(DRIVER_AUTHOR); 987 MODULE_DESCRIPTION(DRIVER_DESC); 988 MODULE_LICENSE("GPL"); 989