1 /* 2 * Universal Host Controller Interface driver for USB. 3 * 4 * Maintainer: Alan Stern <stern@rowland.harvard.edu> 5 * 6 * (C) Copyright 1999 Linus Torvalds 7 * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com 8 * (C) Copyright 1999 Randy Dunlap 9 * (C) Copyright 1999 Georg Acher, acher@in.tum.de 10 * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de 11 * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch 12 * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at 13 * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface 14 * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com). 15 * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c) 16 * (C) Copyright 2004-2005 Alan Stern, stern@rowland.harvard.edu 17 * 18 * Intel documents this fairly well, and as far as I know there 19 * are no royalties or anything like that, but even so there are 20 * people who decided that they want to do the same thing in a 21 * completely different way. 22 * 23 */ 24 25 #include <linux/config.h> 26 #ifdef CONFIG_USB_DEBUG 27 #define DEBUG 28 #else 29 #undef DEBUG 30 #endif 31 #include <linux/module.h> 32 #include <linux/pci.h> 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/delay.h> 36 #include <linux/ioport.h> 37 #include <linux/sched.h> 38 #include <linux/slab.h> 39 #include <linux/smp_lock.h> 40 #include <linux/errno.h> 41 #include <linux/unistd.h> 42 #include <linux/interrupt.h> 43 #include <linux/spinlock.h> 44 #include <linux/debugfs.h> 45 #include <linux/pm.h> 46 #include <linux/dmapool.h> 47 #include <linux/dma-mapping.h> 48 #include <linux/usb.h> 49 #include <linux/bitops.h> 50 51 #include <asm/uaccess.h> 52 #include <asm/io.h> 53 #include <asm/irq.h> 54 #include <asm/system.h> 55 56 #include "../core/hcd.h" 57 #include "uhci-hcd.h" 58 59 /* 60 * Version Information 61 */ 62 #define DRIVER_VERSION "v2.3" 63 #define DRIVER_AUTHOR "Linus 'Frodo Rabbit' Torvalds, Johannes Erdfelt, \ 64 Randy Dunlap, Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber, \ 65 Alan Stern" 66 #define DRIVER_DESC "USB Universal Host Controller Interface driver" 67 68 /* 69 * debug = 0, no debugging messages 70 * debug = 1, dump failed URB's except for stalls 71 * debug = 2, dump all failed URB's (including stalls) 72 * show all queues in /debug/uhci/[pci_addr] 73 * debug = 3, show all TD's in URB's when dumping 74 */ 75 #ifdef DEBUG 76 static int debug = 1; 77 #else 78 static int debug = 0; 79 #endif 80 module_param(debug, int, S_IRUGO | S_IWUSR); 81 MODULE_PARM_DESC(debug, "Debug level"); 82 static char *errbuf; 83 #define ERRBUF_LEN (32 * 1024) 84 85 static kmem_cache_t *uhci_up_cachep; /* urb_priv */ 86 87 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state); 88 static void wakeup_rh(struct uhci_hcd *uhci); 89 static void uhci_get_current_frame_number(struct uhci_hcd *uhci); 90 91 /* If a transfer is still active after this much time, turn off FSBR */ 92 #define IDLE_TIMEOUT msecs_to_jiffies(50) 93 #define FSBR_DELAY msecs_to_jiffies(50) 94 95 /* When we timeout an idle transfer for FSBR, we'll switch it over to */ 96 /* depth first traversal. We'll do it in groups of this number of TD's */ 97 /* to make sure it doesn't hog all of the bandwidth */ 98 #define DEPTH_INTERVAL 5 99 100 #include "uhci-debug.c" 101 #include "uhci-q.c" 102 #include "uhci-hub.c" 103 104 /* 105 * Make sure the controller is completely inactive, unable to 106 * generate interrupts or do DMA. 107 */ 108 static void reset_hc(struct uhci_hcd *uhci) 109 { 110 int port; 111 112 /* Turn off PIRQ enable and SMI enable. (This also turns off the 113 * BIOS's USB Legacy Support.) Turn off all the R/WC bits too. 114 */ 115 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 116 USBLEGSUP_RWC); 117 118 /* Reset the HC - this will force us to get a 119 * new notification of any already connected 120 * ports due to the virtual disconnect that it 121 * implies. 122 */ 123 outw(USBCMD_HCRESET, uhci->io_addr + USBCMD); 124 mb(); 125 udelay(5); 126 if (inw(uhci->io_addr + USBCMD) & USBCMD_HCRESET) 127 dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n"); 128 129 /* Just to be safe, disable interrupt requests and 130 * make sure the controller is stopped. 131 */ 132 outw(0, uhci->io_addr + USBINTR); 133 outw(0, uhci->io_addr + USBCMD); 134 135 /* HCRESET doesn't affect the Suspend, Reset, and Resume Detect 136 * bits in the port status and control registers. 137 * We have to clear them by hand. 138 */ 139 for (port = 0; port < uhci->rh_numports; ++port) 140 outw(0, uhci->io_addr + USBPORTSC1 + (port * 2)); 141 142 uhci->port_c_suspend = uhci->suspended_ports = 143 uhci->resuming_ports = 0; 144 uhci->rh_state = UHCI_RH_RESET; 145 uhci->is_stopped = UHCI_IS_STOPPED; 146 uhci_to_hcd(uhci)->state = HC_STATE_HALT; 147 uhci_to_hcd(uhci)->poll_rh = 0; 148 } 149 150 /* 151 * Last rites for a defunct/nonfunctional controller 152 * or one we don't want to use any more. 153 */ 154 static void hc_died(struct uhci_hcd *uhci) 155 { 156 reset_hc(uhci); 157 uhci->hc_inaccessible = 1; 158 } 159 160 /* 161 * Initialize a controller that was newly discovered or has just been 162 * resumed. In either case we can't be sure of its previous state. 163 */ 164 static void check_and_reset_hc(struct uhci_hcd *uhci) 165 { 166 u16 legsup; 167 unsigned int cmd, intr; 168 169 /* 170 * When restarting a suspended controller, we expect all the 171 * settings to be the same as we left them: 172 * 173 * PIRQ and SMI disabled, no R/W bits set in USBLEGSUP; 174 * Controller is stopped and configured with EGSM set; 175 * No interrupts enabled except possibly Resume Detect. 176 * 177 * If any of these conditions are violated we do a complete reset. 178 */ 179 pci_read_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, &legsup); 180 if (legsup & ~(USBLEGSUP_RO | USBLEGSUP_RWC)) { 181 dev_dbg(uhci_dev(uhci), "%s: legsup = 0x%04x\n", 182 __FUNCTION__, legsup); 183 goto reset_needed; 184 } 185 186 cmd = inw(uhci->io_addr + USBCMD); 187 if ((cmd & USBCMD_RS) || !(cmd & USBCMD_CF) || !(cmd & USBCMD_EGSM)) { 188 dev_dbg(uhci_dev(uhci), "%s: cmd = 0x%04x\n", 189 __FUNCTION__, cmd); 190 goto reset_needed; 191 } 192 193 intr = inw(uhci->io_addr + USBINTR); 194 if (intr & (~USBINTR_RESUME)) { 195 dev_dbg(uhci_dev(uhci), "%s: intr = 0x%04x\n", 196 __FUNCTION__, intr); 197 goto reset_needed; 198 } 199 return; 200 201 reset_needed: 202 dev_dbg(uhci_dev(uhci), "Performing full reset\n"); 203 reset_hc(uhci); 204 } 205 206 /* 207 * Store the basic register settings needed by the controller. 208 */ 209 static void configure_hc(struct uhci_hcd *uhci) 210 { 211 /* Set the frame length to the default: 1 ms exactly */ 212 outb(USBSOF_DEFAULT, uhci->io_addr + USBSOF); 213 214 /* Store the frame list base address */ 215 outl(uhci->fl->dma_handle, uhci->io_addr + USBFLBASEADD); 216 217 /* Set the current frame number */ 218 outw(uhci->frame_number, uhci->io_addr + USBFRNUM); 219 220 /* Mark controller as running before we enable interrupts */ 221 uhci_to_hcd(uhci)->state = HC_STATE_RUNNING; 222 mb(); 223 224 /* Enable PIRQ */ 225 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 226 USBLEGSUP_DEFAULT); 227 } 228 229 230 static int resume_detect_interrupts_are_broken(struct uhci_hcd *uhci) 231 { 232 int port; 233 234 switch (to_pci_dev(uhci_dev(uhci))->vendor) { 235 default: 236 break; 237 238 case PCI_VENDOR_ID_GENESYS: 239 /* Genesys Logic's GL880S controllers don't generate 240 * resume-detect interrupts. 241 */ 242 return 1; 243 244 case PCI_VENDOR_ID_INTEL: 245 /* Some of Intel's USB controllers have a bug that causes 246 * resume-detect interrupts if any port has an over-current 247 * condition. To make matters worse, some motherboards 248 * hardwire unused USB ports' over-current inputs active! 249 * To prevent problems, we will not enable resume-detect 250 * interrupts if any ports are OC. 251 */ 252 for (port = 0; port < uhci->rh_numports; ++port) { 253 if (inw(uhci->io_addr + USBPORTSC1 + port * 2) & 254 USBPORTSC_OC) 255 return 1; 256 } 257 break; 258 } 259 return 0; 260 } 261 262 static void suspend_rh(struct uhci_hcd *uhci, enum uhci_rh_state new_state) 263 __releases(uhci->lock) 264 __acquires(uhci->lock) 265 { 266 int auto_stop; 267 int int_enable; 268 269 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); 270 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__, 271 (auto_stop ? " (auto-stop)" : "")); 272 273 /* If we get a suspend request when we're already auto-stopped 274 * then there's nothing to do. 275 */ 276 if (uhci->rh_state == UHCI_RH_AUTO_STOPPED) { 277 uhci->rh_state = new_state; 278 return; 279 } 280 281 /* Enable resume-detect interrupts if they work. 282 * Then enter Global Suspend mode, still configured. 283 */ 284 uhci->working_RD = 1; 285 int_enable = USBINTR_RESUME; 286 if (resume_detect_interrupts_are_broken(uhci)) { 287 uhci->working_RD = int_enable = 0; 288 } 289 outw(int_enable, uhci->io_addr + USBINTR); 290 outw(USBCMD_EGSM | USBCMD_CF, uhci->io_addr + USBCMD); 291 mb(); 292 udelay(5); 293 294 /* If we're auto-stopping then no devices have been attached 295 * for a while, so there shouldn't be any active URBs and the 296 * controller should stop after a few microseconds. Otherwise 297 * we will give the controller one frame to stop. 298 */ 299 if (!auto_stop && !(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) { 300 uhci->rh_state = UHCI_RH_SUSPENDING; 301 spin_unlock_irq(&uhci->lock); 302 msleep(1); 303 spin_lock_irq(&uhci->lock); 304 if (uhci->hc_inaccessible) /* Died */ 305 return; 306 } 307 if (!(inw(uhci->io_addr + USBSTS) & USBSTS_HCH)) 308 dev_warn(uhci_dev(uhci), "Controller not stopped yet!\n"); 309 310 uhci_get_current_frame_number(uhci); 311 smp_wmb(); 312 313 uhci->rh_state = new_state; 314 uhci->is_stopped = UHCI_IS_STOPPED; 315 uhci_to_hcd(uhci)->poll_rh = !int_enable; 316 317 uhci_scan_schedule(uhci, NULL); 318 } 319 320 static void start_rh(struct uhci_hcd *uhci) 321 { 322 uhci->is_stopped = 0; 323 smp_wmb(); 324 325 /* Mark it configured and running with a 64-byte max packet. 326 * All interrupts are enabled, even though RESUME won't do anything. 327 */ 328 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, uhci->io_addr + USBCMD); 329 outw(USBINTR_TIMEOUT | USBINTR_RESUME | USBINTR_IOC | USBINTR_SP, 330 uhci->io_addr + USBINTR); 331 mb(); 332 uhci->rh_state = UHCI_RH_RUNNING; 333 uhci_to_hcd(uhci)->poll_rh = 1; 334 } 335 336 static void wakeup_rh(struct uhci_hcd *uhci) 337 __releases(uhci->lock) 338 __acquires(uhci->lock) 339 { 340 dev_dbg(uhci_dev(uhci), "%s%s\n", __FUNCTION__, 341 uhci->rh_state == UHCI_RH_AUTO_STOPPED ? 342 " (auto-start)" : ""); 343 344 /* If we are auto-stopped then no devices are attached so there's 345 * no need for wakeup signals. Otherwise we send Global Resume 346 * for 20 ms. 347 */ 348 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 349 uhci->rh_state = UHCI_RH_RESUMING; 350 outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF, 351 uhci->io_addr + USBCMD); 352 spin_unlock_irq(&uhci->lock); 353 msleep(20); 354 spin_lock_irq(&uhci->lock); 355 if (uhci->hc_inaccessible) /* Died */ 356 return; 357 358 /* End Global Resume and wait for EOP to be sent */ 359 outw(USBCMD_CF, uhci->io_addr + USBCMD); 360 mb(); 361 udelay(4); 362 if (inw(uhci->io_addr + USBCMD) & USBCMD_FGR) 363 dev_warn(uhci_dev(uhci), "FGR not stopped yet!\n"); 364 } 365 366 start_rh(uhci); 367 368 /* Restart root hub polling */ 369 mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies); 370 } 371 372 static irqreturn_t uhci_irq(struct usb_hcd *hcd, struct pt_regs *regs) 373 { 374 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 375 unsigned short status; 376 unsigned long flags; 377 378 /* 379 * Read the interrupt status, and write it back to clear the 380 * interrupt cause. Contrary to the UHCI specification, the 381 * "HC Halted" status bit is persistent: it is RO, not R/WC. 382 */ 383 status = inw(uhci->io_addr + USBSTS); 384 if (!(status & ~USBSTS_HCH)) /* shared interrupt, not mine */ 385 return IRQ_NONE; 386 outw(status, uhci->io_addr + USBSTS); /* Clear it */ 387 388 if (status & ~(USBSTS_USBINT | USBSTS_ERROR | USBSTS_RD)) { 389 if (status & USBSTS_HSE) 390 dev_err(uhci_dev(uhci), "host system error, " 391 "PCI problems?\n"); 392 if (status & USBSTS_HCPE) 393 dev_err(uhci_dev(uhci), "host controller process " 394 "error, something bad happened!\n"); 395 if (status & USBSTS_HCH) { 396 spin_lock_irqsave(&uhci->lock, flags); 397 if (uhci->rh_state >= UHCI_RH_RUNNING) { 398 dev_err(uhci_dev(uhci), 399 "host controller halted, " 400 "very bad!\n"); 401 hc_died(uhci); 402 403 /* Force a callback in case there are 404 * pending unlinks */ 405 mod_timer(&hcd->rh_timer, jiffies); 406 } 407 spin_unlock_irqrestore(&uhci->lock, flags); 408 } 409 } 410 411 if (status & USBSTS_RD) 412 usb_hcd_poll_rh_status(hcd); 413 else { 414 spin_lock_irqsave(&uhci->lock, flags); 415 uhci_scan_schedule(uhci, regs); 416 spin_unlock_irqrestore(&uhci->lock, flags); 417 } 418 419 return IRQ_HANDLED; 420 } 421 422 /* 423 * Store the current frame number in uhci->frame_number if the controller 424 * is runnning 425 */ 426 static void uhci_get_current_frame_number(struct uhci_hcd *uhci) 427 { 428 if (!uhci->is_stopped) 429 uhci->frame_number = inw(uhci->io_addr + USBFRNUM); 430 } 431 432 /* 433 * De-allocate all resources 434 */ 435 static void release_uhci(struct uhci_hcd *uhci) 436 { 437 int i; 438 439 for (i = 0; i < UHCI_NUM_SKELQH; i++) 440 if (uhci->skelqh[i]) { 441 uhci_free_qh(uhci, uhci->skelqh[i]); 442 uhci->skelqh[i] = NULL; 443 } 444 445 if (uhci->term_td) { 446 uhci_free_td(uhci, uhci->term_td); 447 uhci->term_td = NULL; 448 } 449 450 if (uhci->qh_pool) { 451 dma_pool_destroy(uhci->qh_pool); 452 uhci->qh_pool = NULL; 453 } 454 455 if (uhci->td_pool) { 456 dma_pool_destroy(uhci->td_pool); 457 uhci->td_pool = NULL; 458 } 459 460 if (uhci->fl) { 461 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 462 uhci->fl, uhci->fl->dma_handle); 463 uhci->fl = NULL; 464 } 465 466 if (uhci->dentry) { 467 debugfs_remove(uhci->dentry); 468 uhci->dentry = NULL; 469 } 470 } 471 472 static int uhci_reset(struct usb_hcd *hcd) 473 { 474 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 475 unsigned io_size = (unsigned) hcd->rsrc_len; 476 int port; 477 478 uhci->io_addr = (unsigned long) hcd->rsrc_start; 479 480 /* The UHCI spec says devices must have 2 ports, and goes on to say 481 * they may have more but gives no way to determine how many there 482 * are. However according to the UHCI spec, Bit 7 of the port 483 * status and control register is always set to 1. So we try to 484 * use this to our advantage. Another common failure mode when 485 * a nonexistent register is addressed is to return all ones, so 486 * we test for that also. 487 */ 488 for (port = 0; port < (io_size - USBPORTSC1) / 2; port++) { 489 unsigned int portstatus; 490 491 portstatus = inw(uhci->io_addr + USBPORTSC1 + (port * 2)); 492 if (!(portstatus & 0x0080) || portstatus == 0xffff) 493 break; 494 } 495 if (debug) 496 dev_info(uhci_dev(uhci), "detected %d ports\n", port); 497 498 /* Anything greater than 7 is weird so we'll ignore it. */ 499 if (port > UHCI_RH_MAXCHILD) { 500 dev_info(uhci_dev(uhci), "port count misdetected? " 501 "forcing to 2 ports\n"); 502 port = 2; 503 } 504 uhci->rh_numports = port; 505 506 /* Kick BIOS off this hardware and reset if the controller 507 * isn't already safely quiescent. 508 */ 509 check_and_reset_hc(uhci); 510 return 0; 511 } 512 513 /* Make sure the controller is quiescent and that we're not using it 514 * any more. This is mainly for the benefit of programs which, like kexec, 515 * expect the hardware to be idle: not doing DMA or generating IRQs. 516 * 517 * This routine may be called in a damaged or failing kernel. Hence we 518 * do not acquire the spinlock before shutting down the controller. 519 */ 520 static void uhci_shutdown(struct pci_dev *pdev) 521 { 522 struct usb_hcd *hcd = (struct usb_hcd *) pci_get_drvdata(pdev); 523 524 hc_died(hcd_to_uhci(hcd)); 525 } 526 527 /* 528 * Allocate a frame list, and then setup the skeleton 529 * 530 * The hardware doesn't really know any difference 531 * in the queues, but the order does matter for the 532 * protocols higher up. The order is: 533 * 534 * - any isochronous events handled before any 535 * of the queues. We don't do that here, because 536 * we'll create the actual TD entries on demand. 537 * - The first queue is the interrupt queue. 538 * - The second queue is the control queue, split into low- and full-speed 539 * - The third queue is bulk queue. 540 * - The fourth queue is the bandwidth reclamation queue, which loops back 541 * to the full-speed control queue. 542 */ 543 static int uhci_start(struct usb_hcd *hcd) 544 { 545 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 546 int retval = -EBUSY; 547 int i; 548 dma_addr_t dma_handle; 549 struct dentry *dentry; 550 551 hcd->uses_new_polling = 1; 552 if (pci_find_capability(to_pci_dev(uhci_dev(uhci)), PCI_CAP_ID_PM)) 553 hcd->can_wakeup = 1; /* Assume it supports PME# */ 554 555 dentry = debugfs_create_file(hcd->self.bus_name, 556 S_IFREG|S_IRUGO|S_IWUSR, uhci_debugfs_root, uhci, 557 &uhci_debug_operations); 558 if (!dentry) { 559 dev_err(uhci_dev(uhci), 560 "couldn't create uhci debugfs entry\n"); 561 retval = -ENOMEM; 562 goto err_create_debug_entry; 563 } 564 uhci->dentry = dentry; 565 566 uhci->fsbr = 0; 567 uhci->fsbrtimeout = 0; 568 569 spin_lock_init(&uhci->lock); 570 INIT_LIST_HEAD(&uhci->qh_remove_list); 571 572 INIT_LIST_HEAD(&uhci->td_remove_list); 573 574 INIT_LIST_HEAD(&uhci->urb_remove_list); 575 576 INIT_LIST_HEAD(&uhci->urb_list); 577 578 INIT_LIST_HEAD(&uhci->complete_list); 579 580 init_waitqueue_head(&uhci->waitqh); 581 582 uhci->fl = dma_alloc_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 583 &dma_handle, 0); 584 if (!uhci->fl) { 585 dev_err(uhci_dev(uhci), "unable to allocate " 586 "consistent memory for frame list\n"); 587 goto err_alloc_fl; 588 } 589 590 memset((void *)uhci->fl, 0, sizeof(*uhci->fl)); 591 592 uhci->fl->dma_handle = dma_handle; 593 594 uhci->td_pool = dma_pool_create("uhci_td", uhci_dev(uhci), 595 sizeof(struct uhci_td), 16, 0); 596 if (!uhci->td_pool) { 597 dev_err(uhci_dev(uhci), "unable to create td dma_pool\n"); 598 goto err_create_td_pool; 599 } 600 601 uhci->qh_pool = dma_pool_create("uhci_qh", uhci_dev(uhci), 602 sizeof(struct uhci_qh), 16, 0); 603 if (!uhci->qh_pool) { 604 dev_err(uhci_dev(uhci), "unable to create qh dma_pool\n"); 605 goto err_create_qh_pool; 606 } 607 608 uhci->term_td = uhci_alloc_td(uhci); 609 if (!uhci->term_td) { 610 dev_err(uhci_dev(uhci), "unable to allocate terminating TD\n"); 611 goto err_alloc_term_td; 612 } 613 614 for (i = 0; i < UHCI_NUM_SKELQH; i++) { 615 uhci->skelqh[i] = uhci_alloc_qh(uhci); 616 if (!uhci->skelqh[i]) { 617 dev_err(uhci_dev(uhci), "unable to allocate QH\n"); 618 goto err_alloc_skelqh; 619 } 620 } 621 622 /* 623 * 8 Interrupt queues; link all higher int queues to int1, 624 * then link int1 to control and control to bulk 625 */ 626 uhci->skel_int128_qh->link = 627 uhci->skel_int64_qh->link = 628 uhci->skel_int32_qh->link = 629 uhci->skel_int16_qh->link = 630 uhci->skel_int8_qh->link = 631 uhci->skel_int4_qh->link = 632 uhci->skel_int2_qh->link = 633 cpu_to_le32(uhci->skel_int1_qh->dma_handle) | UHCI_PTR_QH; 634 uhci->skel_int1_qh->link = cpu_to_le32(uhci->skel_ls_control_qh->dma_handle) | UHCI_PTR_QH; 635 636 uhci->skel_ls_control_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH; 637 uhci->skel_fs_control_qh->link = cpu_to_le32(uhci->skel_bulk_qh->dma_handle) | UHCI_PTR_QH; 638 uhci->skel_bulk_qh->link = cpu_to_le32(uhci->skel_term_qh->dma_handle) | UHCI_PTR_QH; 639 640 /* This dummy TD is to work around a bug in Intel PIIX controllers */ 641 uhci_fill_td(uhci->term_td, 0, (UHCI_NULL_DATA_SIZE << 21) | 642 (0x7f << TD_TOKEN_DEVADDR_SHIFT) | USB_PID_IN, 0); 643 uhci->term_td->link = cpu_to_le32(uhci->term_td->dma_handle); 644 645 uhci->skel_term_qh->link = UHCI_PTR_TERM; 646 uhci->skel_term_qh->element = cpu_to_le32(uhci->term_td->dma_handle); 647 648 /* 649 * Fill the frame list: make all entries point to the proper 650 * interrupt queue. 651 * 652 * The interrupt queues will be interleaved as evenly as possible. 653 * There's not much to be done about period-1 interrupts; they have 654 * to occur in every frame. But we can schedule period-2 interrupts 655 * in odd-numbered frames, period-4 interrupts in frames congruent 656 * to 2 (mod 4), and so on. This way each frame only has two 657 * interrupt QHs, which will help spread out bandwidth utilization. 658 */ 659 for (i = 0; i < UHCI_NUMFRAMES; i++) { 660 int irq; 661 662 /* 663 * ffs (Find First bit Set) does exactly what we need: 664 * 1,3,5,... => ffs = 0 => use skel_int2_qh = skelqh[6], 665 * 2,6,10,... => ffs = 1 => use skel_int4_qh = skelqh[5], etc. 666 * ffs > 6 => not on any high-period queue, so use 667 * skel_int1_qh = skelqh[7]. 668 * Add UHCI_NUMFRAMES to insure at least one bit is set. 669 */ 670 irq = 6 - (int) __ffs(i + UHCI_NUMFRAMES); 671 if (irq < 0) 672 irq = 7; 673 674 /* Only place we don't use the frame list routines */ 675 uhci->fl->frame[i] = UHCI_PTR_QH | 676 cpu_to_le32(uhci->skelqh[irq]->dma_handle); 677 } 678 679 /* 680 * Some architectures require a full mb() to enforce completion of 681 * the memory writes above before the I/O transfers in configure_hc(). 682 */ 683 mb(); 684 685 configure_hc(uhci); 686 start_rh(uhci); 687 return 0; 688 689 /* 690 * error exits: 691 */ 692 err_alloc_skelqh: 693 for (i = 0; i < UHCI_NUM_SKELQH; i++) 694 if (uhci->skelqh[i]) { 695 uhci_free_qh(uhci, uhci->skelqh[i]); 696 uhci->skelqh[i] = NULL; 697 } 698 699 uhci_free_td(uhci, uhci->term_td); 700 uhci->term_td = NULL; 701 702 err_alloc_term_td: 703 dma_pool_destroy(uhci->qh_pool); 704 uhci->qh_pool = NULL; 705 706 err_create_qh_pool: 707 dma_pool_destroy(uhci->td_pool); 708 uhci->td_pool = NULL; 709 710 err_create_td_pool: 711 dma_free_coherent(uhci_dev(uhci), sizeof(*uhci->fl), 712 uhci->fl, uhci->fl->dma_handle); 713 uhci->fl = NULL; 714 715 err_alloc_fl: 716 debugfs_remove(uhci->dentry); 717 uhci->dentry = NULL; 718 719 err_create_debug_entry: 720 return retval; 721 } 722 723 static void uhci_stop(struct usb_hcd *hcd) 724 { 725 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 726 727 spin_lock_irq(&uhci->lock); 728 if (!uhci->hc_inaccessible) 729 reset_hc(uhci); 730 uhci_scan_schedule(uhci, NULL); 731 spin_unlock_irq(&uhci->lock); 732 733 release_uhci(uhci); 734 } 735 736 #ifdef CONFIG_PM 737 static int uhci_rh_suspend(struct usb_hcd *hcd) 738 { 739 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 740 741 spin_lock_irq(&uhci->lock); 742 if (!uhci->hc_inaccessible) /* Not dead */ 743 suspend_rh(uhci, UHCI_RH_SUSPENDED); 744 spin_unlock_irq(&uhci->lock); 745 return 0; 746 } 747 748 static int uhci_rh_resume(struct usb_hcd *hcd) 749 { 750 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 751 int rc = 0; 752 753 spin_lock_irq(&uhci->lock); 754 if (uhci->hc_inaccessible) { 755 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 756 dev_warn(uhci_dev(uhci), "HC isn't running!\n"); 757 rc = -ENODEV; 758 } 759 /* Otherwise the HC is dead */ 760 } else 761 wakeup_rh(uhci); 762 spin_unlock_irq(&uhci->lock); 763 return rc; 764 } 765 766 static int uhci_suspend(struct usb_hcd *hcd, pm_message_t message) 767 { 768 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 769 int rc = 0; 770 771 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 772 773 spin_lock_irq(&uhci->lock); 774 if (uhci->hc_inaccessible) /* Dead or already suspended */ 775 goto done; 776 777 #ifndef CONFIG_USB_SUSPEND 778 /* Otherwise this would never happen */ 779 suspend_rh(uhci, UHCI_RH_SUSPENDED); 780 #endif 781 782 if (uhci->rh_state > UHCI_RH_SUSPENDED) { 783 dev_warn(uhci_dev(uhci), "Root hub isn't suspended!\n"); 784 hcd->state = HC_STATE_RUNNING; 785 rc = -EBUSY; 786 goto done; 787 }; 788 789 /* All PCI host controllers are required to disable IRQ generation 790 * at the source, so we must turn off PIRQ. 791 */ 792 pci_write_config_word(to_pci_dev(uhci_dev(uhci)), USBLEGSUP, 0); 793 uhci->hc_inaccessible = 1; 794 hcd->poll_rh = 0; 795 796 /* FIXME: Enable non-PME# remote wakeup? */ 797 798 done: 799 spin_unlock_irq(&uhci->lock); 800 return rc; 801 } 802 803 static int uhci_resume(struct usb_hcd *hcd) 804 { 805 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 806 807 dev_dbg(uhci_dev(uhci), "%s\n", __FUNCTION__); 808 809 if (uhci->rh_state == UHCI_RH_RESET) /* Dead */ 810 return 0; 811 spin_lock_irq(&uhci->lock); 812 813 /* FIXME: Disable non-PME# remote wakeup? */ 814 815 uhci->hc_inaccessible = 0; 816 817 /* The BIOS may have changed the controller settings during a 818 * system wakeup. Check it and reconfigure to avoid problems. 819 */ 820 check_and_reset_hc(uhci); 821 configure_hc(uhci); 822 823 #ifndef CONFIG_USB_SUSPEND 824 /* Otherwise this would never happen */ 825 wakeup_rh(uhci); 826 #endif 827 if (uhci->rh_state == UHCI_RH_RESET) 828 suspend_rh(uhci, UHCI_RH_SUSPENDED); 829 830 spin_unlock_irq(&uhci->lock); 831 832 if (!uhci->working_RD) { 833 /* Suspended root hub needs to be polled */ 834 hcd->poll_rh = 1; 835 usb_hcd_poll_rh_status(hcd); 836 } 837 return 0; 838 } 839 #endif 840 841 /* Wait until all the URBs for a particular device/endpoint are gone */ 842 static void uhci_hcd_endpoint_disable(struct usb_hcd *hcd, 843 struct usb_host_endpoint *ep) 844 { 845 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 846 847 wait_event_interruptible(uhci->waitqh, list_empty(&ep->urb_list)); 848 } 849 850 static int uhci_hcd_get_frame_number(struct usb_hcd *hcd) 851 { 852 struct uhci_hcd *uhci = hcd_to_uhci(hcd); 853 unsigned long flags; 854 int is_stopped; 855 int frame_number; 856 857 /* Minimize latency by avoiding the spinlock */ 858 local_irq_save(flags); 859 is_stopped = uhci->is_stopped; 860 smp_rmb(); 861 frame_number = (is_stopped ? uhci->frame_number : 862 inw(uhci->io_addr + USBFRNUM)); 863 local_irq_restore(flags); 864 return frame_number; 865 } 866 867 static const char hcd_name[] = "uhci_hcd"; 868 869 static const struct hc_driver uhci_driver = { 870 .description = hcd_name, 871 .product_desc = "UHCI Host Controller", 872 .hcd_priv_size = sizeof(struct uhci_hcd), 873 874 /* Generic hardware linkage */ 875 .irq = uhci_irq, 876 .flags = HCD_USB11, 877 878 /* Basic lifecycle operations */ 879 .reset = uhci_reset, 880 .start = uhci_start, 881 #ifdef CONFIG_PM 882 .suspend = uhci_suspend, 883 .resume = uhci_resume, 884 .hub_suspend = uhci_rh_suspend, 885 .hub_resume = uhci_rh_resume, 886 #endif 887 .stop = uhci_stop, 888 889 .urb_enqueue = uhci_urb_enqueue, 890 .urb_dequeue = uhci_urb_dequeue, 891 892 .endpoint_disable = uhci_hcd_endpoint_disable, 893 .get_frame_number = uhci_hcd_get_frame_number, 894 895 .hub_status_data = uhci_hub_status_data, 896 .hub_control = uhci_hub_control, 897 }; 898 899 static const struct pci_device_id uhci_pci_ids[] = { { 900 /* handle any USB UHCI controller */ 901 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x00), ~0), 902 .driver_data = (unsigned long) &uhci_driver, 903 }, { /* end: all zeroes */ } 904 }; 905 906 MODULE_DEVICE_TABLE(pci, uhci_pci_ids); 907 908 static struct pci_driver uhci_pci_driver = { 909 .name = (char *)hcd_name, 910 .id_table = uhci_pci_ids, 911 912 .probe = usb_hcd_pci_probe, 913 .remove = usb_hcd_pci_remove, 914 .shutdown = uhci_shutdown, 915 916 #ifdef CONFIG_PM 917 .suspend = usb_hcd_pci_suspend, 918 .resume = usb_hcd_pci_resume, 919 #endif /* PM */ 920 }; 921 922 static int __init uhci_hcd_init(void) 923 { 924 int retval = -ENOMEM; 925 926 printk(KERN_INFO DRIVER_DESC " " DRIVER_VERSION "\n"); 927 928 if (usb_disabled()) 929 return -ENODEV; 930 931 if (debug) { 932 errbuf = kmalloc(ERRBUF_LEN, GFP_KERNEL); 933 if (!errbuf) 934 goto errbuf_failed; 935 } 936 937 uhci_debugfs_root = debugfs_create_dir("uhci", NULL); 938 if (!uhci_debugfs_root) 939 goto debug_failed; 940 941 uhci_up_cachep = kmem_cache_create("uhci_urb_priv", 942 sizeof(struct urb_priv), 0, 0, NULL, NULL); 943 if (!uhci_up_cachep) 944 goto up_failed; 945 946 retval = pci_register_driver(&uhci_pci_driver); 947 if (retval) 948 goto init_failed; 949 950 return 0; 951 952 init_failed: 953 if (kmem_cache_destroy(uhci_up_cachep)) 954 warn("not all urb_priv's were freed!"); 955 956 up_failed: 957 debugfs_remove(uhci_debugfs_root); 958 959 debug_failed: 960 kfree(errbuf); 961 962 errbuf_failed: 963 964 return retval; 965 } 966 967 static void __exit uhci_hcd_cleanup(void) 968 { 969 pci_unregister_driver(&uhci_pci_driver); 970 971 if (kmem_cache_destroy(uhci_up_cachep)) 972 warn("not all urb_priv's were freed!"); 973 974 debugfs_remove(uhci_debugfs_root); 975 kfree(errbuf); 976 } 977 978 module_init(uhci_hcd_init); 979 module_exit(uhci_hcd_cleanup); 980 981 MODULE_AUTHOR(DRIVER_AUTHOR); 982 MODULE_DESCRIPTION(DRIVER_DESC); 983 MODULE_LICENSE("GPL"); 984