xref: /linux/drivers/usb/host/oxu210hp-hcd.c (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1 /*
2  * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3  * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
4  *
5  * This code is *strongly* based on EHCI-HCD code by David Brownell since
6  * the chip is a quasi-EHCI compatible.
7  *
8  * This program is free software; you can redistribute it and/or modify it
9  * under the terms of the GNU General Public License as published by the
10  * Free Software Foundation; either version 2 of the License, or (at your
11  * option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful, but
14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16  * for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software Foundation,
20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22 
23 #include <linux/module.h>
24 #include <linux/pci.h>
25 #include <linux/dmapool.h>
26 #include <linux/kernel.h>
27 #include <linux/delay.h>
28 #include <linux/ioport.h>
29 #include <linux/sched.h>
30 #include <linux/slab.h>
31 #include <linux/errno.h>
32 #include <linux/init.h>
33 #include <linux/timer.h>
34 #include <linux/list.h>
35 #include <linux/interrupt.h>
36 #include <linux/usb.h>
37 #include <linux/usb/hcd.h>
38 #include <linux/moduleparam.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/io.h>
41 
42 #include <asm/irq.h>
43 #include <asm/unaligned.h>
44 
45 #include <linux/irq.h>
46 #include <linux/platform_device.h>
47 
48 #include "oxu210hp.h"
49 
50 #define DRIVER_VERSION "0.0.50"
51 
52 /*
53  * Main defines
54  */
55 
56 #define oxu_dbg(oxu, fmt, args...) \
57 		dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
58 #define oxu_err(oxu, fmt, args...) \
59 		dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
60 #define oxu_info(oxu, fmt, args...) \
61 		dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62 
63 static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
64 {
65 	return container_of((void *) oxu, struct usb_hcd, hcd_priv);
66 }
67 
68 static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
69 {
70 	return (struct oxu_hcd *) (hcd->hcd_priv);
71 }
72 
73 /*
74  * Debug stuff
75  */
76 
77 #undef OXU_URB_TRACE
78 #undef OXU_VERBOSE_DEBUG
79 
80 #ifdef OXU_VERBOSE_DEBUG
81 #define oxu_vdbg			oxu_dbg
82 #else
83 #define oxu_vdbg(oxu, fmt, args...)	/* Nop */
84 #endif
85 
86 #ifdef DEBUG
87 
88 static int __attribute__((__unused__))
89 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
90 {
91 	return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
92 		label, label[0] ? " " : "", status,
93 		(status & STS_ASS) ? " Async" : "",
94 		(status & STS_PSS) ? " Periodic" : "",
95 		(status & STS_RECL) ? " Recl" : "",
96 		(status & STS_HALT) ? " Halt" : "",
97 		(status & STS_IAA) ? " IAA" : "",
98 		(status & STS_FATAL) ? " FATAL" : "",
99 		(status & STS_FLR) ? " FLR" : "",
100 		(status & STS_PCD) ? " PCD" : "",
101 		(status & STS_ERR) ? " ERR" : "",
102 		(status & STS_INT) ? " INT" : ""
103 		);
104 }
105 
106 static int __attribute__((__unused__))
107 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
108 {
109 	return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
110 		label, label[0] ? " " : "", enable,
111 		(enable & STS_IAA) ? " IAA" : "",
112 		(enable & STS_FATAL) ? " FATAL" : "",
113 		(enable & STS_FLR) ? " FLR" : "",
114 		(enable & STS_PCD) ? " PCD" : "",
115 		(enable & STS_ERR) ? " ERR" : "",
116 		(enable & STS_INT) ? " INT" : ""
117 		);
118 }
119 
120 static const char *const fls_strings[] =
121     { "1024", "512", "256", "??" };
122 
123 static int dbg_command_buf(char *buf, unsigned len,
124 				const char *label, u32 command)
125 {
126 	return scnprintf(buf, len,
127 		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
128 		label, label[0] ? " " : "", command,
129 		(command & CMD_PARK) ? "park" : "(park)",
130 		CMD_PARK_CNT(command),
131 		(command >> 16) & 0x3f,
132 		(command & CMD_LRESET) ? " LReset" : "",
133 		(command & CMD_IAAD) ? " IAAD" : "",
134 		(command & CMD_ASE) ? " Async" : "",
135 		(command & CMD_PSE) ? " Periodic" : "",
136 		fls_strings[(command >> 2) & 0x3],
137 		(command & CMD_RESET) ? " Reset" : "",
138 		(command & CMD_RUN) ? "RUN" : "HALT"
139 		);
140 }
141 
142 static int dbg_port_buf(char *buf, unsigned len, const char *label,
143 				int port, u32 status)
144 {
145 	char	*sig;
146 
147 	/* signaling state */
148 	switch (status & (3 << 10)) {
149 	case 0 << 10:
150 		sig = "se0";
151 		break;
152 	case 1 << 10:
153 		sig = "k";	/* low speed */
154 		break;
155 	case 2 << 10:
156 		sig = "j";
157 		break;
158 	default:
159 		sig = "?";
160 		break;
161 	}
162 
163 	return scnprintf(buf, len,
164 		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
165 		label, label[0] ? " " : "", port, status,
166 		(status & PORT_POWER) ? " POWER" : "",
167 		(status & PORT_OWNER) ? " OWNER" : "",
168 		sig,
169 		(status & PORT_RESET) ? " RESET" : "",
170 		(status & PORT_SUSPEND) ? " SUSPEND" : "",
171 		(status & PORT_RESUME) ? " RESUME" : "",
172 		(status & PORT_OCC) ? " OCC" : "",
173 		(status & PORT_OC) ? " OC" : "",
174 		(status & PORT_PEC) ? " PEC" : "",
175 		(status & PORT_PE) ? " PE" : "",
176 		(status & PORT_CSC) ? " CSC" : "",
177 		(status & PORT_CONNECT) ? " CONNECT" : ""
178 	    );
179 }
180 
181 #else
182 
183 static inline int __attribute__((__unused__))
184 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
185 { return 0; }
186 
187 static inline int __attribute__((__unused__))
188 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
189 { return 0; }
190 
191 static inline int __attribute__((__unused__))
192 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
193 { return 0; }
194 
195 static inline int __attribute__((__unused__))
196 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
197 { return 0; }
198 
199 #endif /* DEBUG */
200 
201 /* functions have the "wrong" filename when they're output... */
202 #define dbg_status(oxu, label, status) { \
203 	char _buf[80]; \
204 	dbg_status_buf(_buf, sizeof _buf, label, status); \
205 	oxu_dbg(oxu, "%s\n", _buf); \
206 }
207 
208 #define dbg_cmd(oxu, label, command) { \
209 	char _buf[80]; \
210 	dbg_command_buf(_buf, sizeof _buf, label, command); \
211 	oxu_dbg(oxu, "%s\n", _buf); \
212 }
213 
214 #define dbg_port(oxu, label, port, status) { \
215 	char _buf[80]; \
216 	dbg_port_buf(_buf, sizeof _buf, label, port, status); \
217 	oxu_dbg(oxu, "%s\n", _buf); \
218 }
219 
220 /*
221  * Module parameters
222  */
223 
224 /* Initial IRQ latency: faster than hw default */
225 static int log2_irq_thresh;			/* 0 to 6 */
226 module_param(log2_irq_thresh, int, S_IRUGO);
227 MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
228 
229 /* Initial park setting: slower than hw default */
230 static unsigned park;
231 module_param(park, uint, S_IRUGO);
232 MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
233 
234 /* For flakey hardware, ignore overcurrent indicators */
235 static bool ignore_oc;
236 module_param(ignore_oc, bool, S_IRUGO);
237 MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
238 
239 
240 static void ehci_work(struct oxu_hcd *oxu);
241 static int oxu_hub_control(struct usb_hcd *hcd,
242 				u16 typeReq, u16 wValue, u16 wIndex,
243 				char *buf, u16 wLength);
244 
245 /*
246  * Local functions
247  */
248 
249 /* Low level read/write registers functions */
250 static inline u32 oxu_readl(void *base, u32 reg)
251 {
252 	return readl(base + reg);
253 }
254 
255 static inline void oxu_writel(void *base, u32 reg, u32 val)
256 {
257 	writel(val, base + reg);
258 }
259 
260 static inline void timer_action_done(struct oxu_hcd *oxu,
261 					enum ehci_timer_action action)
262 {
263 	clear_bit(action, &oxu->actions);
264 }
265 
266 static inline void timer_action(struct oxu_hcd *oxu,
267 					enum ehci_timer_action action)
268 {
269 	if (!test_and_set_bit(action, &oxu->actions)) {
270 		unsigned long t;
271 
272 		switch (action) {
273 		case TIMER_IAA_WATCHDOG:
274 			t = EHCI_IAA_JIFFIES;
275 			break;
276 		case TIMER_IO_WATCHDOG:
277 			t = EHCI_IO_JIFFIES;
278 			break;
279 		case TIMER_ASYNC_OFF:
280 			t = EHCI_ASYNC_JIFFIES;
281 			break;
282 		case TIMER_ASYNC_SHRINK:
283 		default:
284 			t = EHCI_SHRINK_JIFFIES;
285 			break;
286 		}
287 		t += jiffies;
288 		/* all timings except IAA watchdog can be overridden.
289 		 * async queue SHRINK often precedes IAA.  while it's ready
290 		 * to go OFF neither can matter, and afterwards the IO
291 		 * watchdog stops unless there's still periodic traffic.
292 		 */
293 		if (action != TIMER_IAA_WATCHDOG
294 				&& t > oxu->watchdog.expires
295 				&& timer_pending(&oxu->watchdog))
296 			return;
297 		mod_timer(&oxu->watchdog, t);
298 	}
299 }
300 
301 /*
302  * handshake - spin reading hc until handshake completes or fails
303  * @ptr: address of hc register to be read
304  * @mask: bits to look at in result of read
305  * @done: value of those bits when handshake succeeds
306  * @usec: timeout in microseconds
307  *
308  * Returns negative errno, or zero on success
309  *
310  * Success happens when the "mask" bits have the specified value (hardware
311  * handshake done).  There are two failure modes:  "usec" have passed (major
312  * hardware flakeout), or the register reads as all-ones (hardware removed).
313  *
314  * That last failure should_only happen in cases like physical cardbus eject
315  * before driver shutdown. But it also seems to be caused by bugs in cardbus
316  * bridge shutdown:  shutting down the bridge before the devices using it.
317  */
318 static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
319 					u32 mask, u32 done, int usec)
320 {
321 	u32 result;
322 
323 	do {
324 		result = readl(ptr);
325 		if (result == ~(u32)0)		/* card removed */
326 			return -ENODEV;
327 		result &= mask;
328 		if (result == done)
329 			return 0;
330 		udelay(1);
331 		usec--;
332 	} while (usec > 0);
333 	return -ETIMEDOUT;
334 }
335 
336 /* Force HC to halt state from unknown (EHCI spec section 2.3) */
337 static int ehci_halt(struct oxu_hcd *oxu)
338 {
339 	u32	temp = readl(&oxu->regs->status);
340 
341 	/* disable any irqs left enabled by previous code */
342 	writel(0, &oxu->regs->intr_enable);
343 
344 	if ((temp & STS_HALT) != 0)
345 		return 0;
346 
347 	temp = readl(&oxu->regs->command);
348 	temp &= ~CMD_RUN;
349 	writel(temp, &oxu->regs->command);
350 	return handshake(oxu, &oxu->regs->status,
351 			  STS_HALT, STS_HALT, 16 * 125);
352 }
353 
354 /* Put TDI/ARC silicon into EHCI mode */
355 static void tdi_reset(struct oxu_hcd *oxu)
356 {
357 	u32 __iomem *reg_ptr;
358 	u32 tmp;
359 
360 	reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
361 	tmp = readl(reg_ptr);
362 	tmp |= 0x3;
363 	writel(tmp, reg_ptr);
364 }
365 
366 /* Reset a non-running (STS_HALT == 1) controller */
367 static int ehci_reset(struct oxu_hcd *oxu)
368 {
369 	int	retval;
370 	u32	command = readl(&oxu->regs->command);
371 
372 	command |= CMD_RESET;
373 	dbg_cmd(oxu, "reset", command);
374 	writel(command, &oxu->regs->command);
375 	oxu_to_hcd(oxu)->state = HC_STATE_HALT;
376 	oxu->next_statechange = jiffies;
377 	retval = handshake(oxu, &oxu->regs->command,
378 			    CMD_RESET, 0, 250 * 1000);
379 
380 	if (retval)
381 		return retval;
382 
383 	tdi_reset(oxu);
384 
385 	return retval;
386 }
387 
388 /* Idle the controller (from running) */
389 static void ehci_quiesce(struct oxu_hcd *oxu)
390 {
391 	u32	temp;
392 
393 #ifdef DEBUG
394 	if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
395 		BUG();
396 #endif
397 
398 	/* wait for any schedule enables/disables to take effect */
399 	temp = readl(&oxu->regs->command) << 10;
400 	temp &= STS_ASS | STS_PSS;
401 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
402 				temp, 16 * 125) != 0) {
403 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
404 		return;
405 	}
406 
407 	/* then disable anything that's still active */
408 	temp = readl(&oxu->regs->command);
409 	temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
410 	writel(temp, &oxu->regs->command);
411 
412 	/* hardware can take 16 microframes to turn off ... */
413 	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
414 				0, 16 * 125) != 0) {
415 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
416 		return;
417 	}
418 }
419 
420 static int check_reset_complete(struct oxu_hcd *oxu, int index,
421 				u32 __iomem *status_reg, int port_status)
422 {
423 	if (!(port_status & PORT_CONNECT)) {
424 		oxu->reset_done[index] = 0;
425 		return port_status;
426 	}
427 
428 	/* if reset finished and it's still not enabled -- handoff */
429 	if (!(port_status & PORT_PE)) {
430 		oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
431 				index+1);
432 		return port_status;
433 	} else
434 		oxu_dbg(oxu, "port %d high speed\n", index + 1);
435 
436 	return port_status;
437 }
438 
439 static void ehci_hub_descriptor(struct oxu_hcd *oxu,
440 				struct usb_hub_descriptor *desc)
441 {
442 	int ports = HCS_N_PORTS(oxu->hcs_params);
443 	u16 temp;
444 
445 	desc->bDescriptorType = 0x29;
446 	desc->bPwrOn2PwrGood = 10;	/* oxu 1.0, 2.3.9 says 20ms max */
447 	desc->bHubContrCurrent = 0;
448 
449 	desc->bNbrPorts = ports;
450 	temp = 1 + (ports / 8);
451 	desc->bDescLength = 7 + 2 * temp;
452 
453 	/* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
454 	memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
455 	memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
456 
457 	temp = 0x0008;			/* per-port overcurrent reporting */
458 	if (HCS_PPC(oxu->hcs_params))
459 		temp |= 0x0001;		/* per-port power control */
460 	else
461 		temp |= 0x0002;		/* no power switching */
462 	desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
463 }
464 
465 
466 /* Allocate an OXU210HP on-chip memory data buffer
467  *
468  * An on-chip memory data buffer is required for each OXU210HP USB transfer.
469  * Each transfer descriptor has one or more on-chip memory data buffers.
470  *
471  * Data buffers are allocated from a fix sized pool of data blocks.
472  * To minimise fragmentation and give reasonable memory utlisation,
473  * data buffers are allocated with sizes the power of 2 multiples of
474  * the block size, starting on an address a multiple of the allocated size.
475  *
476  * FIXME: callers of this function require a buffer to be allocated for
477  * len=0. This is a waste of on-chip memory and should be fix. Then this
478  * function should be changed to not allocate a buffer for len=0.
479  */
480 static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
481 {
482 	int n_blocks;	/* minium blocks needed to hold len */
483 	int a_blocks;	/* blocks allocated */
484 	int i, j;
485 
486 	/* Don't allocte bigger than supported */
487 	if (len > BUFFER_SIZE * BUFFER_NUM) {
488 		oxu_err(oxu, "buffer too big (%d)\n", len);
489 		return -ENOMEM;
490 	}
491 
492 	spin_lock(&oxu->mem_lock);
493 
494 	/* Number of blocks needed to hold len */
495 	n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
496 
497 	/* Round the number of blocks up to the power of 2 */
498 	for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
499 		;
500 
501 	/* Find a suitable available data buffer */
502 	for (i = 0; i < BUFFER_NUM;
503 			i += max(a_blocks, (int)oxu->db_used[i])) {
504 
505 		/* Check all the required blocks are available */
506 		for (j = 0; j < a_blocks; j++)
507 			if (oxu->db_used[i + j])
508 				break;
509 
510 		if (j != a_blocks)
511 			continue;
512 
513 		/* Allocate blocks found! */
514 		qtd->buffer = (void *) &oxu->mem->db_pool[i];
515 		qtd->buffer_dma = virt_to_phys(qtd->buffer);
516 
517 		qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
518 		oxu->db_used[i] = a_blocks;
519 
520 		spin_unlock(&oxu->mem_lock);
521 
522 		return 0;
523 	}
524 
525 	/* Failed */
526 
527 	spin_unlock(&oxu->mem_lock);
528 
529 	return -ENOMEM;
530 }
531 
532 static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
533 {
534 	int index;
535 
536 	spin_lock(&oxu->mem_lock);
537 
538 	index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
539 							 / BUFFER_SIZE;
540 	oxu->db_used[index] = 0;
541 	qtd->qtd_buffer_len = 0;
542 	qtd->buffer_dma = 0;
543 	qtd->buffer = NULL;
544 
545 	spin_unlock(&oxu->mem_lock);
546 }
547 
548 static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
549 {
550 	memset(qtd, 0, sizeof *qtd);
551 	qtd->qtd_dma = dma;
552 	qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
553 	qtd->hw_next = EHCI_LIST_END;
554 	qtd->hw_alt_next = EHCI_LIST_END;
555 	INIT_LIST_HEAD(&qtd->qtd_list);
556 }
557 
558 static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
559 {
560 	int index;
561 
562 	if (qtd->buffer)
563 		oxu_buf_free(oxu, qtd);
564 
565 	spin_lock(&oxu->mem_lock);
566 
567 	index = qtd - &oxu->mem->qtd_pool[0];
568 	oxu->qtd_used[index] = 0;
569 
570 	spin_unlock(&oxu->mem_lock);
571 }
572 
573 static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
574 {
575 	int i;
576 	struct ehci_qtd *qtd = NULL;
577 
578 	spin_lock(&oxu->mem_lock);
579 
580 	for (i = 0; i < QTD_NUM; i++)
581 		if (!oxu->qtd_used[i])
582 			break;
583 
584 	if (i < QTD_NUM) {
585 		qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
586 		memset(qtd, 0, sizeof *qtd);
587 
588 		qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
589 		qtd->hw_next = EHCI_LIST_END;
590 		qtd->hw_alt_next = EHCI_LIST_END;
591 		INIT_LIST_HEAD(&qtd->qtd_list);
592 
593 		qtd->qtd_dma = virt_to_phys(qtd);
594 
595 		oxu->qtd_used[i] = 1;
596 	}
597 
598 	spin_unlock(&oxu->mem_lock);
599 
600 	return qtd;
601 }
602 
603 static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
604 {
605 	int index;
606 
607 	spin_lock(&oxu->mem_lock);
608 
609 	index = qh - &oxu->mem->qh_pool[0];
610 	oxu->qh_used[index] = 0;
611 
612 	spin_unlock(&oxu->mem_lock);
613 }
614 
615 static void qh_destroy(struct kref *kref)
616 {
617 	struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
618 	struct oxu_hcd *oxu = qh->oxu;
619 
620 	/* clean qtds first, and know this is not linked */
621 	if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
622 		oxu_dbg(oxu, "unused qh not empty!\n");
623 		BUG();
624 	}
625 	if (qh->dummy)
626 		oxu_qtd_free(oxu, qh->dummy);
627 	oxu_qh_free(oxu, qh);
628 }
629 
630 static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
631 {
632 	int i;
633 	struct ehci_qh *qh = NULL;
634 
635 	spin_lock(&oxu->mem_lock);
636 
637 	for (i = 0; i < QHEAD_NUM; i++)
638 		if (!oxu->qh_used[i])
639 			break;
640 
641 	if (i < QHEAD_NUM) {
642 		qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
643 		memset(qh, 0, sizeof *qh);
644 
645 		kref_init(&qh->kref);
646 		qh->oxu = oxu;
647 		qh->qh_dma = virt_to_phys(qh);
648 		INIT_LIST_HEAD(&qh->qtd_list);
649 
650 		/* dummy td enables safe urb queuing */
651 		qh->dummy = ehci_qtd_alloc(oxu);
652 		if (qh->dummy == NULL) {
653 			oxu_dbg(oxu, "no dummy td\n");
654 			oxu->qh_used[i] = 0;
655 			qh = NULL;
656 			goto unlock;
657 		}
658 
659 		oxu->qh_used[i] = 1;
660 	}
661 unlock:
662 	spin_unlock(&oxu->mem_lock);
663 
664 	return qh;
665 }
666 
667 /* to share a qh (cpu threads, or hc) */
668 static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
669 {
670 	kref_get(&qh->kref);
671 	return qh;
672 }
673 
674 static inline void qh_put(struct ehci_qh *qh)
675 {
676 	kref_put(&qh->kref, qh_destroy);
677 }
678 
679 static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
680 {
681 	int index;
682 
683 	spin_lock(&oxu->mem_lock);
684 
685 	index = murb - &oxu->murb_pool[0];
686 	oxu->murb_used[index] = 0;
687 
688 	spin_unlock(&oxu->mem_lock);
689 }
690 
691 static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
692 
693 {
694 	int i;
695 	struct oxu_murb *murb = NULL;
696 
697 	spin_lock(&oxu->mem_lock);
698 
699 	for (i = 0; i < MURB_NUM; i++)
700 		if (!oxu->murb_used[i])
701 			break;
702 
703 	if (i < MURB_NUM) {
704 		murb = &(oxu->murb_pool)[i];
705 
706 		oxu->murb_used[i] = 1;
707 	}
708 
709 	spin_unlock(&oxu->mem_lock);
710 
711 	return murb;
712 }
713 
714 /* The queue heads and transfer descriptors are managed from pools tied
715  * to each of the "per device" structures.
716  * This is the initialisation and cleanup code.
717  */
718 static void ehci_mem_cleanup(struct oxu_hcd *oxu)
719 {
720 	kfree(oxu->murb_pool);
721 	oxu->murb_pool = NULL;
722 
723 	if (oxu->async)
724 		qh_put(oxu->async);
725 	oxu->async = NULL;
726 
727 	del_timer(&oxu->urb_timer);
728 
729 	oxu->periodic = NULL;
730 
731 	/* shadow periodic table */
732 	kfree(oxu->pshadow);
733 	oxu->pshadow = NULL;
734 }
735 
736 /* Remember to add cleanup code (above) if you add anything here.
737  */
738 static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
739 {
740 	int i;
741 
742 	for (i = 0; i < oxu->periodic_size; i++)
743 		oxu->mem->frame_list[i] = EHCI_LIST_END;
744 	for (i = 0; i < QHEAD_NUM; i++)
745 		oxu->qh_used[i] = 0;
746 	for (i = 0; i < QTD_NUM; i++)
747 		oxu->qtd_used[i] = 0;
748 
749 	oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
750 	if (!oxu->murb_pool)
751 		goto fail;
752 
753 	for (i = 0; i < MURB_NUM; i++)
754 		oxu->murb_used[i] = 0;
755 
756 	oxu->async = oxu_qh_alloc(oxu);
757 	if (!oxu->async)
758 		goto fail;
759 
760 	oxu->periodic = (__le32 *) &oxu->mem->frame_list;
761 	oxu->periodic_dma = virt_to_phys(oxu->periodic);
762 
763 	for (i = 0; i < oxu->periodic_size; i++)
764 		oxu->periodic[i] = EHCI_LIST_END;
765 
766 	/* software shadow of hardware table */
767 	oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
768 	if (oxu->pshadow != NULL)
769 		return 0;
770 
771 fail:
772 	oxu_dbg(oxu, "couldn't init memory\n");
773 	ehci_mem_cleanup(oxu);
774 	return -ENOMEM;
775 }
776 
777 /* Fill a qtd, returning how much of the buffer we were able to queue up.
778  */
779 static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
780 				int token, int maxpacket)
781 {
782 	int i, count;
783 	u64 addr = buf;
784 
785 	/* one buffer entry per 4K ... first might be short or unaligned */
786 	qtd->hw_buf[0] = cpu_to_le32((u32)addr);
787 	qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
788 	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
789 	if (likely(len < count))		/* ... iff needed */
790 		count = len;
791 	else {
792 		buf +=  0x1000;
793 		buf &= ~0x0fff;
794 
795 		/* per-qtd limit: from 16K to 20K (best alignment) */
796 		for (i = 1; count < len && i < 5; i++) {
797 			addr = buf;
798 			qtd->hw_buf[i] = cpu_to_le32((u32)addr);
799 			qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
800 			buf += 0x1000;
801 			if ((count + 0x1000) < len)
802 				count += 0x1000;
803 			else
804 				count = len;
805 		}
806 
807 		/* short packets may only terminate transfers */
808 		if (count != len)
809 			count -= (count % maxpacket);
810 	}
811 	qtd->hw_token = cpu_to_le32((count << 16) | token);
812 	qtd->length = count;
813 
814 	return count;
815 }
816 
817 static inline void qh_update(struct oxu_hcd *oxu,
818 				struct ehci_qh *qh, struct ehci_qtd *qtd)
819 {
820 	/* writes to an active overlay are unsafe */
821 	BUG_ON(qh->qh_state != QH_STATE_IDLE);
822 
823 	qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
824 	qh->hw_alt_next = EHCI_LIST_END;
825 
826 	/* Except for control endpoints, we make hardware maintain data
827 	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
828 	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
829 	 * ever clear it.
830 	 */
831 	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
832 		unsigned	is_out, epnum;
833 
834 		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
835 		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
836 		if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
837 			qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
838 			usb_settoggle(qh->dev, epnum, is_out, 1);
839 		}
840 	}
841 
842 	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
843 	wmb();
844 	qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
845 }
846 
847 /* If it weren't for a common silicon quirk (writing the dummy into the qh
848  * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
849  * recovery (including urb dequeue) would need software changes to a QH...
850  */
851 static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
852 {
853 	struct ehci_qtd *qtd;
854 
855 	if (list_empty(&qh->qtd_list))
856 		qtd = qh->dummy;
857 	else {
858 		qtd = list_entry(qh->qtd_list.next,
859 				struct ehci_qtd, qtd_list);
860 		/* first qtd may already be partially processed */
861 		if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
862 			qtd = NULL;
863 	}
864 
865 	if (qtd)
866 		qh_update(oxu, qh, qtd);
867 }
868 
869 static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
870 				size_t length, u32 token)
871 {
872 	/* count IN/OUT bytes, not SETUP (even short packets) */
873 	if (likely(QTD_PID(token) != 2))
874 		urb->actual_length += length - QTD_LENGTH(token);
875 
876 	/* don't modify error codes */
877 	if (unlikely(urb->status != -EINPROGRESS))
878 		return;
879 
880 	/* force cleanup after short read; not always an error */
881 	if (unlikely(IS_SHORT_READ(token)))
882 		urb->status = -EREMOTEIO;
883 
884 	/* serious "can't proceed" faults reported by the hardware */
885 	if (token & QTD_STS_HALT) {
886 		if (token & QTD_STS_BABBLE) {
887 			/* FIXME "must" disable babbling device's port too */
888 			urb->status = -EOVERFLOW;
889 		} else if (token & QTD_STS_MMF) {
890 			/* fs/ls interrupt xfer missed the complete-split */
891 			urb->status = -EPROTO;
892 		} else if (token & QTD_STS_DBE) {
893 			urb->status = (QTD_PID(token) == 1) /* IN ? */
894 				? -ENOSR  /* hc couldn't read data */
895 				: -ECOMM; /* hc couldn't write data */
896 		} else if (token & QTD_STS_XACT) {
897 			/* timeout, bad crc, wrong PID, etc; retried */
898 			if (QTD_CERR(token))
899 				urb->status = -EPIPE;
900 			else {
901 				oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
902 					urb->dev->devpath,
903 					usb_pipeendpoint(urb->pipe),
904 					usb_pipein(urb->pipe) ? "in" : "out");
905 				urb->status = -EPROTO;
906 			}
907 		/* CERR nonzero + no errors + halt --> stall */
908 		} else if (QTD_CERR(token))
909 			urb->status = -EPIPE;
910 		else	/* unknown */
911 			urb->status = -EPROTO;
912 
913 		oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
914 			usb_pipedevice(urb->pipe),
915 			usb_pipeendpoint(urb->pipe),
916 			usb_pipein(urb->pipe) ? "in" : "out",
917 			token, urb->status);
918 	}
919 }
920 
921 static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
922 __releases(oxu->lock)
923 __acquires(oxu->lock)
924 {
925 	if (likely(urb->hcpriv != NULL)) {
926 		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
927 
928 		/* S-mask in a QH means it's an interrupt urb */
929 		if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
930 
931 			/* ... update hc-wide periodic stats (for usbfs) */
932 			oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
933 		}
934 		qh_put(qh);
935 	}
936 
937 	urb->hcpriv = NULL;
938 	switch (urb->status) {
939 	case -EINPROGRESS:		/* success */
940 		urb->status = 0;
941 	default:			/* fault */
942 		break;
943 	case -EREMOTEIO:		/* fault or normal */
944 		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
945 			urb->status = 0;
946 		break;
947 	case -ECONNRESET:		/* canceled */
948 	case -ENOENT:
949 		break;
950 	}
951 
952 #ifdef OXU_URB_TRACE
953 	oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
954 		__func__, urb->dev->devpath, urb,
955 		usb_pipeendpoint(urb->pipe),
956 		usb_pipein(urb->pipe) ? "in" : "out",
957 		urb->status,
958 		urb->actual_length, urb->transfer_buffer_length);
959 #endif
960 
961 	/* complete() can reenter this HCD */
962 	spin_unlock(&oxu->lock);
963 	usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
964 	spin_lock(&oxu->lock);
965 }
966 
967 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
968 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
969 
970 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
971 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
972 
973 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
974 
975 /* Process and free completed qtds for a qh, returning URBs to drivers.
976  * Chases up to qh->hw_current.  Returns number of completions called,
977  * indicating how much "real" work we did.
978  */
979 static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
980 {
981 	struct ehci_qtd *last = NULL, *end = qh->dummy;
982 	struct list_head *entry, *tmp;
983 	int stopped;
984 	unsigned count = 0;
985 	int do_status = 0;
986 	u8 state;
987 	struct oxu_murb *murb = NULL;
988 
989 	if (unlikely(list_empty(&qh->qtd_list)))
990 		return count;
991 
992 	/* completions (or tasks on other cpus) must never clobber HALT
993 	 * till we've gone through and cleaned everything up, even when
994 	 * they add urbs to this qh's queue or mark them for unlinking.
995 	 *
996 	 * NOTE:  unlinking expects to be done in queue order.
997 	 */
998 	state = qh->qh_state;
999 	qh->qh_state = QH_STATE_COMPLETING;
1000 	stopped = (state == QH_STATE_IDLE);
1001 
1002 	/* remove de-activated QTDs from front of queue.
1003 	 * after faults (including short reads), cleanup this urb
1004 	 * then let the queue advance.
1005 	 * if queue is stopped, handles unlinks.
1006 	 */
1007 	list_for_each_safe(entry, tmp, &qh->qtd_list) {
1008 		struct ehci_qtd	*qtd;
1009 		struct urb *urb;
1010 		u32 token = 0;
1011 
1012 		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1013 		urb = qtd->urb;
1014 
1015 		/* Clean up any state from previous QTD ...*/
1016 		if (last) {
1017 			if (likely(last->urb != urb)) {
1018 				if (last->urb->complete == NULL) {
1019 					murb = (struct oxu_murb *) last->urb;
1020 					last->urb = murb->main;
1021 					if (murb->last) {
1022 						ehci_urb_done(oxu, last->urb);
1023 						count++;
1024 					}
1025 					oxu_murb_free(oxu, murb);
1026 				} else {
1027 					ehci_urb_done(oxu, last->urb);
1028 					count++;
1029 				}
1030 			}
1031 			oxu_qtd_free(oxu, last);
1032 			last = NULL;
1033 		}
1034 
1035 		/* ignore urbs submitted during completions we reported */
1036 		if (qtd == end)
1037 			break;
1038 
1039 		/* hardware copies qtd out of qh overlay */
1040 		rmb();
1041 		token = le32_to_cpu(qtd->hw_token);
1042 
1043 		/* always clean up qtds the hc de-activated */
1044 		if ((token & QTD_STS_ACTIVE) == 0) {
1045 
1046 			if ((token & QTD_STS_HALT) != 0) {
1047 				stopped = 1;
1048 
1049 			/* magic dummy for some short reads; qh won't advance.
1050 			 * that silicon quirk can kick in with this dummy too.
1051 			 */
1052 			} else if (IS_SHORT_READ(token) &&
1053 					!(qtd->hw_alt_next & EHCI_LIST_END)) {
1054 				stopped = 1;
1055 				goto halt;
1056 			}
1057 
1058 		/* stop scanning when we reach qtds the hc is using */
1059 		} else if (likely(!stopped &&
1060 				HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1061 			break;
1062 
1063 		} else {
1064 			stopped = 1;
1065 
1066 			if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1067 				urb->status = -ESHUTDOWN;
1068 
1069 			/* ignore active urbs unless some previous qtd
1070 			 * for the urb faulted (including short read) or
1071 			 * its urb was canceled.  we may patch qh or qtds.
1072 			 */
1073 			if (likely(urb->status == -EINPROGRESS))
1074 				continue;
1075 
1076 			/* issue status after short control reads */
1077 			if (unlikely(do_status != 0)
1078 					&& QTD_PID(token) == 0 /* OUT */) {
1079 				do_status = 0;
1080 				continue;
1081 			}
1082 
1083 			/* token in overlay may be most current */
1084 			if (state == QH_STATE_IDLE
1085 					&& cpu_to_le32(qtd->qtd_dma)
1086 						== qh->hw_current)
1087 				token = le32_to_cpu(qh->hw_token);
1088 
1089 			/* force halt for unlinked or blocked qh, so we'll
1090 			 * patch the qh later and so that completions can't
1091 			 * activate it while we "know" it's stopped.
1092 			 */
1093 			if ((HALT_BIT & qh->hw_token) == 0) {
1094 halt:
1095 				qh->hw_token |= HALT_BIT;
1096 				wmb();
1097 			}
1098 		}
1099 
1100 		/* Remove it from the queue */
1101 		qtd_copy_status(oxu, urb->complete ?
1102 					urb : ((struct oxu_murb *) urb)->main,
1103 				qtd->length, token);
1104 		if ((usb_pipein(qtd->urb->pipe)) &&
1105 				(NULL != qtd->transfer_buffer))
1106 			memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1107 		do_status = (urb->status == -EREMOTEIO)
1108 				&& usb_pipecontrol(urb->pipe);
1109 
1110 		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1111 			last = list_entry(qtd->qtd_list.prev,
1112 					struct ehci_qtd, qtd_list);
1113 			last->hw_next = qtd->hw_next;
1114 		}
1115 		list_del(&qtd->qtd_list);
1116 		last = qtd;
1117 	}
1118 
1119 	/* last urb's completion might still need calling */
1120 	if (likely(last != NULL)) {
1121 		if (last->urb->complete == NULL) {
1122 			murb = (struct oxu_murb *) last->urb;
1123 			last->urb = murb->main;
1124 			if (murb->last) {
1125 				ehci_urb_done(oxu, last->urb);
1126 				count++;
1127 			}
1128 			oxu_murb_free(oxu, murb);
1129 		} else {
1130 			ehci_urb_done(oxu, last->urb);
1131 			count++;
1132 		}
1133 		oxu_qtd_free(oxu, last);
1134 	}
1135 
1136 	/* restore original state; caller must unlink or relink */
1137 	qh->qh_state = state;
1138 
1139 	/* be sure the hardware's done with the qh before refreshing
1140 	 * it after fault cleanup, or recovering from silicon wrongly
1141 	 * overlaying the dummy qtd (which reduces DMA chatter).
1142 	 */
1143 	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1144 		switch (state) {
1145 		case QH_STATE_IDLE:
1146 			qh_refresh(oxu, qh);
1147 			break;
1148 		case QH_STATE_LINKED:
1149 			/* should be rare for periodic transfers,
1150 			 * except maybe high bandwidth ...
1151 			 */
1152 			if ((cpu_to_le32(QH_SMASK)
1153 					& qh->hw_info2) != 0) {
1154 				intr_deschedule(oxu, qh);
1155 				(void) qh_schedule(oxu, qh);
1156 			} else
1157 				unlink_async(oxu, qh);
1158 			break;
1159 		/* otherwise, unlink already started */
1160 		}
1161 	}
1162 
1163 	return count;
1164 }
1165 
1166 /* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1167 #define hb_mult(wMaxPacketSize)		(1 + (((wMaxPacketSize) >> 11) & 0x03))
1168 /* ... and packet size, for any kind of endpoint descriptor */
1169 #define max_packet(wMaxPacketSize)	((wMaxPacketSize) & 0x07ff)
1170 
1171 /* Reverse of qh_urb_transaction: free a list of TDs.
1172  * used for cleanup after errors, before HC sees an URB's TDs.
1173  */
1174 static void qtd_list_free(struct oxu_hcd *oxu,
1175 				struct urb *urb, struct list_head *qtd_list)
1176 {
1177 	struct list_head *entry, *temp;
1178 
1179 	list_for_each_safe(entry, temp, qtd_list) {
1180 		struct ehci_qtd	*qtd;
1181 
1182 		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1183 		list_del(&qtd->qtd_list);
1184 		oxu_qtd_free(oxu, qtd);
1185 	}
1186 }
1187 
1188 /* Create a list of filled qtds for this URB; won't link into qh.
1189  */
1190 static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1191 						struct urb *urb,
1192 						struct list_head *head,
1193 						gfp_t flags)
1194 {
1195 	struct ehci_qtd	*qtd, *qtd_prev;
1196 	dma_addr_t buf;
1197 	int len, maxpacket;
1198 	int is_input;
1199 	u32 token;
1200 	void *transfer_buf = NULL;
1201 	int ret;
1202 
1203 	/*
1204 	 * URBs map to sequences of QTDs: one logical transaction
1205 	 */
1206 	qtd = ehci_qtd_alloc(oxu);
1207 	if (unlikely(!qtd))
1208 		return NULL;
1209 	list_add_tail(&qtd->qtd_list, head);
1210 	qtd->urb = urb;
1211 
1212 	token = QTD_STS_ACTIVE;
1213 	token |= (EHCI_TUNE_CERR << 10);
1214 	/* for split transactions, SplitXState initialized to zero */
1215 
1216 	len = urb->transfer_buffer_length;
1217 	is_input = usb_pipein(urb->pipe);
1218 	if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1219 		urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1220 
1221 	if (usb_pipecontrol(urb->pipe)) {
1222 		/* SETUP pid */
1223 		ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1224 		if (ret)
1225 			goto cleanup;
1226 
1227 		qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1228 				token | (2 /* "setup" */ << 8), 8);
1229 		memcpy(qtd->buffer, qtd->urb->setup_packet,
1230 				sizeof(struct usb_ctrlrequest));
1231 
1232 		/* ... and always at least one more pid */
1233 		token ^= QTD_TOGGLE;
1234 		qtd_prev = qtd;
1235 		qtd = ehci_qtd_alloc(oxu);
1236 		if (unlikely(!qtd))
1237 			goto cleanup;
1238 		qtd->urb = urb;
1239 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1240 		list_add_tail(&qtd->qtd_list, head);
1241 
1242 		/* for zero length DATA stages, STATUS is always IN */
1243 		if (len == 0)
1244 			token |= (1 /* "in" */ << 8);
1245 	}
1246 
1247 	/*
1248 	 * Data transfer stage: buffer setup
1249 	 */
1250 
1251 	ret = oxu_buf_alloc(oxu, qtd, len);
1252 	if (ret)
1253 		goto cleanup;
1254 
1255 	buf = qtd->buffer_dma;
1256 	transfer_buf = urb->transfer_buffer;
1257 
1258 	if (!is_input)
1259 		memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1260 
1261 	if (is_input)
1262 		token |= (1 /* "in" */ << 8);
1263 	/* else it's already initted to "out" pid (0 << 8) */
1264 
1265 	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1266 
1267 	/*
1268 	 * buffer gets wrapped in one or more qtds;
1269 	 * last one may be "short" (including zero len)
1270 	 * and may serve as a control status ack
1271 	 */
1272 	for (;;) {
1273 		int this_qtd_len;
1274 
1275 		this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1276 		qtd->transfer_buffer = transfer_buf;
1277 		len -= this_qtd_len;
1278 		buf += this_qtd_len;
1279 		transfer_buf += this_qtd_len;
1280 		if (is_input)
1281 			qtd->hw_alt_next = oxu->async->hw_alt_next;
1282 
1283 		/* qh makes control packets use qtd toggle; maybe switch it */
1284 		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1285 			token ^= QTD_TOGGLE;
1286 
1287 		if (likely(len <= 0))
1288 			break;
1289 
1290 		qtd_prev = qtd;
1291 		qtd = ehci_qtd_alloc(oxu);
1292 		if (unlikely(!qtd))
1293 			goto cleanup;
1294 		if (likely(len > 0)) {
1295 			ret = oxu_buf_alloc(oxu, qtd, len);
1296 			if (ret)
1297 				goto cleanup;
1298 		}
1299 		qtd->urb = urb;
1300 		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1301 		list_add_tail(&qtd->qtd_list, head);
1302 	}
1303 
1304 	/* unless the bulk/interrupt caller wants a chance to clean
1305 	 * up after short reads, hc should advance qh past this urb
1306 	 */
1307 	if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1308 				|| usb_pipecontrol(urb->pipe)))
1309 		qtd->hw_alt_next = EHCI_LIST_END;
1310 
1311 	/*
1312 	 * control requests may need a terminating data "status" ack;
1313 	 * bulk ones may need a terminating short packet (zero length).
1314 	 */
1315 	if (likely(urb->transfer_buffer_length != 0)) {
1316 		int	one_more = 0;
1317 
1318 		if (usb_pipecontrol(urb->pipe)) {
1319 			one_more = 1;
1320 			token ^= 0x0100;	/* "in" <--> "out"  */
1321 			token |= QTD_TOGGLE;	/* force DATA1 */
1322 		} else if (usb_pipebulk(urb->pipe)
1323 				&& (urb->transfer_flags & URB_ZERO_PACKET)
1324 				&& !(urb->transfer_buffer_length % maxpacket)) {
1325 			one_more = 1;
1326 		}
1327 		if (one_more) {
1328 			qtd_prev = qtd;
1329 			qtd = ehci_qtd_alloc(oxu);
1330 			if (unlikely(!qtd))
1331 				goto cleanup;
1332 			qtd->urb = urb;
1333 			qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1334 			list_add_tail(&qtd->qtd_list, head);
1335 
1336 			/* never any data in such packets */
1337 			qtd_fill(qtd, 0, 0, token, 0);
1338 		}
1339 	}
1340 
1341 	/* by default, enable interrupt on urb completion */
1342 		qtd->hw_token |= cpu_to_le32(QTD_IOC);
1343 	return head;
1344 
1345 cleanup:
1346 	qtd_list_free(oxu, urb, head);
1347 	return NULL;
1348 }
1349 
1350 /* Each QH holds a qtd list; a QH is used for everything except iso.
1351  *
1352  * For interrupt urbs, the scheduler must set the microframe scheduling
1353  * mask(s) each time the QH gets scheduled.  For highspeed, that's
1354  * just one microframe in the s-mask.  For split interrupt transactions
1355  * there are additional complications: c-mask, maybe FSTNs.
1356  */
1357 static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1358 				struct urb *urb, gfp_t flags)
1359 {
1360 	struct ehci_qh *qh = oxu_qh_alloc(oxu);
1361 	u32 info1 = 0, info2 = 0;
1362 	int is_input, type;
1363 	int maxp = 0;
1364 
1365 	if (!qh)
1366 		return qh;
1367 
1368 	/*
1369 	 * init endpoint/device data for this QH
1370 	 */
1371 	info1 |= usb_pipeendpoint(urb->pipe) << 8;
1372 	info1 |= usb_pipedevice(urb->pipe) << 0;
1373 
1374 	is_input = usb_pipein(urb->pipe);
1375 	type = usb_pipetype(urb->pipe);
1376 	maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1377 
1378 	/* Compute interrupt scheduling parameters just once, and save.
1379 	 * - allowing for high bandwidth, how many nsec/uframe are used?
1380 	 * - split transactions need a second CSPLIT uframe; same question
1381 	 * - splits also need a schedule gap (for full/low speed I/O)
1382 	 * - qh has a polling interval
1383 	 *
1384 	 * For control/bulk requests, the HC or TT handles these.
1385 	 */
1386 	if (type == PIPE_INTERRUPT) {
1387 		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1388 								is_input, 0,
1389 				hb_mult(maxp) * max_packet(maxp)));
1390 		qh->start = NO_FRAME;
1391 
1392 		if (urb->dev->speed == USB_SPEED_HIGH) {
1393 			qh->c_usecs = 0;
1394 			qh->gap_uf = 0;
1395 
1396 			qh->period = urb->interval >> 3;
1397 			if (qh->period == 0 && urb->interval != 1) {
1398 				/* NOTE interval 2 or 4 uframes could work.
1399 				 * But interval 1 scheduling is simpler, and
1400 				 * includes high bandwidth.
1401 				 */
1402 				oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1403 					urb->interval);
1404 				goto done;
1405 			}
1406 		} else {
1407 			struct usb_tt	*tt = urb->dev->tt;
1408 			int		think_time;
1409 
1410 			/* gap is f(FS/LS transfer times) */
1411 			qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1412 					is_input, 0, maxp) / (125 * 1000);
1413 
1414 			/* FIXME this just approximates SPLIT/CSPLIT times */
1415 			if (is_input) {		/* SPLIT, gap, CSPLIT+DATA */
1416 				qh->c_usecs = qh->usecs + HS_USECS(0);
1417 				qh->usecs = HS_USECS(1);
1418 			} else {		/* SPLIT+DATA, gap, CSPLIT */
1419 				qh->usecs += HS_USECS(1);
1420 				qh->c_usecs = HS_USECS(0);
1421 			}
1422 
1423 			think_time = tt ? tt->think_time : 0;
1424 			qh->tt_usecs = NS_TO_US(think_time +
1425 					usb_calc_bus_time(urb->dev->speed,
1426 					is_input, 0, max_packet(maxp)));
1427 			qh->period = urb->interval;
1428 		}
1429 	}
1430 
1431 	/* support for tt scheduling, and access to toggles */
1432 	qh->dev = urb->dev;
1433 
1434 	/* using TT? */
1435 	switch (urb->dev->speed) {
1436 	case USB_SPEED_LOW:
1437 		info1 |= (1 << 12);	/* EPS "low" */
1438 		/* FALL THROUGH */
1439 
1440 	case USB_SPEED_FULL:
1441 		/* EPS 0 means "full" */
1442 		if (type != PIPE_INTERRUPT)
1443 			info1 |= (EHCI_TUNE_RL_TT << 28);
1444 		if (type == PIPE_CONTROL) {
1445 			info1 |= (1 << 27);	/* for TT */
1446 			info1 |= 1 << 14;	/* toggle from qtd */
1447 		}
1448 		info1 |= maxp << 16;
1449 
1450 		info2 |= (EHCI_TUNE_MULT_TT << 30);
1451 		info2 |= urb->dev->ttport << 23;
1452 
1453 		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1454 
1455 		break;
1456 
1457 	case USB_SPEED_HIGH:		/* no TT involved */
1458 		info1 |= (2 << 12);	/* EPS "high" */
1459 		if (type == PIPE_CONTROL) {
1460 			info1 |= (EHCI_TUNE_RL_HS << 28);
1461 			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
1462 			info1 |= 1 << 14;	/* toggle from qtd */
1463 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1464 		} else if (type == PIPE_BULK) {
1465 			info1 |= (EHCI_TUNE_RL_HS << 28);
1466 			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
1467 			info2 |= (EHCI_TUNE_MULT_HS << 30);
1468 		} else {		/* PIPE_INTERRUPT */
1469 			info1 |= max_packet(maxp) << 16;
1470 			info2 |= hb_mult(maxp) << 30;
1471 		}
1472 		break;
1473 	default:
1474 		oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1475 done:
1476 		qh_put(qh);
1477 		return NULL;
1478 	}
1479 
1480 	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1481 
1482 	/* init as live, toggle clear, advance to dummy */
1483 	qh->qh_state = QH_STATE_IDLE;
1484 	qh->hw_info1 = cpu_to_le32(info1);
1485 	qh->hw_info2 = cpu_to_le32(info2);
1486 	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1487 	qh_refresh(oxu, qh);
1488 	return qh;
1489 }
1490 
1491 /* Move qh (and its qtds) onto async queue; maybe enable queue.
1492  */
1493 static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1494 {
1495 	__le32 dma = QH_NEXT(qh->qh_dma);
1496 	struct ehci_qh *head;
1497 
1498 	/* (re)start the async schedule? */
1499 	head = oxu->async;
1500 	timer_action_done(oxu, TIMER_ASYNC_OFF);
1501 	if (!head->qh_next.qh) {
1502 		u32	cmd = readl(&oxu->regs->command);
1503 
1504 		if (!(cmd & CMD_ASE)) {
1505 			/* in case a clear of CMD_ASE didn't take yet */
1506 			(void)handshake(oxu, &oxu->regs->status,
1507 					STS_ASS, 0, 150);
1508 			cmd |= CMD_ASE | CMD_RUN;
1509 			writel(cmd, &oxu->regs->command);
1510 			oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1511 			/* posted write need not be known to HC yet ... */
1512 		}
1513 	}
1514 
1515 	/* clear halt and/or toggle; and maybe recover from silicon quirk */
1516 	if (qh->qh_state == QH_STATE_IDLE)
1517 		qh_refresh(oxu, qh);
1518 
1519 	/* splice right after start */
1520 	qh->qh_next = head->qh_next;
1521 	qh->hw_next = head->hw_next;
1522 	wmb();
1523 
1524 	head->qh_next.qh = qh;
1525 	head->hw_next = dma;
1526 
1527 	qh->qh_state = QH_STATE_LINKED;
1528 	/* qtd completions reported later by interrupt */
1529 }
1530 
1531 #define	QH_ADDR_MASK	cpu_to_le32(0x7f)
1532 
1533 /*
1534  * For control/bulk/interrupt, return QH with these TDs appended.
1535  * Allocates and initializes the QH if necessary.
1536  * Returns null if it can't allocate a QH it needs to.
1537  * If the QH has TDs (urbs) already, that's great.
1538  */
1539 static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1540 				struct urb *urb, struct list_head *qtd_list,
1541 				int epnum, void	**ptr)
1542 {
1543 	struct ehci_qh *qh = NULL;
1544 
1545 	qh = (struct ehci_qh *) *ptr;
1546 	if (unlikely(qh == NULL)) {
1547 		/* can't sleep here, we have oxu->lock... */
1548 		qh = qh_make(oxu, urb, GFP_ATOMIC);
1549 		*ptr = qh;
1550 	}
1551 	if (likely(qh != NULL)) {
1552 		struct ehci_qtd	*qtd;
1553 
1554 		if (unlikely(list_empty(qtd_list)))
1555 			qtd = NULL;
1556 		else
1557 			qtd = list_entry(qtd_list->next, struct ehci_qtd,
1558 					qtd_list);
1559 
1560 		/* control qh may need patching ... */
1561 		if (unlikely(epnum == 0)) {
1562 
1563 			/* usb_reset_device() briefly reverts to address 0 */
1564 			if (usb_pipedevice(urb->pipe) == 0)
1565 				qh->hw_info1 &= ~QH_ADDR_MASK;
1566 		}
1567 
1568 		/* just one way to queue requests: swap with the dummy qtd.
1569 		 * only hc or qh_refresh() ever modify the overlay.
1570 		 */
1571 		if (likely(qtd != NULL)) {
1572 			struct ehci_qtd	*dummy;
1573 			dma_addr_t dma;
1574 			__le32 token;
1575 
1576 			/* to avoid racing the HC, use the dummy td instead of
1577 			 * the first td of our list (becomes new dummy).  both
1578 			 * tds stay deactivated until we're done, when the
1579 			 * HC is allowed to fetch the old dummy (4.10.2).
1580 			 */
1581 			token = qtd->hw_token;
1582 			qtd->hw_token = HALT_BIT;
1583 			wmb();
1584 			dummy = qh->dummy;
1585 
1586 			dma = dummy->qtd_dma;
1587 			*dummy = *qtd;
1588 			dummy->qtd_dma = dma;
1589 
1590 			list_del(&qtd->qtd_list);
1591 			list_add(&dummy->qtd_list, qtd_list);
1592 			list_splice(qtd_list, qh->qtd_list.prev);
1593 
1594 			ehci_qtd_init(qtd, qtd->qtd_dma);
1595 			qh->dummy = qtd;
1596 
1597 			/* hc must see the new dummy at list end */
1598 			dma = qtd->qtd_dma;
1599 			qtd = list_entry(qh->qtd_list.prev,
1600 					struct ehci_qtd, qtd_list);
1601 			qtd->hw_next = QTD_NEXT(dma);
1602 
1603 			/* let the hc process these next qtds */
1604 			dummy->hw_token = (token & ~(0x80));
1605 			wmb();
1606 			dummy->hw_token = token;
1607 
1608 			urb->hcpriv = qh_get(qh);
1609 		}
1610 	}
1611 	return qh;
1612 }
1613 
1614 static int submit_async(struct oxu_hcd	*oxu, struct urb *urb,
1615 			struct list_head *qtd_list, gfp_t mem_flags)
1616 {
1617 	struct ehci_qtd	*qtd;
1618 	int epnum;
1619 	unsigned long flags;
1620 	struct ehci_qh *qh = NULL;
1621 	int rc = 0;
1622 
1623 	qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1624 	epnum = urb->ep->desc.bEndpointAddress;
1625 
1626 #ifdef OXU_URB_TRACE
1627 	oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1628 		__func__, urb->dev->devpath, urb,
1629 		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1630 		urb->transfer_buffer_length,
1631 		qtd, urb->ep->hcpriv);
1632 #endif
1633 
1634 	spin_lock_irqsave(&oxu->lock, flags);
1635 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1636 		rc = -ESHUTDOWN;
1637 		goto done;
1638 	}
1639 
1640 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1641 	if (unlikely(qh == NULL)) {
1642 		rc = -ENOMEM;
1643 		goto done;
1644 	}
1645 
1646 	/* Control/bulk operations through TTs don't need scheduling,
1647 	 * the HC and TT handle it when the TT has a buffer ready.
1648 	 */
1649 	if (likely(qh->qh_state == QH_STATE_IDLE))
1650 		qh_link_async(oxu, qh_get(qh));
1651 done:
1652 	spin_unlock_irqrestore(&oxu->lock, flags);
1653 	if (unlikely(qh == NULL))
1654 		qtd_list_free(oxu, urb, qtd_list);
1655 	return rc;
1656 }
1657 
1658 /* The async qh for the qtds being reclaimed are now unlinked from the HC */
1659 
1660 static void end_unlink_async(struct oxu_hcd *oxu)
1661 {
1662 	struct ehci_qh *qh = oxu->reclaim;
1663 	struct ehci_qh *next;
1664 
1665 	timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1666 
1667 	qh->qh_state = QH_STATE_IDLE;
1668 	qh->qh_next.qh = NULL;
1669 	qh_put(qh);			/* refcount from reclaim */
1670 
1671 	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1672 	next = qh->reclaim;
1673 	oxu->reclaim = next;
1674 	oxu->reclaim_ready = 0;
1675 	qh->reclaim = NULL;
1676 
1677 	qh_completions(oxu, qh);
1678 
1679 	if (!list_empty(&qh->qtd_list)
1680 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1681 		qh_link_async(oxu, qh);
1682 	else {
1683 		qh_put(qh);		/* refcount from async list */
1684 
1685 		/* it's not free to turn the async schedule on/off; leave it
1686 		 * active but idle for a while once it empties.
1687 		 */
1688 		if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1689 				&& oxu->async->qh_next.qh == NULL)
1690 			timer_action(oxu, TIMER_ASYNC_OFF);
1691 	}
1692 
1693 	if (next) {
1694 		oxu->reclaim = NULL;
1695 		start_unlink_async(oxu, next);
1696 	}
1697 }
1698 
1699 /* makes sure the async qh will become idle */
1700 /* caller must own oxu->lock */
1701 
1702 static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1703 {
1704 	int cmd = readl(&oxu->regs->command);
1705 	struct ehci_qh *prev;
1706 
1707 #ifdef DEBUG
1708 	assert_spin_locked(&oxu->lock);
1709 	if (oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1710 				&& qh->qh_state != QH_STATE_UNLINK_WAIT))
1711 		BUG();
1712 #endif
1713 
1714 	/* stop async schedule right now? */
1715 	if (unlikely(qh == oxu->async)) {
1716 		/* can't get here without STS_ASS set */
1717 		if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1718 				&& !oxu->reclaim) {
1719 			/* ... and CMD_IAAD clear */
1720 			writel(cmd & ~CMD_ASE, &oxu->regs->command);
1721 			wmb();
1722 			/* handshake later, if we need to */
1723 			timer_action_done(oxu, TIMER_ASYNC_OFF);
1724 		}
1725 		return;
1726 	}
1727 
1728 	qh->qh_state = QH_STATE_UNLINK;
1729 	oxu->reclaim = qh = qh_get(qh);
1730 
1731 	prev = oxu->async;
1732 	while (prev->qh_next.qh != qh)
1733 		prev = prev->qh_next.qh;
1734 
1735 	prev->hw_next = qh->hw_next;
1736 	prev->qh_next = qh->qh_next;
1737 	wmb();
1738 
1739 	if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1740 		/* if (unlikely(qh->reclaim != 0))
1741 		 *	this will recurse, probably not much
1742 		 */
1743 		end_unlink_async(oxu);
1744 		return;
1745 	}
1746 
1747 	oxu->reclaim_ready = 0;
1748 	cmd |= CMD_IAAD;
1749 	writel(cmd, &oxu->regs->command);
1750 	(void) readl(&oxu->regs->command);
1751 	timer_action(oxu, TIMER_IAA_WATCHDOG);
1752 }
1753 
1754 static void scan_async(struct oxu_hcd *oxu)
1755 {
1756 	struct ehci_qh *qh;
1757 	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1758 
1759 	if (!++(oxu->stamp))
1760 		oxu->stamp++;
1761 	timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1762 rescan:
1763 	qh = oxu->async->qh_next.qh;
1764 	if (likely(qh != NULL)) {
1765 		do {
1766 			/* clean any finished work for this qh */
1767 			if (!list_empty(&qh->qtd_list)
1768 					&& qh->stamp != oxu->stamp) {
1769 				int temp;
1770 
1771 				/* unlinks could happen here; completion
1772 				 * reporting drops the lock.  rescan using
1773 				 * the latest schedule, but don't rescan
1774 				 * qhs we already finished (no looping).
1775 				 */
1776 				qh = qh_get(qh);
1777 				qh->stamp = oxu->stamp;
1778 				temp = qh_completions(oxu, qh);
1779 				qh_put(qh);
1780 				if (temp != 0)
1781 					goto rescan;
1782 			}
1783 
1784 			/* unlink idle entries, reducing HC PCI usage as well
1785 			 * as HCD schedule-scanning costs.  delay for any qh
1786 			 * we just scanned, there's a not-unusual case that it
1787 			 * doesn't stay idle for long.
1788 			 * (plus, avoids some kind of re-activation race.)
1789 			 */
1790 			if (list_empty(&qh->qtd_list)) {
1791 				if (qh->stamp == oxu->stamp)
1792 					action = TIMER_ASYNC_SHRINK;
1793 				else if (!oxu->reclaim
1794 					    && qh->qh_state == QH_STATE_LINKED)
1795 					start_unlink_async(oxu, qh);
1796 			}
1797 
1798 			qh = qh->qh_next.qh;
1799 		} while (qh);
1800 	}
1801 	if (action == TIMER_ASYNC_SHRINK)
1802 		timer_action(oxu, TIMER_ASYNC_SHRINK);
1803 }
1804 
1805 /*
1806  * periodic_next_shadow - return "next" pointer on shadow list
1807  * @periodic: host pointer to qh/itd/sitd
1808  * @tag: hardware tag for type of this record
1809  */
1810 static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1811 						__le32 tag)
1812 {
1813 	switch (tag) {
1814 	default:
1815 	case Q_TYPE_QH:
1816 		return &periodic->qh->qh_next;
1817 	}
1818 }
1819 
1820 /* caller must hold oxu->lock */
1821 static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1822 {
1823 	union ehci_shadow *prev_p = &oxu->pshadow[frame];
1824 	__le32 *hw_p = &oxu->periodic[frame];
1825 	union ehci_shadow here = *prev_p;
1826 
1827 	/* find predecessor of "ptr"; hw and shadow lists are in sync */
1828 	while (here.ptr && here.ptr != ptr) {
1829 		prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1830 		hw_p = here.hw_next;
1831 		here = *prev_p;
1832 	}
1833 	/* an interrupt entry (at list end) could have been shared */
1834 	if (!here.ptr)
1835 		return;
1836 
1837 	/* update shadow and hardware lists ... the old "next" pointers
1838 	 * from ptr may still be in use, the caller updates them.
1839 	 */
1840 	*prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1841 	*hw_p = *here.hw_next;
1842 }
1843 
1844 /* how many of the uframe's 125 usecs are allocated? */
1845 static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1846 					unsigned frame, unsigned uframe)
1847 {
1848 	__le32 *hw_p = &oxu->periodic[frame];
1849 	union ehci_shadow *q = &oxu->pshadow[frame];
1850 	unsigned usecs = 0;
1851 
1852 	while (q->ptr) {
1853 		switch (Q_NEXT_TYPE(*hw_p)) {
1854 		case Q_TYPE_QH:
1855 		default:
1856 			/* is it in the S-mask? */
1857 			if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1858 				usecs += q->qh->usecs;
1859 			/* ... or C-mask? */
1860 			if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1861 				usecs += q->qh->c_usecs;
1862 			hw_p = &q->qh->hw_next;
1863 			q = &q->qh->qh_next;
1864 			break;
1865 		}
1866 	}
1867 #ifdef DEBUG
1868 	if (usecs > 100)
1869 		oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1870 						frame * 8 + uframe, usecs);
1871 #endif
1872 	return usecs;
1873 }
1874 
1875 static int enable_periodic(struct oxu_hcd *oxu)
1876 {
1877 	u32 cmd;
1878 	int status;
1879 
1880 	/* did clearing PSE did take effect yet?
1881 	 * takes effect only at frame boundaries...
1882 	 */
1883 	status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1884 	if (status != 0) {
1885 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1886 		usb_hc_died(oxu_to_hcd(oxu));
1887 		return status;
1888 	}
1889 
1890 	cmd = readl(&oxu->regs->command) | CMD_PSE;
1891 	writel(cmd, &oxu->regs->command);
1892 	/* posted write ... PSS happens later */
1893 	oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1894 
1895 	/* make sure ehci_work scans these */
1896 	oxu->next_uframe = readl(&oxu->regs->frame_index)
1897 		% (oxu->periodic_size << 3);
1898 	return 0;
1899 }
1900 
1901 static int disable_periodic(struct oxu_hcd *oxu)
1902 {
1903 	u32 cmd;
1904 	int status;
1905 
1906 	/* did setting PSE not take effect yet?
1907 	 * takes effect only at frame boundaries...
1908 	 */
1909 	status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1910 	if (status != 0) {
1911 		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1912 		usb_hc_died(oxu_to_hcd(oxu));
1913 		return status;
1914 	}
1915 
1916 	cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1917 	writel(cmd, &oxu->regs->command);
1918 	/* posted write ... */
1919 
1920 	oxu->next_uframe = -1;
1921 	return 0;
1922 }
1923 
1924 /* periodic schedule slots have iso tds (normal or split) first, then a
1925  * sparse tree for active interrupt transfers.
1926  *
1927  * this just links in a qh; caller guarantees uframe masks are set right.
1928  * no FSTN support (yet; oxu 0.96+)
1929  */
1930 static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1931 {
1932 	unsigned i;
1933 	unsigned period = qh->period;
1934 
1935 	dev_dbg(&qh->dev->dev,
1936 		"link qh%d-%04x/%p start %d [%d/%d us]\n",
1937 		period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1938 		qh, qh->start, qh->usecs, qh->c_usecs);
1939 
1940 	/* high bandwidth, or otherwise every microframe */
1941 	if (period == 0)
1942 		period = 1;
1943 
1944 	for (i = qh->start; i < oxu->periodic_size; i += period) {
1945 		union ehci_shadow	*prev = &oxu->pshadow[i];
1946 		__le32			*hw_p = &oxu->periodic[i];
1947 		union ehci_shadow	here = *prev;
1948 		__le32			type = 0;
1949 
1950 		/* skip the iso nodes at list head */
1951 		while (here.ptr) {
1952 			type = Q_NEXT_TYPE(*hw_p);
1953 			if (type == Q_TYPE_QH)
1954 				break;
1955 			prev = periodic_next_shadow(prev, type);
1956 			hw_p = &here.qh->hw_next;
1957 			here = *prev;
1958 		}
1959 
1960 		/* sorting each branch by period (slow-->fast)
1961 		 * enables sharing interior tree nodes
1962 		 */
1963 		while (here.ptr && qh != here.qh) {
1964 			if (qh->period > here.qh->period)
1965 				break;
1966 			prev = &here.qh->qh_next;
1967 			hw_p = &here.qh->hw_next;
1968 			here = *prev;
1969 		}
1970 		/* link in this qh, unless some earlier pass did that */
1971 		if (qh != here.qh) {
1972 			qh->qh_next = here;
1973 			if (here.qh)
1974 				qh->hw_next = *hw_p;
1975 			wmb();
1976 			prev->qh = qh;
1977 			*hw_p = QH_NEXT(qh->qh_dma);
1978 		}
1979 	}
1980 	qh->qh_state = QH_STATE_LINKED;
1981 	qh_get(qh);
1982 
1983 	/* update per-qh bandwidth for usbfs */
1984 	oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1985 		? ((qh->usecs + qh->c_usecs) / qh->period)
1986 		: (qh->usecs * 8);
1987 
1988 	/* maybe enable periodic schedule processing */
1989 	if (!oxu->periodic_sched++)
1990 		return enable_periodic(oxu);
1991 
1992 	return 0;
1993 }
1994 
1995 static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1996 {
1997 	unsigned i;
1998 	unsigned period;
1999 
2000 	/* FIXME:
2001 	 *   IF this isn't high speed
2002 	 *   and this qh is active in the current uframe
2003 	 *   (and overlay token SplitXstate is false?)
2004 	 * THEN
2005 	 *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2006 	 */
2007 
2008 	/* high bandwidth, or otherwise part of every microframe */
2009 	period = qh->period;
2010 	if (period == 0)
2011 		period = 1;
2012 
2013 	for (i = qh->start; i < oxu->periodic_size; i += period)
2014 		periodic_unlink(oxu, i, qh);
2015 
2016 	/* update per-qh bandwidth for usbfs */
2017 	oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2018 		? ((qh->usecs + qh->c_usecs) / qh->period)
2019 		: (qh->usecs * 8);
2020 
2021 	dev_dbg(&qh->dev->dev,
2022 		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2023 		qh->period,
2024 		le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2025 		qh, qh->start, qh->usecs, qh->c_usecs);
2026 
2027 	/* qh->qh_next still "live" to HC */
2028 	qh->qh_state = QH_STATE_UNLINK;
2029 	qh->qh_next.ptr = NULL;
2030 	qh_put(qh);
2031 
2032 	/* maybe turn off periodic schedule */
2033 	oxu->periodic_sched--;
2034 	if (!oxu->periodic_sched)
2035 		(void) disable_periodic(oxu);
2036 }
2037 
2038 static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2039 {
2040 	unsigned wait;
2041 
2042 	qh_unlink_periodic(oxu, qh);
2043 
2044 	/* simple/paranoid:  always delay, expecting the HC needs to read
2045 	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2046 	 * expect khubd to clean up after any CSPLITs we won't issue.
2047 	 * active high speed queues may need bigger delays...
2048 	 */
2049 	if (list_empty(&qh->qtd_list)
2050 		|| (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2051 		wait = 2;
2052 	else
2053 		wait = 55;	/* worst case: 3 * 1024 */
2054 
2055 	udelay(wait);
2056 	qh->qh_state = QH_STATE_IDLE;
2057 	qh->hw_next = EHCI_LIST_END;
2058 	wmb();
2059 }
2060 
2061 static int check_period(struct oxu_hcd *oxu,
2062 			unsigned frame, unsigned uframe,
2063 			unsigned period, unsigned usecs)
2064 {
2065 	int claimed;
2066 
2067 	/* complete split running into next frame?
2068 	 * given FSTN support, we could sometimes check...
2069 	 */
2070 	if (uframe >= 8)
2071 		return 0;
2072 
2073 	/*
2074 	 * 80% periodic == 100 usec/uframe available
2075 	 * convert "usecs we need" to "max already claimed"
2076 	 */
2077 	usecs = 100 - usecs;
2078 
2079 	/* we "know" 2 and 4 uframe intervals were rejected; so
2080 	 * for period 0, check _every_ microframe in the schedule.
2081 	 */
2082 	if (unlikely(period == 0)) {
2083 		do {
2084 			for (uframe = 0; uframe < 7; uframe++) {
2085 				claimed = periodic_usecs(oxu, frame, uframe);
2086 				if (claimed > usecs)
2087 					return 0;
2088 			}
2089 		} while ((frame += 1) < oxu->periodic_size);
2090 
2091 	/* just check the specified uframe, at that period */
2092 	} else {
2093 		do {
2094 			claimed = periodic_usecs(oxu, frame, uframe);
2095 			if (claimed > usecs)
2096 				return 0;
2097 		} while ((frame += period) < oxu->periodic_size);
2098 	}
2099 
2100 	return 1;
2101 }
2102 
2103 static int check_intr_schedule(struct oxu_hcd	*oxu,
2104 				unsigned frame, unsigned uframe,
2105 				const struct ehci_qh *qh, __le32 *c_maskp)
2106 {
2107 	int retval = -ENOSPC;
2108 
2109 	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
2110 		goto done;
2111 
2112 	if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2113 		goto done;
2114 	if (!qh->c_usecs) {
2115 		retval = 0;
2116 		*c_maskp = 0;
2117 		goto done;
2118 	}
2119 
2120 done:
2121 	return retval;
2122 }
2123 
2124 /* "first fit" scheduling policy used the first time through,
2125  * or when the previous schedule slot can't be re-used.
2126  */
2127 static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2128 {
2129 	int		status;
2130 	unsigned	uframe;
2131 	__le32		c_mask;
2132 	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
2133 
2134 	qh_refresh(oxu, qh);
2135 	qh->hw_next = EHCI_LIST_END;
2136 	frame = qh->start;
2137 
2138 	/* reuse the previous schedule slots, if we can */
2139 	if (frame < qh->period) {
2140 		uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2141 		status = check_intr_schedule(oxu, frame, --uframe,
2142 				qh, &c_mask);
2143 	} else {
2144 		uframe = 0;
2145 		c_mask = 0;
2146 		status = -ENOSPC;
2147 	}
2148 
2149 	/* else scan the schedule to find a group of slots such that all
2150 	 * uframes have enough periodic bandwidth available.
2151 	 */
2152 	if (status) {
2153 		/* "normal" case, uframing flexible except with splits */
2154 		if (qh->period) {
2155 			frame = qh->period - 1;
2156 			do {
2157 				for (uframe = 0; uframe < 8; uframe++) {
2158 					status = check_intr_schedule(oxu,
2159 							frame, uframe, qh,
2160 							&c_mask);
2161 					if (status == 0)
2162 						break;
2163 				}
2164 			} while (status && frame--);
2165 
2166 		/* qh->period == 0 means every uframe */
2167 		} else {
2168 			frame = 0;
2169 			status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2170 		}
2171 		if (status)
2172 			goto done;
2173 		qh->start = frame;
2174 
2175 		/* reset S-frame and (maybe) C-frame masks */
2176 		qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2177 		qh->hw_info2 |= qh->period
2178 			? cpu_to_le32(1 << uframe)
2179 			: cpu_to_le32(QH_SMASK);
2180 		qh->hw_info2 |= c_mask;
2181 	} else
2182 		oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2183 
2184 	/* stuff into the periodic schedule */
2185 	status = qh_link_periodic(oxu, qh);
2186 done:
2187 	return status;
2188 }
2189 
2190 static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2191 			struct list_head *qtd_list, gfp_t mem_flags)
2192 {
2193 	unsigned epnum;
2194 	unsigned long flags;
2195 	struct ehci_qh *qh;
2196 	int status = 0;
2197 	struct list_head	empty;
2198 
2199 	/* get endpoint and transfer/schedule data */
2200 	epnum = urb->ep->desc.bEndpointAddress;
2201 
2202 	spin_lock_irqsave(&oxu->lock, flags);
2203 
2204 	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2205 		status = -ESHUTDOWN;
2206 		goto done;
2207 	}
2208 
2209 	/* get qh and force any scheduling errors */
2210 	INIT_LIST_HEAD(&empty);
2211 	qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2212 	if (qh == NULL) {
2213 		status = -ENOMEM;
2214 		goto done;
2215 	}
2216 	if (qh->qh_state == QH_STATE_IDLE) {
2217 		status = qh_schedule(oxu, qh);
2218 		if (status != 0)
2219 			goto done;
2220 	}
2221 
2222 	/* then queue the urb's tds to the qh */
2223 	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2224 	BUG_ON(qh == NULL);
2225 
2226 	/* ... update usbfs periodic stats */
2227 	oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2228 
2229 done:
2230 	spin_unlock_irqrestore(&oxu->lock, flags);
2231 	if (status)
2232 		qtd_list_free(oxu, urb, qtd_list);
2233 
2234 	return status;
2235 }
2236 
2237 static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2238 						gfp_t mem_flags)
2239 {
2240 	oxu_dbg(oxu, "iso support is missing!\n");
2241 	return -ENOSYS;
2242 }
2243 
2244 static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2245 						gfp_t mem_flags)
2246 {
2247 	oxu_dbg(oxu, "split iso support is missing!\n");
2248 	return -ENOSYS;
2249 }
2250 
2251 static void scan_periodic(struct oxu_hcd *oxu)
2252 {
2253 	unsigned frame, clock, now_uframe, mod;
2254 	unsigned modified;
2255 
2256 	mod = oxu->periodic_size << 3;
2257 
2258 	/*
2259 	 * When running, scan from last scan point up to "now"
2260 	 * else clean up by scanning everything that's left.
2261 	 * Touches as few pages as possible:  cache-friendly.
2262 	 */
2263 	now_uframe = oxu->next_uframe;
2264 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2265 		clock = readl(&oxu->regs->frame_index);
2266 	else
2267 		clock = now_uframe + mod - 1;
2268 	clock %= mod;
2269 
2270 	for (;;) {
2271 		union ehci_shadow	q, *q_p;
2272 		__le32			type, *hw_p;
2273 		unsigned		uframes;
2274 
2275 		/* don't scan past the live uframe */
2276 		frame = now_uframe >> 3;
2277 		if (frame == (clock >> 3))
2278 			uframes = now_uframe & 0x07;
2279 		else {
2280 			/* safe to scan the whole frame at once */
2281 			now_uframe |= 0x07;
2282 			uframes = 8;
2283 		}
2284 
2285 restart:
2286 		/* scan each element in frame's queue for completions */
2287 		q_p = &oxu->pshadow[frame];
2288 		hw_p = &oxu->periodic[frame];
2289 		q.ptr = q_p->ptr;
2290 		type = Q_NEXT_TYPE(*hw_p);
2291 		modified = 0;
2292 
2293 		while (q.ptr != NULL) {
2294 			union ehci_shadow temp;
2295 			int live;
2296 
2297 			live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2298 			switch (type) {
2299 			case Q_TYPE_QH:
2300 				/* handle any completions */
2301 				temp.qh = qh_get(q.qh);
2302 				type = Q_NEXT_TYPE(q.qh->hw_next);
2303 				q = q.qh->qh_next;
2304 				modified = qh_completions(oxu, temp.qh);
2305 				if (unlikely(list_empty(&temp.qh->qtd_list)))
2306 					intr_deschedule(oxu, temp.qh);
2307 				qh_put(temp.qh);
2308 				break;
2309 			default:
2310 				oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2311 					type, frame, q.ptr);
2312 				q.ptr = NULL;
2313 			}
2314 
2315 			/* assume completion callbacks modify the queue */
2316 			if (unlikely(modified))
2317 				goto restart;
2318 		}
2319 
2320 		/* Stop when we catch up to the HC */
2321 
2322 		/* FIXME:  this assumes we won't get lapped when
2323 		 * latencies climb; that should be rare, but...
2324 		 * detect it, and just go all the way around.
2325 		 * FLR might help detect this case, so long as latencies
2326 		 * don't exceed periodic_size msec (default 1.024 sec).
2327 		 */
2328 
2329 		/* FIXME: likewise assumes HC doesn't halt mid-scan */
2330 
2331 		if (now_uframe == clock) {
2332 			unsigned	now;
2333 
2334 			if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2335 				break;
2336 			oxu->next_uframe = now_uframe;
2337 			now = readl(&oxu->regs->frame_index) % mod;
2338 			if (now_uframe == now)
2339 				break;
2340 
2341 			/* rescan the rest of this frame, then ... */
2342 			clock = now;
2343 		} else {
2344 			now_uframe++;
2345 			now_uframe %= mod;
2346 		}
2347 	}
2348 }
2349 
2350 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
2351  * The firmware seems to think that powering off is a wakeup event!
2352  * This routine turns off remote wakeup and everything else, on all ports.
2353  */
2354 static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2355 {
2356 	int port = HCS_N_PORTS(oxu->hcs_params);
2357 
2358 	while (port--)
2359 		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2360 }
2361 
2362 static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2363 {
2364 	unsigned port;
2365 
2366 	if (!HCS_PPC(oxu->hcs_params))
2367 		return;
2368 
2369 	oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2370 	for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2371 		(void) oxu_hub_control(oxu_to_hcd(oxu),
2372 				is_on ? SetPortFeature : ClearPortFeature,
2373 				USB_PORT_FEAT_POWER,
2374 				port--, NULL, 0);
2375 	msleep(20);
2376 }
2377 
2378 /* Called from some interrupts, timers, and so on.
2379  * It calls driver completion functions, after dropping oxu->lock.
2380  */
2381 static void ehci_work(struct oxu_hcd *oxu)
2382 {
2383 	timer_action_done(oxu, TIMER_IO_WATCHDOG);
2384 	if (oxu->reclaim_ready)
2385 		end_unlink_async(oxu);
2386 
2387 	/* another CPU may drop oxu->lock during a schedule scan while
2388 	 * it reports urb completions.  this flag guards against bogus
2389 	 * attempts at re-entrant schedule scanning.
2390 	 */
2391 	if (oxu->scanning)
2392 		return;
2393 	oxu->scanning = 1;
2394 	scan_async(oxu);
2395 	if (oxu->next_uframe != -1)
2396 		scan_periodic(oxu);
2397 	oxu->scanning = 0;
2398 
2399 	/* the IO watchdog guards against hardware or driver bugs that
2400 	 * misplace IRQs, and should let us run completely without IRQs.
2401 	 * such lossage has been observed on both VT6202 and VT8235.
2402 	 */
2403 	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2404 			(oxu->async->qh_next.ptr != NULL ||
2405 			 oxu->periodic_sched != 0))
2406 		timer_action(oxu, TIMER_IO_WATCHDOG);
2407 }
2408 
2409 static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2410 {
2411 	/* if we need to use IAA and it's busy, defer */
2412 	if (qh->qh_state == QH_STATE_LINKED
2413 			&& oxu->reclaim
2414 			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2415 		struct ehci_qh		*last;
2416 
2417 		for (last = oxu->reclaim;
2418 				last->reclaim;
2419 				last = last->reclaim)
2420 			continue;
2421 		qh->qh_state = QH_STATE_UNLINK_WAIT;
2422 		last->reclaim = qh;
2423 
2424 	/* bypass IAA if the hc can't care */
2425 	} else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2426 		end_unlink_async(oxu);
2427 
2428 	/* something else might have unlinked the qh by now */
2429 	if (qh->qh_state == QH_STATE_LINKED)
2430 		start_unlink_async(oxu, qh);
2431 }
2432 
2433 /*
2434  * USB host controller methods
2435  */
2436 
2437 static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2438 {
2439 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2440 	u32 status, pcd_status = 0;
2441 	int bh;
2442 
2443 	spin_lock(&oxu->lock);
2444 
2445 	status = readl(&oxu->regs->status);
2446 
2447 	/* e.g. cardbus physical eject */
2448 	if (status == ~(u32) 0) {
2449 		oxu_dbg(oxu, "device removed\n");
2450 		goto dead;
2451 	}
2452 
2453 	/* Shared IRQ? */
2454 	status &= INTR_MASK;
2455 	if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2456 		spin_unlock(&oxu->lock);
2457 		return IRQ_NONE;
2458 	}
2459 
2460 	/* clear (just) interrupts */
2461 	writel(status, &oxu->regs->status);
2462 	readl(&oxu->regs->command);	/* unblock posted write */
2463 	bh = 0;
2464 
2465 #ifdef OXU_VERBOSE_DEBUG
2466 	/* unrequested/ignored: Frame List Rollover */
2467 	dbg_status(oxu, "irq", status);
2468 #endif
2469 
2470 	/* INT, ERR, and IAA interrupt rates can be throttled */
2471 
2472 	/* normal [4.15.1.2] or error [4.15.1.1] completion */
2473 	if (likely((status & (STS_INT|STS_ERR)) != 0))
2474 		bh = 1;
2475 
2476 	/* complete the unlinking of some qh [4.15.2.3] */
2477 	if (status & STS_IAA) {
2478 		oxu->reclaim_ready = 1;
2479 		bh = 1;
2480 	}
2481 
2482 	/* remote wakeup [4.3.1] */
2483 	if (status & STS_PCD) {
2484 		unsigned i = HCS_N_PORTS(oxu->hcs_params);
2485 		pcd_status = status;
2486 
2487 		/* resume root hub? */
2488 		if (!(readl(&oxu->regs->command) & CMD_RUN))
2489 			usb_hcd_resume_root_hub(hcd);
2490 
2491 		while (i--) {
2492 			int pstatus = readl(&oxu->regs->port_status[i]);
2493 
2494 			if (pstatus & PORT_OWNER)
2495 				continue;
2496 			if (!(pstatus & PORT_RESUME)
2497 					|| oxu->reset_done[i] != 0)
2498 				continue;
2499 
2500 			/* start 20 msec resume signaling from this port,
2501 			 * and make khubd collect PORT_STAT_C_SUSPEND to
2502 			 * stop that signaling.
2503 			 */
2504 			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
2505 			oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2506 			mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2507 		}
2508 	}
2509 
2510 	/* PCI errors [4.15.2.4] */
2511 	if (unlikely((status & STS_FATAL) != 0)) {
2512 		/* bogus "fatal" IRQs appear on some chips... why?  */
2513 		status = readl(&oxu->regs->status);
2514 		dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2515 		dbg_status(oxu, "fatal", status);
2516 		if (status & STS_HALT) {
2517 			oxu_err(oxu, "fatal error\n");
2518 dead:
2519 			ehci_reset(oxu);
2520 			writel(0, &oxu->regs->configured_flag);
2521 			usb_hc_died(hcd);
2522 			/* generic layer kills/unlinks all urbs, then
2523 			 * uses oxu_stop to clean up the rest
2524 			 */
2525 			bh = 1;
2526 		}
2527 	}
2528 
2529 	if (bh)
2530 		ehci_work(oxu);
2531 	spin_unlock(&oxu->lock);
2532 	if (pcd_status & STS_PCD)
2533 		usb_hcd_poll_rh_status(hcd);
2534 	return IRQ_HANDLED;
2535 }
2536 
2537 static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2538 {
2539 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2540 	int ret = IRQ_HANDLED;
2541 
2542 	u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2543 	u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2544 
2545 	/* Disable all interrupt */
2546 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2547 
2548 	if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2549 		(!oxu->is_otg && (status & OXU_USBSPHI)))
2550 		oxu210_hcd_irq(hcd);
2551 	else
2552 		ret = IRQ_NONE;
2553 
2554 	/* Enable all interrupt back */
2555 	oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2556 
2557 	return ret;
2558 }
2559 
2560 static void oxu_watchdog(unsigned long param)
2561 {
2562 	struct oxu_hcd	*oxu = (struct oxu_hcd *) param;
2563 	unsigned long flags;
2564 
2565 	spin_lock_irqsave(&oxu->lock, flags);
2566 
2567 	/* lost IAA irqs wedge things badly; seen with a vt8235 */
2568 	if (oxu->reclaim) {
2569 		u32 status = readl(&oxu->regs->status);
2570 		if (status & STS_IAA) {
2571 			oxu_vdbg(oxu, "lost IAA\n");
2572 			writel(STS_IAA, &oxu->regs->status);
2573 			oxu->reclaim_ready = 1;
2574 		}
2575 	}
2576 
2577 	/* stop async processing after it's idled a bit */
2578 	if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2579 		start_unlink_async(oxu, oxu->async);
2580 
2581 	/* oxu could run by timer, without IRQs ... */
2582 	ehci_work(oxu);
2583 
2584 	spin_unlock_irqrestore(&oxu->lock, flags);
2585 }
2586 
2587 /* One-time init, only for memory state.
2588  */
2589 static int oxu_hcd_init(struct usb_hcd *hcd)
2590 {
2591 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2592 	u32 temp;
2593 	int retval;
2594 	u32 hcc_params;
2595 
2596 	spin_lock_init(&oxu->lock);
2597 
2598 	init_timer(&oxu->watchdog);
2599 	oxu->watchdog.function = oxu_watchdog;
2600 	oxu->watchdog.data = (unsigned long) oxu;
2601 
2602 	/*
2603 	 * hw default: 1K periodic list heads, one per frame.
2604 	 * periodic_size can shrink by USBCMD update if hcc_params allows.
2605 	 */
2606 	oxu->periodic_size = DEFAULT_I_TDPS;
2607 	retval = ehci_mem_init(oxu, GFP_KERNEL);
2608 	if (retval < 0)
2609 		return retval;
2610 
2611 	/* controllers may cache some of the periodic schedule ... */
2612 	hcc_params = readl(&oxu->caps->hcc_params);
2613 	if (HCC_ISOC_CACHE(hcc_params))		/* full frame cache */
2614 		oxu->i_thresh = 8;
2615 	else					/* N microframes cached */
2616 		oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2617 
2618 	oxu->reclaim = NULL;
2619 	oxu->reclaim_ready = 0;
2620 	oxu->next_uframe = -1;
2621 
2622 	/*
2623 	 * dedicate a qh for the async ring head, since we couldn't unlink
2624 	 * a 'real' qh without stopping the async schedule [4.8].  use it
2625 	 * as the 'reclamation list head' too.
2626 	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2627 	 * from automatically advancing to the next td after short reads.
2628 	 */
2629 	oxu->async->qh_next.qh = NULL;
2630 	oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2631 	oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2632 	oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2633 	oxu->async->hw_qtd_next = EHCI_LIST_END;
2634 	oxu->async->qh_state = QH_STATE_LINKED;
2635 	oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2636 
2637 	/* clear interrupt enables, set irq latency */
2638 	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2639 		log2_irq_thresh = 0;
2640 	temp = 1 << (16 + log2_irq_thresh);
2641 	if (HCC_CANPARK(hcc_params)) {
2642 		/* HW default park == 3, on hardware that supports it (like
2643 		 * NVidia and ALI silicon), maximizes throughput on the async
2644 		 * schedule by avoiding QH fetches between transfers.
2645 		 *
2646 		 * With fast usb storage devices and NForce2, "park" seems to
2647 		 * make problems:  throughput reduction (!), data errors...
2648 		 */
2649 		if (park) {
2650 			park = min(park, (unsigned) 3);
2651 			temp |= CMD_PARK;
2652 			temp |= park << 8;
2653 		}
2654 		oxu_dbg(oxu, "park %d\n", park);
2655 	}
2656 	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2657 		/* periodic schedule size can be smaller than default */
2658 		temp &= ~(3 << 2);
2659 		temp |= (EHCI_TUNE_FLS << 2);
2660 	}
2661 	oxu->command = temp;
2662 
2663 	return 0;
2664 }
2665 
2666 /* Called during probe() after chip reset completes.
2667  */
2668 static int oxu_reset(struct usb_hcd *hcd)
2669 {
2670 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2671 	int ret;
2672 
2673 	spin_lock_init(&oxu->mem_lock);
2674 	INIT_LIST_HEAD(&oxu->urb_list);
2675 	oxu->urb_len = 0;
2676 
2677 	/* FIMXE */
2678 	hcd->self.controller->dma_mask = NULL;
2679 
2680 	if (oxu->is_otg) {
2681 		oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2682 		oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2683 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2684 
2685 		oxu->mem = hcd->regs + OXU_SPH_MEM;
2686 	} else {
2687 		oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2688 		oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2689 			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2690 
2691 		oxu->mem = hcd->regs + OXU_OTG_MEM;
2692 	}
2693 
2694 	oxu->hcs_params = readl(&oxu->caps->hcs_params);
2695 	oxu->sbrn = 0x20;
2696 
2697 	ret = oxu_hcd_init(hcd);
2698 	if (ret)
2699 		return ret;
2700 
2701 	return 0;
2702 }
2703 
2704 static int oxu_run(struct usb_hcd *hcd)
2705 {
2706 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2707 	int retval;
2708 	u32 temp, hcc_params;
2709 
2710 	hcd->uses_new_polling = 1;
2711 
2712 	/* EHCI spec section 4.1 */
2713 	retval = ehci_reset(oxu);
2714 	if (retval != 0) {
2715 		ehci_mem_cleanup(oxu);
2716 		return retval;
2717 	}
2718 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
2719 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2720 
2721 	/* hcc_params controls whether oxu->regs->segment must (!!!)
2722 	 * be used; it constrains QH/ITD/SITD and QTD locations.
2723 	 * pci_pool consistent memory always uses segment zero.
2724 	 * streaming mappings for I/O buffers, like pci_map_single(),
2725 	 * can return segments above 4GB, if the device allows.
2726 	 *
2727 	 * NOTE:  the dma mask is visible through dma_supported(), so
2728 	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2729 	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2730 	 * host side drivers though.
2731 	 */
2732 	hcc_params = readl(&oxu->caps->hcc_params);
2733 	if (HCC_64BIT_ADDR(hcc_params))
2734 		writel(0, &oxu->regs->segment);
2735 
2736 	oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2737 				CMD_ASE | CMD_RESET);
2738 	oxu->command |= CMD_RUN;
2739 	writel(oxu->command, &oxu->regs->command);
2740 	dbg_cmd(oxu, "init", oxu->command);
2741 
2742 	/*
2743 	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2744 	 * are explicitly handed to companion controller(s), so no TT is
2745 	 * involved with the root hub.  (Except where one is integrated,
2746 	 * and there's no companion controller unless maybe for USB OTG.)
2747 	 */
2748 	hcd->state = HC_STATE_RUNNING;
2749 	writel(FLAG_CF, &oxu->regs->configured_flag);
2750 	readl(&oxu->regs->command);	/* unblock posted writes */
2751 
2752 	temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2753 	oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2754 		((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2755 		temp >> 8, temp & 0xff, DRIVER_VERSION,
2756 		ignore_oc ? ", overcurrent ignored" : "");
2757 
2758 	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2759 
2760 	return 0;
2761 }
2762 
2763 static void oxu_stop(struct usb_hcd *hcd)
2764 {
2765 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2766 
2767 	/* Turn off port power on all root hub ports. */
2768 	ehci_port_power(oxu, 0);
2769 
2770 	/* no more interrupts ... */
2771 	del_timer_sync(&oxu->watchdog);
2772 
2773 	spin_lock_irq(&oxu->lock);
2774 	if (HC_IS_RUNNING(hcd->state))
2775 		ehci_quiesce(oxu);
2776 
2777 	ehci_reset(oxu);
2778 	writel(0, &oxu->regs->intr_enable);
2779 	spin_unlock_irq(&oxu->lock);
2780 
2781 	/* let companion controllers work when we aren't */
2782 	writel(0, &oxu->regs->configured_flag);
2783 
2784 	/* root hub is shut down separately (first, when possible) */
2785 	spin_lock_irq(&oxu->lock);
2786 	if (oxu->async)
2787 		ehci_work(oxu);
2788 	spin_unlock_irq(&oxu->lock);
2789 	ehci_mem_cleanup(oxu);
2790 
2791 	dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2792 }
2793 
2794 /* Kick in for silicon on any bus (not just pci, etc).
2795  * This forcibly disables dma and IRQs, helping kexec and other cases
2796  * where the next system software may expect clean state.
2797  */
2798 static void oxu_shutdown(struct usb_hcd *hcd)
2799 {
2800 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2801 
2802 	(void) ehci_halt(oxu);
2803 	ehci_turn_off_all_ports(oxu);
2804 
2805 	/* make BIOS/etc use companion controller during reboot */
2806 	writel(0, &oxu->regs->configured_flag);
2807 
2808 	/* unblock posted writes */
2809 	readl(&oxu->regs->configured_flag);
2810 }
2811 
2812 /* Non-error returns are a promise to giveback() the urb later
2813  * we drop ownership so next owner (or urb unlink) can get it
2814  *
2815  * urb + dev is in hcd.self.controller.urb_list
2816  * we're queueing TDs onto software and hardware lists
2817  *
2818  * hcd-specific init for hcpriv hasn't been done yet
2819  *
2820  * NOTE:  control, bulk, and interrupt share the same code to append TDs
2821  * to a (possibly active) QH, and the same QH scanning code.
2822  */
2823 static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2824 				gfp_t mem_flags)
2825 {
2826 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2827 	struct list_head qtd_list;
2828 
2829 	INIT_LIST_HEAD(&qtd_list);
2830 
2831 	switch (usb_pipetype(urb->pipe)) {
2832 	case PIPE_CONTROL:
2833 	case PIPE_BULK:
2834 	default:
2835 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2836 			return -ENOMEM;
2837 		return submit_async(oxu, urb, &qtd_list, mem_flags);
2838 
2839 	case PIPE_INTERRUPT:
2840 		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2841 			return -ENOMEM;
2842 		return intr_submit(oxu, urb, &qtd_list, mem_flags);
2843 
2844 	case PIPE_ISOCHRONOUS:
2845 		if (urb->dev->speed == USB_SPEED_HIGH)
2846 			return itd_submit(oxu, urb, mem_flags);
2847 		else
2848 			return sitd_submit(oxu, urb, mem_flags);
2849 	}
2850 }
2851 
2852 /* This function is responsible for breaking URBs with big data size
2853  * into smaller size and processing small urbs in sequence.
2854  */
2855 static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2856 				gfp_t mem_flags)
2857 {
2858 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2859 	int num, rem;
2860 	int transfer_buffer_length;
2861 	void *transfer_buffer;
2862 	struct urb *murb;
2863 	int i, ret;
2864 
2865 	/* If not bulk pipe just enqueue the URB */
2866 	if (!usb_pipebulk(urb->pipe))
2867 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2868 
2869 	/* Otherwise we should verify the USB transfer buffer size! */
2870 	transfer_buffer = urb->transfer_buffer;
2871 	transfer_buffer_length = urb->transfer_buffer_length;
2872 
2873 	num = urb->transfer_buffer_length / 4096;
2874 	rem = urb->transfer_buffer_length % 4096;
2875 	if (rem != 0)
2876 		num++;
2877 
2878 	/* If URB is smaller than 4096 bytes just enqueue it! */
2879 	if (num == 1)
2880 		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2881 
2882 	/* Ok, we have more job to do! :) */
2883 
2884 	for (i = 0; i < num - 1; i++) {
2885 		/* Get free micro URB poll till a free urb is received */
2886 
2887 		do {
2888 			murb = (struct urb *) oxu_murb_alloc(oxu);
2889 			if (!murb)
2890 				schedule();
2891 		} while (!murb);
2892 
2893 		/* Coping the urb */
2894 		memcpy(murb, urb, sizeof(struct urb));
2895 
2896 		murb->transfer_buffer_length = 4096;
2897 		murb->transfer_buffer = transfer_buffer + i * 4096;
2898 
2899 		/* Null pointer for the encodes that this is a micro urb */
2900 		murb->complete = NULL;
2901 
2902 		((struct oxu_murb *) murb)->main = urb;
2903 		((struct oxu_murb *) murb)->last = 0;
2904 
2905 		/* This loop is to guarantee urb to be processed when there's
2906 		 * not enough resources at a particular time by retrying.
2907 		 */
2908 		do {
2909 			ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2910 			if (ret)
2911 				schedule();
2912 		} while (ret);
2913 	}
2914 
2915 	/* Last urb requires special handling  */
2916 
2917 	/* Get free micro URB poll till a free urb is received */
2918 	do {
2919 		murb = (struct urb *) oxu_murb_alloc(oxu);
2920 		if (!murb)
2921 			schedule();
2922 	} while (!murb);
2923 
2924 	/* Coping the urb */
2925 	memcpy(murb, urb, sizeof(struct urb));
2926 
2927 	murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2928 	murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2929 
2930 	/* Null pointer for the encodes that this is a micro urb */
2931 	murb->complete = NULL;
2932 
2933 	((struct oxu_murb *) murb)->main = urb;
2934 	((struct oxu_murb *) murb)->last = 1;
2935 
2936 	do {
2937 		ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2938 		if (ret)
2939 			schedule();
2940 	} while (ret);
2941 
2942 	return ret;
2943 }
2944 
2945 /* Remove from hardware lists.
2946  * Completions normally happen asynchronously
2947  */
2948 static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2949 {
2950 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2951 	struct ehci_qh *qh;
2952 	unsigned long flags;
2953 
2954 	spin_lock_irqsave(&oxu->lock, flags);
2955 	switch (usb_pipetype(urb->pipe)) {
2956 	case PIPE_CONTROL:
2957 	case PIPE_BULK:
2958 	default:
2959 		qh = (struct ehci_qh *) urb->hcpriv;
2960 		if (!qh)
2961 			break;
2962 		unlink_async(oxu, qh);
2963 		break;
2964 
2965 	case PIPE_INTERRUPT:
2966 		qh = (struct ehci_qh *) urb->hcpriv;
2967 		if (!qh)
2968 			break;
2969 		switch (qh->qh_state) {
2970 		case QH_STATE_LINKED:
2971 			intr_deschedule(oxu, qh);
2972 			/* FALL THROUGH */
2973 		case QH_STATE_IDLE:
2974 			qh_completions(oxu, qh);
2975 			break;
2976 		default:
2977 			oxu_dbg(oxu, "bogus qh %p state %d\n",
2978 					qh, qh->qh_state);
2979 			goto done;
2980 		}
2981 
2982 		/* reschedule QH iff another request is queued */
2983 		if (!list_empty(&qh->qtd_list)
2984 				&& HC_IS_RUNNING(hcd->state)) {
2985 			int status;
2986 
2987 			status = qh_schedule(oxu, qh);
2988 			spin_unlock_irqrestore(&oxu->lock, flags);
2989 
2990 			if (status != 0) {
2991 				/* shouldn't happen often, but ...
2992 				 * FIXME kill those tds' urbs
2993 				 */
2994 				dev_err(hcd->self.controller,
2995 					"can't reschedule qh %p, err %d\n", qh,
2996 					status);
2997 			}
2998 			return status;
2999 		}
3000 		break;
3001 	}
3002 done:
3003 	spin_unlock_irqrestore(&oxu->lock, flags);
3004 	return 0;
3005 }
3006 
3007 /* Bulk qh holds the data toggle */
3008 static void oxu_endpoint_disable(struct usb_hcd *hcd,
3009 					struct usb_host_endpoint *ep)
3010 {
3011 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3012 	unsigned long		flags;
3013 	struct ehci_qh		*qh, *tmp;
3014 
3015 	/* ASSERT:  any requests/urbs are being unlinked */
3016 	/* ASSERT:  nobody can be submitting urbs for this any more */
3017 
3018 rescan:
3019 	spin_lock_irqsave(&oxu->lock, flags);
3020 	qh = ep->hcpriv;
3021 	if (!qh)
3022 		goto done;
3023 
3024 	/* endpoints can be iso streams.  for now, we don't
3025 	 * accelerate iso completions ... so spin a while.
3026 	 */
3027 	if (qh->hw_info1 == 0) {
3028 		oxu_vdbg(oxu, "iso delay\n");
3029 		goto idle_timeout;
3030 	}
3031 
3032 	if (!HC_IS_RUNNING(hcd->state))
3033 		qh->qh_state = QH_STATE_IDLE;
3034 	switch (qh->qh_state) {
3035 	case QH_STATE_LINKED:
3036 		for (tmp = oxu->async->qh_next.qh;
3037 				tmp && tmp != qh;
3038 				tmp = tmp->qh_next.qh)
3039 			continue;
3040 		/* periodic qh self-unlinks on empty */
3041 		if (!tmp)
3042 			goto nogood;
3043 		unlink_async(oxu, qh);
3044 		/* FALL THROUGH */
3045 	case QH_STATE_UNLINK:		/* wait for hw to finish? */
3046 idle_timeout:
3047 		spin_unlock_irqrestore(&oxu->lock, flags);
3048 		schedule_timeout_uninterruptible(1);
3049 		goto rescan;
3050 	case QH_STATE_IDLE:		/* fully unlinked */
3051 		if (list_empty(&qh->qtd_list)) {
3052 			qh_put(qh);
3053 			break;
3054 		}
3055 		/* else FALL THROUGH */
3056 	default:
3057 nogood:
3058 		/* caller was supposed to have unlinked any requests;
3059 		 * that's not our job.  just leak this memory.
3060 		 */
3061 		oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3062 			qh, ep->desc.bEndpointAddress, qh->qh_state,
3063 			list_empty(&qh->qtd_list) ? "" : "(has tds)");
3064 		break;
3065 	}
3066 	ep->hcpriv = NULL;
3067 done:
3068 	spin_unlock_irqrestore(&oxu->lock, flags);
3069 }
3070 
3071 static int oxu_get_frame(struct usb_hcd *hcd)
3072 {
3073 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3074 
3075 	return (readl(&oxu->regs->frame_index) >> 3) %
3076 		oxu->periodic_size;
3077 }
3078 
3079 /* Build "status change" packet (one or two bytes) from HC registers */
3080 static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3081 {
3082 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3083 	u32 temp, mask, status = 0;
3084 	int ports, i, retval = 1;
3085 	unsigned long flags;
3086 
3087 	/* if !USB_SUSPEND, root hub timers won't get shut down ... */
3088 	if (!HC_IS_RUNNING(hcd->state))
3089 		return 0;
3090 
3091 	/* init status to no-changes */
3092 	buf[0] = 0;
3093 	ports = HCS_N_PORTS(oxu->hcs_params);
3094 	if (ports > 7) {
3095 		buf[1] = 0;
3096 		retval++;
3097 	}
3098 
3099 	/* Some boards (mostly VIA?) report bogus overcurrent indications,
3100 	 * causing massive log spam unless we completely ignore them.  It
3101 	 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3102 	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3103 	 * PORT_POWER; that's surprising, but maybe within-spec.
3104 	 */
3105 	if (!ignore_oc)
3106 		mask = PORT_CSC | PORT_PEC | PORT_OCC;
3107 	else
3108 		mask = PORT_CSC | PORT_PEC;
3109 
3110 	/* no hub change reports (bit 0) for now (power, ...) */
3111 
3112 	/* port N changes (bit N)? */
3113 	spin_lock_irqsave(&oxu->lock, flags);
3114 	for (i = 0; i < ports; i++) {
3115 		temp = readl(&oxu->regs->port_status[i]);
3116 
3117 		/*
3118 		 * Return status information even for ports with OWNER set.
3119 		 * Otherwise khubd wouldn't see the disconnect event when a
3120 		 * high-speed device is switched over to the companion
3121 		 * controller by the user.
3122 		 */
3123 
3124 		if (!(temp & PORT_CONNECT))
3125 			oxu->reset_done[i] = 0;
3126 		if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3127 				time_after_eq(jiffies, oxu->reset_done[i]))) {
3128 			if (i < 7)
3129 				buf[0] |= 1 << (i + 1);
3130 			else
3131 				buf[1] |= 1 << (i - 7);
3132 			status = STS_PCD;
3133 		}
3134 	}
3135 	/* FIXME autosuspend idle root hubs */
3136 	spin_unlock_irqrestore(&oxu->lock, flags);
3137 	return status ? retval : 0;
3138 }
3139 
3140 /* Returns the speed of a device attached to a port on the root hub. */
3141 static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3142 						unsigned int portsc)
3143 {
3144 	switch ((portsc >> 26) & 3) {
3145 	case 0:
3146 		return 0;
3147 	case 1:
3148 		return USB_PORT_STAT_LOW_SPEED;
3149 	case 2:
3150 	default:
3151 		return USB_PORT_STAT_HIGH_SPEED;
3152 	}
3153 }
3154 
3155 #define	PORT_WAKE_BITS	(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3156 static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3157 				u16 wValue, u16 wIndex, char *buf, u16 wLength)
3158 {
3159 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3160 	int ports = HCS_N_PORTS(oxu->hcs_params);
3161 	u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3162 	u32 temp, status;
3163 	unsigned long	flags;
3164 	int retval = 0;
3165 	unsigned selector;
3166 
3167 	/*
3168 	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3169 	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3170 	 * (track current state ourselves) ... blink for diagnostics,
3171 	 * power, "this is the one", etc.  EHCI spec supports this.
3172 	 */
3173 
3174 	spin_lock_irqsave(&oxu->lock, flags);
3175 	switch (typeReq) {
3176 	case ClearHubFeature:
3177 		switch (wValue) {
3178 		case C_HUB_LOCAL_POWER:
3179 		case C_HUB_OVER_CURRENT:
3180 			/* no hub-wide feature/status flags */
3181 			break;
3182 		default:
3183 			goto error;
3184 		}
3185 		break;
3186 	case ClearPortFeature:
3187 		if (!wIndex || wIndex > ports)
3188 			goto error;
3189 		wIndex--;
3190 		temp = readl(status_reg);
3191 
3192 		/*
3193 		 * Even if OWNER is set, so the port is owned by the
3194 		 * companion controller, khubd needs to be able to clear
3195 		 * the port-change status bits (especially
3196 		 * USB_PORT_STAT_C_CONNECTION).
3197 		 */
3198 
3199 		switch (wValue) {
3200 		case USB_PORT_FEAT_ENABLE:
3201 			writel(temp & ~PORT_PE, status_reg);
3202 			break;
3203 		case USB_PORT_FEAT_C_ENABLE:
3204 			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3205 			break;
3206 		case USB_PORT_FEAT_SUSPEND:
3207 			if (temp & PORT_RESET)
3208 				goto error;
3209 			if (temp & PORT_SUSPEND) {
3210 				if ((temp & PORT_PE) == 0)
3211 					goto error;
3212 				/* resume signaling for 20 msec */
3213 				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3214 				writel(temp | PORT_RESUME, status_reg);
3215 				oxu->reset_done[wIndex] = jiffies
3216 						+ msecs_to_jiffies(20);
3217 			}
3218 			break;
3219 		case USB_PORT_FEAT_C_SUSPEND:
3220 			/* we auto-clear this feature */
3221 			break;
3222 		case USB_PORT_FEAT_POWER:
3223 			if (HCS_PPC(oxu->hcs_params))
3224 				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3225 					  status_reg);
3226 			break;
3227 		case USB_PORT_FEAT_C_CONNECTION:
3228 			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3229 			break;
3230 		case USB_PORT_FEAT_C_OVER_CURRENT:
3231 			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3232 			break;
3233 		case USB_PORT_FEAT_C_RESET:
3234 			/* GetPortStatus clears reset */
3235 			break;
3236 		default:
3237 			goto error;
3238 		}
3239 		readl(&oxu->regs->command);	/* unblock posted write */
3240 		break;
3241 	case GetHubDescriptor:
3242 		ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3243 			buf);
3244 		break;
3245 	case GetHubStatus:
3246 		/* no hub-wide feature/status flags */
3247 		memset(buf, 0, 4);
3248 		break;
3249 	case GetPortStatus:
3250 		if (!wIndex || wIndex > ports)
3251 			goto error;
3252 		wIndex--;
3253 		status = 0;
3254 		temp = readl(status_reg);
3255 
3256 		/* wPortChange bits */
3257 		if (temp & PORT_CSC)
3258 			status |= USB_PORT_STAT_C_CONNECTION << 16;
3259 		if (temp & PORT_PEC)
3260 			status |= USB_PORT_STAT_C_ENABLE << 16;
3261 		if ((temp & PORT_OCC) && !ignore_oc)
3262 			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3263 
3264 		/* whoever resumes must GetPortStatus to complete it!! */
3265 		if (temp & PORT_RESUME) {
3266 
3267 			/* Remote Wakeup received? */
3268 			if (!oxu->reset_done[wIndex]) {
3269 				/* resume signaling for 20 msec */
3270 				oxu->reset_done[wIndex] = jiffies
3271 						+ msecs_to_jiffies(20);
3272 				/* check the port again */
3273 				mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3274 						oxu->reset_done[wIndex]);
3275 			}
3276 
3277 			/* resume completed? */
3278 			else if (time_after_eq(jiffies,
3279 					oxu->reset_done[wIndex])) {
3280 				status |= USB_PORT_STAT_C_SUSPEND << 16;
3281 				oxu->reset_done[wIndex] = 0;
3282 
3283 				/* stop resume signaling */
3284 				temp = readl(status_reg);
3285 				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3286 					status_reg);
3287 				retval = handshake(oxu, status_reg,
3288 					   PORT_RESUME, 0, 2000 /* 2msec */);
3289 				if (retval != 0) {
3290 					oxu_err(oxu,
3291 						"port %d resume error %d\n",
3292 						wIndex + 1, retval);
3293 					goto error;
3294 				}
3295 				temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3296 			}
3297 		}
3298 
3299 		/* whoever resets must GetPortStatus to complete it!! */
3300 		if ((temp & PORT_RESET)
3301 				&& time_after_eq(jiffies,
3302 					oxu->reset_done[wIndex])) {
3303 			status |= USB_PORT_STAT_C_RESET << 16;
3304 			oxu->reset_done[wIndex] = 0;
3305 
3306 			/* force reset to complete */
3307 			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3308 					status_reg);
3309 			/* REVISIT:  some hardware needs 550+ usec to clear
3310 			 * this bit; seems too long to spin routinely...
3311 			 */
3312 			retval = handshake(oxu, status_reg,
3313 					PORT_RESET, 0, 750);
3314 			if (retval != 0) {
3315 				oxu_err(oxu, "port %d reset error %d\n",
3316 					wIndex + 1, retval);
3317 				goto error;
3318 			}
3319 
3320 			/* see what we found out */
3321 			temp = check_reset_complete(oxu, wIndex, status_reg,
3322 					readl(status_reg));
3323 		}
3324 
3325 		/* transfer dedicated ports to the companion hc */
3326 		if ((temp & PORT_CONNECT) &&
3327 				test_bit(wIndex, &oxu->companion_ports)) {
3328 			temp &= ~PORT_RWC_BITS;
3329 			temp |= PORT_OWNER;
3330 			writel(temp, status_reg);
3331 			oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3332 			temp = readl(status_reg);
3333 		}
3334 
3335 		/*
3336 		 * Even if OWNER is set, there's no harm letting khubd
3337 		 * see the wPortStatus values (they should all be 0 except
3338 		 * for PORT_POWER anyway).
3339 		 */
3340 
3341 		if (temp & PORT_CONNECT) {
3342 			status |= USB_PORT_STAT_CONNECTION;
3343 			/* status may be from integrated TT */
3344 			status |= oxu_port_speed(oxu, temp);
3345 		}
3346 		if (temp & PORT_PE)
3347 			status |= USB_PORT_STAT_ENABLE;
3348 		if (temp & (PORT_SUSPEND|PORT_RESUME))
3349 			status |= USB_PORT_STAT_SUSPEND;
3350 		if (temp & PORT_OC)
3351 			status |= USB_PORT_STAT_OVERCURRENT;
3352 		if (temp & PORT_RESET)
3353 			status |= USB_PORT_STAT_RESET;
3354 		if (temp & PORT_POWER)
3355 			status |= USB_PORT_STAT_POWER;
3356 
3357 #ifndef	OXU_VERBOSE_DEBUG
3358 	if (status & ~0xffff)	/* only if wPortChange is interesting */
3359 #endif
3360 		dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3361 		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3362 		break;
3363 	case SetHubFeature:
3364 		switch (wValue) {
3365 		case C_HUB_LOCAL_POWER:
3366 		case C_HUB_OVER_CURRENT:
3367 			/* no hub-wide feature/status flags */
3368 			break;
3369 		default:
3370 			goto error;
3371 		}
3372 		break;
3373 	case SetPortFeature:
3374 		selector = wIndex >> 8;
3375 		wIndex &= 0xff;
3376 		if (!wIndex || wIndex > ports)
3377 			goto error;
3378 		wIndex--;
3379 		temp = readl(status_reg);
3380 		if (temp & PORT_OWNER)
3381 			break;
3382 
3383 		temp &= ~PORT_RWC_BITS;
3384 		switch (wValue) {
3385 		case USB_PORT_FEAT_SUSPEND:
3386 			if ((temp & PORT_PE) == 0
3387 					|| (temp & PORT_RESET) != 0)
3388 				goto error;
3389 			if (device_may_wakeup(&hcd->self.root_hub->dev))
3390 				temp |= PORT_WAKE_BITS;
3391 			writel(temp | PORT_SUSPEND, status_reg);
3392 			break;
3393 		case USB_PORT_FEAT_POWER:
3394 			if (HCS_PPC(oxu->hcs_params))
3395 				writel(temp | PORT_POWER, status_reg);
3396 			break;
3397 		case USB_PORT_FEAT_RESET:
3398 			if (temp & PORT_RESUME)
3399 				goto error;
3400 			/* line status bits may report this as low speed,
3401 			 * which can be fine if this root hub has a
3402 			 * transaction translator built in.
3403 			 */
3404 			oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3405 			temp |= PORT_RESET;
3406 			temp &= ~PORT_PE;
3407 
3408 			/*
3409 			 * caller must wait, then call GetPortStatus
3410 			 * usb 2.0 spec says 50 ms resets on root
3411 			 */
3412 			oxu->reset_done[wIndex] = jiffies
3413 					+ msecs_to_jiffies(50);
3414 			writel(temp, status_reg);
3415 			break;
3416 
3417 		/* For downstream facing ports (these):  one hub port is put
3418 		 * into test mode according to USB2 11.24.2.13, then the hub
3419 		 * must be reset (which for root hub now means rmmod+modprobe,
3420 		 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3421 		 * about the EHCI-specific stuff.
3422 		 */
3423 		case USB_PORT_FEAT_TEST:
3424 			if (!selector || selector > 5)
3425 				goto error;
3426 			ehci_quiesce(oxu);
3427 			ehci_halt(oxu);
3428 			temp |= selector << 16;
3429 			writel(temp, status_reg);
3430 			break;
3431 
3432 		default:
3433 			goto error;
3434 		}
3435 		readl(&oxu->regs->command);	/* unblock posted writes */
3436 		break;
3437 
3438 	default:
3439 error:
3440 		/* "stall" on error */
3441 		retval = -EPIPE;
3442 	}
3443 	spin_unlock_irqrestore(&oxu->lock, flags);
3444 	return retval;
3445 }
3446 
3447 #ifdef CONFIG_PM
3448 
3449 static int oxu_bus_suspend(struct usb_hcd *hcd)
3450 {
3451 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3452 	int port;
3453 	int mask;
3454 
3455 	oxu_dbg(oxu, "suspend root hub\n");
3456 
3457 	if (time_before(jiffies, oxu->next_statechange))
3458 		msleep(5);
3459 
3460 	port = HCS_N_PORTS(oxu->hcs_params);
3461 	spin_lock_irq(&oxu->lock);
3462 
3463 	/* stop schedules, clean any completed work */
3464 	if (HC_IS_RUNNING(hcd->state)) {
3465 		ehci_quiesce(oxu);
3466 		hcd->state = HC_STATE_QUIESCING;
3467 	}
3468 	oxu->command = readl(&oxu->regs->command);
3469 	if (oxu->reclaim)
3470 		oxu->reclaim_ready = 1;
3471 	ehci_work(oxu);
3472 
3473 	/* Unlike other USB host controller types, EHCI doesn't have
3474 	 * any notion of "global" or bus-wide suspend.  The driver has
3475 	 * to manually suspend all the active unsuspended ports, and
3476 	 * then manually resume them in the bus_resume() routine.
3477 	 */
3478 	oxu->bus_suspended = 0;
3479 	while (port--) {
3480 		u32 __iomem *reg = &oxu->regs->port_status[port];
3481 		u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3482 		u32 t2 = t1;
3483 
3484 		/* keep track of which ports we suspend */
3485 		if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3486 				!(t1 & PORT_SUSPEND)) {
3487 			t2 |= PORT_SUSPEND;
3488 			set_bit(port, &oxu->bus_suspended);
3489 		}
3490 
3491 		/* enable remote wakeup on all ports */
3492 		if (device_may_wakeup(&hcd->self.root_hub->dev))
3493 			t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3494 		else
3495 			t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3496 
3497 		if (t1 != t2) {
3498 			oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3499 				port + 1, t1, t2);
3500 			writel(t2, reg);
3501 		}
3502 	}
3503 
3504 	/* turn off now-idle HC */
3505 	del_timer_sync(&oxu->watchdog);
3506 	ehci_halt(oxu);
3507 	hcd->state = HC_STATE_SUSPENDED;
3508 
3509 	/* allow remote wakeup */
3510 	mask = INTR_MASK;
3511 	if (!device_may_wakeup(&hcd->self.root_hub->dev))
3512 		mask &= ~STS_PCD;
3513 	writel(mask, &oxu->regs->intr_enable);
3514 	readl(&oxu->regs->intr_enable);
3515 
3516 	oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3517 	spin_unlock_irq(&oxu->lock);
3518 	return 0;
3519 }
3520 
3521 /* Caller has locked the root hub, and should reset/reinit on error */
3522 static int oxu_bus_resume(struct usb_hcd *hcd)
3523 {
3524 	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3525 	u32 temp;
3526 	int i;
3527 
3528 	if (time_before(jiffies, oxu->next_statechange))
3529 		msleep(5);
3530 	spin_lock_irq(&oxu->lock);
3531 
3532 	/* Ideally and we've got a real resume here, and no port's power
3533 	 * was lost.  (For PCI, that means Vaux was maintained.)  But we
3534 	 * could instead be restoring a swsusp snapshot -- so that BIOS was
3535 	 * the last user of the controller, not reset/pm hardware keeping
3536 	 * state we gave to it.
3537 	 */
3538 	temp = readl(&oxu->regs->intr_enable);
3539 	oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3540 
3541 	/* at least some APM implementations will try to deliver
3542 	 * IRQs right away, so delay them until we're ready.
3543 	 */
3544 	writel(0, &oxu->regs->intr_enable);
3545 
3546 	/* re-init operational registers */
3547 	writel(0, &oxu->regs->segment);
3548 	writel(oxu->periodic_dma, &oxu->regs->frame_list);
3549 	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3550 
3551 	/* restore CMD_RUN, framelist size, and irq threshold */
3552 	writel(oxu->command, &oxu->regs->command);
3553 
3554 	/* Some controller/firmware combinations need a delay during which
3555 	 * they set up the port statuses.  See Bugzilla #8190. */
3556 	mdelay(8);
3557 
3558 	/* manually resume the ports we suspended during bus_suspend() */
3559 	i = HCS_N_PORTS(oxu->hcs_params);
3560 	while (i--) {
3561 		temp = readl(&oxu->regs->port_status[i]);
3562 		temp &= ~(PORT_RWC_BITS
3563 			| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3564 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3565 			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3566 			temp |= PORT_RESUME;
3567 		}
3568 		writel(temp, &oxu->regs->port_status[i]);
3569 	}
3570 	i = HCS_N_PORTS(oxu->hcs_params);
3571 	mdelay(20);
3572 	while (i--) {
3573 		temp = readl(&oxu->regs->port_status[i]);
3574 		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3575 			temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3576 			writel(temp, &oxu->regs->port_status[i]);
3577 			oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3578 		}
3579 	}
3580 	(void) readl(&oxu->regs->command);
3581 
3582 	/* maybe re-activate the schedule(s) */
3583 	temp = 0;
3584 	if (oxu->async->qh_next.qh)
3585 		temp |= CMD_ASE;
3586 	if (oxu->periodic_sched)
3587 		temp |= CMD_PSE;
3588 	if (temp) {
3589 		oxu->command |= temp;
3590 		writel(oxu->command, &oxu->regs->command);
3591 	}
3592 
3593 	oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3594 	hcd->state = HC_STATE_RUNNING;
3595 
3596 	/* Now we can safely re-enable irqs */
3597 	writel(INTR_MASK, &oxu->regs->intr_enable);
3598 
3599 	spin_unlock_irq(&oxu->lock);
3600 	return 0;
3601 }
3602 
3603 #else
3604 
3605 static int oxu_bus_suspend(struct usb_hcd *hcd)
3606 {
3607 	return 0;
3608 }
3609 
3610 static int oxu_bus_resume(struct usb_hcd *hcd)
3611 {
3612 	return 0;
3613 }
3614 
3615 #endif	/* CONFIG_PM */
3616 
3617 static const struct hc_driver oxu_hc_driver = {
3618 	.description =		"oxu210hp_hcd",
3619 	.product_desc =		"oxu210hp HCD",
3620 	.hcd_priv_size =	sizeof(struct oxu_hcd),
3621 
3622 	/*
3623 	 * Generic hardware linkage
3624 	 */
3625 	.irq =			oxu_irq,
3626 	.flags =		HCD_MEMORY | HCD_USB2,
3627 
3628 	/*
3629 	 * Basic lifecycle operations
3630 	 */
3631 	.reset =		oxu_reset,
3632 	.start =		oxu_run,
3633 	.stop =			oxu_stop,
3634 	.shutdown =		oxu_shutdown,
3635 
3636 	/*
3637 	 * Managing i/o requests and associated device resources
3638 	 */
3639 	.urb_enqueue =		oxu_urb_enqueue,
3640 	.urb_dequeue =		oxu_urb_dequeue,
3641 	.endpoint_disable =	oxu_endpoint_disable,
3642 
3643 	/*
3644 	 * Scheduling support
3645 	 */
3646 	.get_frame_number =	oxu_get_frame,
3647 
3648 	/*
3649 	 * Root hub support
3650 	 */
3651 	.hub_status_data =	oxu_hub_status_data,
3652 	.hub_control =		oxu_hub_control,
3653 	.bus_suspend =		oxu_bus_suspend,
3654 	.bus_resume =		oxu_bus_resume,
3655 };
3656 
3657 /*
3658  * Module stuff
3659  */
3660 
3661 static void oxu_configuration(struct platform_device *pdev, void *base)
3662 {
3663 	u32 tmp;
3664 
3665 	/* Initialize top level registers.
3666 	 * First write ever
3667 	 */
3668 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3669 	oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3670 	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3671 
3672 	tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3673 	oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3674 
3675 	oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3676 					OXU_COMPARATOR | OXU_ASO_OP);
3677 
3678 	tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3679 	oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3680 
3681 	/* Clear all top interrupt enable */
3682 	oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3683 
3684 	/* Clear all top interrupt status */
3685 	oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3686 
3687 	/* Enable all needed top interrupt except OTG SPH core */
3688 	oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3689 }
3690 
3691 static int oxu_verify_id(struct platform_device *pdev, void *base)
3692 {
3693 	u32 id;
3694 	static const char * const bo[] = {
3695 		"reserved",
3696 		"128-pin LQFP",
3697 		"84-pin TFBGA",
3698 		"reserved",
3699 	};
3700 
3701 	/* Read controller signature register to find a match */
3702 	id = oxu_readl(base, OXU_DEVICEID);
3703 	dev_info(&pdev->dev, "device ID %x\n", id);
3704 	if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3705 		return -1;
3706 
3707 	dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3708 		id >> OXU_REV_SHIFT,
3709 		bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3710 		(id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3711 		(id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3712 
3713 	return 0;
3714 }
3715 
3716 static const struct hc_driver oxu_hc_driver;
3717 static struct usb_hcd *oxu_create(struct platform_device *pdev,
3718 				unsigned long memstart, unsigned long memlen,
3719 				void *base, int irq, int otg)
3720 {
3721 	struct device *dev = &pdev->dev;
3722 
3723 	struct usb_hcd *hcd;
3724 	struct oxu_hcd *oxu;
3725 	int ret;
3726 
3727 	/* Set endian mode and host mode */
3728 	oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3729 				OXU_USBMODE,
3730 				OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3731 
3732 	hcd = usb_create_hcd(&oxu_hc_driver, dev,
3733 				otg ? "oxu210hp_otg" : "oxu210hp_sph");
3734 	if (!hcd)
3735 		return ERR_PTR(-ENOMEM);
3736 
3737 	hcd->rsrc_start = memstart;
3738 	hcd->rsrc_len = memlen;
3739 	hcd->regs = base;
3740 	hcd->irq = irq;
3741 	hcd->state = HC_STATE_HALT;
3742 
3743 	oxu = hcd_to_oxu(hcd);
3744 	oxu->is_otg = otg;
3745 
3746 	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3747 	if (ret < 0)
3748 		return ERR_PTR(ret);
3749 
3750 	return hcd;
3751 }
3752 
3753 static int oxu_init(struct platform_device *pdev,
3754 				unsigned long memstart, unsigned long memlen,
3755 				void *base, int irq)
3756 {
3757 	struct oxu_info *info = platform_get_drvdata(pdev);
3758 	struct usb_hcd *hcd;
3759 	int ret;
3760 
3761 	/* First time configuration at start up */
3762 	oxu_configuration(pdev, base);
3763 
3764 	ret = oxu_verify_id(pdev, base);
3765 	if (ret) {
3766 		dev_err(&pdev->dev, "no devices found!\n");
3767 		return -ENODEV;
3768 	}
3769 
3770 	/* Create the OTG controller */
3771 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3772 	if (IS_ERR(hcd)) {
3773 		dev_err(&pdev->dev, "cannot create OTG controller!\n");
3774 		ret = PTR_ERR(hcd);
3775 		goto error_create_otg;
3776 	}
3777 	info->hcd[0] = hcd;
3778 
3779 	/* Create the SPH host controller */
3780 	hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3781 	if (IS_ERR(hcd)) {
3782 		dev_err(&pdev->dev, "cannot create SPH controller!\n");
3783 		ret = PTR_ERR(hcd);
3784 		goto error_create_sph;
3785 	}
3786 	info->hcd[1] = hcd;
3787 
3788 	oxu_writel(base, OXU_CHIPIRQEN_SET,
3789 		oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3790 
3791 	return 0;
3792 
3793 error_create_sph:
3794 	usb_remove_hcd(info->hcd[0]);
3795 	usb_put_hcd(info->hcd[0]);
3796 
3797 error_create_otg:
3798 	return ret;
3799 }
3800 
3801 static int oxu_drv_probe(struct platform_device *pdev)
3802 {
3803 	struct resource *res;
3804 	void *base;
3805 	unsigned long memstart, memlen;
3806 	int irq, ret;
3807 	struct oxu_info *info;
3808 
3809 	if (usb_disabled())
3810 		return -ENODEV;
3811 
3812 	/*
3813 	 * Get the platform resources
3814 	 */
3815 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3816 	if (!res) {
3817 		dev_err(&pdev->dev,
3818 			"no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3819 		return -ENODEV;
3820 	}
3821 	irq = res->start;
3822 	dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3823 
3824 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3825 	if (!res) {
3826 		dev_err(&pdev->dev, "no registers address! Check %s setup!\n",
3827 			dev_name(&pdev->dev));
3828 		return -ENODEV;
3829 	}
3830 	memstart = res->start;
3831 	memlen = resource_size(res);
3832 	dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen);
3833 	if (!request_mem_region(memstart, memlen,
3834 				oxu_hc_driver.description)) {
3835 		dev_dbg(&pdev->dev, "memory area already in use\n");
3836 		return -EBUSY;
3837 	}
3838 
3839 	ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
3840 	if (ret) {
3841 		dev_err(&pdev->dev, "error setting irq type\n");
3842 		ret = -EFAULT;
3843 		goto error_set_irq_type;
3844 	}
3845 
3846 	base = ioremap(memstart, memlen);
3847 	if (!base) {
3848 		dev_dbg(&pdev->dev, "error mapping memory\n");
3849 		ret = -EFAULT;
3850 		goto error_ioremap;
3851 	}
3852 
3853 	/* Allocate a driver data struct to hold useful info for both
3854 	 * SPH & OTG devices
3855 	 */
3856 	info = kzalloc(sizeof(struct oxu_info), GFP_KERNEL);
3857 	if (!info) {
3858 		dev_dbg(&pdev->dev, "error allocating memory\n");
3859 		ret = -EFAULT;
3860 		goto error_alloc;
3861 	}
3862 	platform_set_drvdata(pdev, info);
3863 
3864 	ret = oxu_init(pdev, memstart, memlen, base, irq);
3865 	if (ret < 0) {
3866 		dev_dbg(&pdev->dev, "cannot init USB devices\n");
3867 		goto error_init;
3868 	}
3869 
3870 	dev_info(&pdev->dev, "devices enabled and running\n");
3871 	platform_set_drvdata(pdev, info);
3872 
3873 	return 0;
3874 
3875 error_init:
3876 	kfree(info);
3877 	platform_set_drvdata(pdev, NULL);
3878 
3879 error_alloc:
3880 	iounmap(base);
3881 
3882 error_set_irq_type:
3883 error_ioremap:
3884 	release_mem_region(memstart, memlen);
3885 
3886 	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3887 	return ret;
3888 }
3889 
3890 static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3891 {
3892 	usb_remove_hcd(hcd);
3893 	usb_put_hcd(hcd);
3894 }
3895 
3896 static int oxu_drv_remove(struct platform_device *pdev)
3897 {
3898 	struct oxu_info *info = platform_get_drvdata(pdev);
3899 	unsigned long memstart = info->hcd[0]->rsrc_start,
3900 			memlen = info->hcd[0]->rsrc_len;
3901 	void *base = info->hcd[0]->regs;
3902 
3903 	oxu_remove(pdev, info->hcd[0]);
3904 	oxu_remove(pdev, info->hcd[1]);
3905 
3906 	iounmap(base);
3907 	release_mem_region(memstart, memlen);
3908 
3909 	kfree(info);
3910 	platform_set_drvdata(pdev, NULL);
3911 
3912 	return 0;
3913 }
3914 
3915 static void oxu_drv_shutdown(struct platform_device *pdev)
3916 {
3917 	oxu_drv_remove(pdev);
3918 }
3919 
3920 #if 0
3921 /* FIXME: TODO */
3922 static int oxu_drv_suspend(struct device *dev)
3923 {
3924 	struct platform_device *pdev = to_platform_device(dev);
3925 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3926 
3927 	return 0;
3928 }
3929 
3930 static int oxu_drv_resume(struct device *dev)
3931 {
3932 	struct platform_device *pdev = to_platform_device(dev);
3933 	struct usb_hcd *hcd = dev_get_drvdata(dev);
3934 
3935 	return 0;
3936 }
3937 #else
3938 #define oxu_drv_suspend	NULL
3939 #define oxu_drv_resume	NULL
3940 #endif
3941 
3942 static struct platform_driver oxu_driver = {
3943 	.probe		= oxu_drv_probe,
3944 	.remove		= oxu_drv_remove,
3945 	.shutdown	= oxu_drv_shutdown,
3946 	.suspend	= oxu_drv_suspend,
3947 	.resume		= oxu_drv_resume,
3948 	.driver = {
3949 		.name = "oxu210hp-hcd",
3950 		.bus = &platform_bus_type
3951 	}
3952 };
3953 
3954 module_platform_driver(oxu_driver);
3955 
3956 MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3957 MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3958 MODULE_LICENSE("GPL");
3959