xref: /linux/drivers/usb/host/ohci-pci.c (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa)
1 /*
2  * OHCI HCD (Host Controller Driver) for USB.
3  *
4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5  * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6  *
7  * [ Initialisation is based on Linus'  ]
8  * [ uhci code and gregs ohci fragments ]
9  * [ (C) Copyright 1999 Linus Torvalds  ]
10  * [ (C) Copyright 1999 Gregory P. Smith]
11  *
12  * PCI Bus Glue
13  *
14  * This file is licenced under the GPL.
15  */
16 
17 #include <linux/io.h>
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/pci.h>
21 #include <linux/usb.h>
22 #include <linux/usb/hcd.h>
23 
24 #include "ohci.h"
25 #include "pci-quirks.h"
26 
27 #define DRIVER_DESC "OHCI PCI platform driver"
28 
29 static const char hcd_name[] = "ohci-pci";
30 
31 
32 /*-------------------------------------------------------------------------*/
33 
34 static int broken_suspend(struct usb_hcd *hcd)
35 {
36 	device_init_wakeup(&hcd->self.root_hub->dev, 0);
37 	return 0;
38 }
39 
40 /* AMD 756, for most chips (early revs), corrupts register
41  * values on read ... so enable the vendor workaround.
42  */
43 static int ohci_quirk_amd756(struct usb_hcd *hcd)
44 {
45 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
46 
47 	ohci->flags = OHCI_QUIRK_AMD756;
48 	ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
49 
50 	/* also erratum 10 (suspend/resume issues) */
51 	return broken_suspend(hcd);
52 }
53 
54 /* Apple's OHCI driver has a lot of bizarre workarounds
55  * for this chip.  Evidently control and bulk lists
56  * can get confused.  (B&W G3 models, and ...)
57  */
58 static int ohci_quirk_opti(struct usb_hcd *hcd)
59 {
60 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
61 
62 	ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n");
63 
64 	return 0;
65 }
66 
67 /* Check for NSC87560. We have to look at the bridge (fn1) to
68  * identify the USB (fn2). This quirk might apply to more or
69  * even all NSC stuff.
70  */
71 static int ohci_quirk_ns(struct usb_hcd *hcd)
72 {
73 	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
74 	struct pci_dev	*b;
75 
76 	b  = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
77 	if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
78 	    && b->vendor == PCI_VENDOR_ID_NS) {
79 		struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
80 
81 		ohci->flags |= OHCI_QUIRK_SUPERIO;
82 		ohci_dbg (ohci, "Using NSC SuperIO setup\n");
83 	}
84 	pci_dev_put(b);
85 
86 	return 0;
87 }
88 
89 /* Check for Compaq's ZFMicro chipset, which needs short
90  * delays before control or bulk queues get re-activated
91  * in finish_unlinks()
92  */
93 static int ohci_quirk_zfmicro(struct usb_hcd *hcd)
94 {
95 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
96 
97 	ohci->flags |= OHCI_QUIRK_ZFMICRO;
98 	ohci_dbg(ohci, "enabled Compaq ZFMicro chipset quirks\n");
99 
100 	return 0;
101 }
102 
103 /* Check for Toshiba SCC OHCI which has big endian registers
104  * and little endian in memory data structures
105  */
106 static int ohci_quirk_toshiba_scc(struct usb_hcd *hcd)
107 {
108 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
109 
110 	/* That chip is only present in the southbridge of some
111 	 * cell based platforms which are supposed to select
112 	 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if
113 	 * that was the case though.
114 	 */
115 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO
116 	ohci->flags |= OHCI_QUIRK_BE_MMIO;
117 	ohci_dbg (ohci, "enabled big endian Toshiba quirk\n");
118 	return 0;
119 #else
120 	ohci_err (ohci, "unsupported big endian Toshiba quirk\n");
121 	return -ENXIO;
122 #endif
123 }
124 
125 /* Check for NEC chip and apply quirk for allegedly lost interrupts.
126  */
127 
128 static void ohci_quirk_nec_worker(struct work_struct *work)
129 {
130 	struct ohci_hcd *ohci = container_of(work, struct ohci_hcd, nec_work);
131 	int status;
132 
133 	status = ohci_restart(ohci);
134 	if (status != 0)
135 		ohci_err(ohci, "Restarting NEC controller failed in %s, %d\n",
136 			 "ohci_restart", status);
137 }
138 
139 static int ohci_quirk_nec(struct usb_hcd *hcd)
140 {
141 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
142 
143 	ohci->flags |= OHCI_QUIRK_NEC;
144 	INIT_WORK(&ohci->nec_work, ohci_quirk_nec_worker);
145 	ohci_dbg (ohci, "enabled NEC chipset lost interrupt quirk\n");
146 
147 	return 0;
148 }
149 
150 static int ohci_quirk_amd700(struct usb_hcd *hcd)
151 {
152 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
153 
154 	if (usb_amd_find_chipset_info())
155 		ohci->flags |= OHCI_QUIRK_AMD_PLL;
156 
157 	/* SB800 needs pre-fetch fix */
158 	if (usb_amd_prefetch_quirk()) {
159 		ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
160 		ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
161 	}
162 
163 	ohci->flags |= OHCI_QUIRK_GLOBAL_SUSPEND;
164 	return 0;
165 }
166 
167 static int ohci_quirk_qemu(struct usb_hcd *hcd)
168 {
169 	struct ohci_hcd *ohci = hcd_to_ohci(hcd);
170 
171 	ohci->flags |= OHCI_QUIRK_QEMU;
172 	ohci_dbg(ohci, "enabled qemu quirk\n");
173 	return 0;
174 }
175 
176 /* List of quirks for OHCI */
177 static const struct pci_device_id ohci_pci_quirks[] = {
178 	{
179 		PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c),
180 		.driver_data = (unsigned long)ohci_quirk_amd756,
181 	},
182 	{
183 		PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861),
184 		.driver_data = (unsigned long)ohci_quirk_opti,
185 	},
186 	{
187 		PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID),
188 		.driver_data = (unsigned long)ohci_quirk_ns,
189 	},
190 	{
191 		PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8),
192 		.driver_data = (unsigned long)ohci_quirk_zfmicro,
193 	},
194 	{
195 		PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6),
196 		.driver_data = (unsigned long)ohci_quirk_toshiba_scc,
197 	},
198 	{
199 		PCI_DEVICE(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB),
200 		.driver_data = (unsigned long)ohci_quirk_nec,
201 	},
202 	{
203 		/* Toshiba portege 4000 */
204 		.vendor		= PCI_VENDOR_ID_AL,
205 		.device		= 0x5237,
206 		.subvendor	= PCI_VENDOR_ID_TOSHIBA,
207 		.subdevice	= 0x0004,
208 		.driver_data	= (unsigned long) broken_suspend,
209 	},
210 	{
211 		PCI_DEVICE(PCI_VENDOR_ID_ITE, 0x8152),
212 		.driver_data = (unsigned long) broken_suspend,
213 	},
214 	{
215 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4397),
216 		.driver_data = (unsigned long)ohci_quirk_amd700,
217 	},
218 	{
219 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4398),
220 		.driver_data = (unsigned long)ohci_quirk_amd700,
221 	},
222 	{
223 		PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4399),
224 		.driver_data = (unsigned long)ohci_quirk_amd700,
225 	},
226 	{
227 		.vendor		= PCI_VENDOR_ID_APPLE,
228 		.device		= 0x003f,
229 		.subvendor	= PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
230 		.subdevice	= PCI_SUBDEVICE_ID_QEMU,
231 		.driver_data	= (unsigned long)ohci_quirk_qemu,
232 	},
233 
234 	/* FIXME for some of the early AMD 760 southbridges, OHCI
235 	 * won't work at all.  blacklist them.
236 	 */
237 
238 	{},
239 };
240 
241 static int ohci_pci_reset (struct usb_hcd *hcd)
242 {
243 	struct ohci_hcd	*ohci = hcd_to_ohci (hcd);
244 	struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
245 	int ret = 0;
246 
247 	if (hcd->self.controller) {
248 		const struct pci_device_id *quirk_id;
249 
250 		quirk_id = pci_match_id(ohci_pci_quirks, pdev);
251 		if (quirk_id != NULL) {
252 			int (*quirk)(struct usb_hcd *ohci);
253 			quirk = (void *)quirk_id->driver_data;
254 			ret = quirk(hcd);
255 		}
256 	}
257 
258 	if (ret == 0)
259 		ret = ohci_setup(hcd);
260 	/*
261 	* After ohci setup RWC may not be set for add-in PCI cards.
262 	* This transfers PCI PM wakeup capabilities.
263 	*/
264 	if (device_can_wakeup(&pdev->dev))
265 		ohci->hc_control |= OHCI_CTRL_RWC;
266 	return ret;
267 }
268 
269 static struct hc_driver __read_mostly ohci_pci_hc_driver;
270 
271 static const struct ohci_driver_overrides pci_overrides __initconst = {
272 	.product_desc =		"OHCI PCI host controller",
273 	.reset =		ohci_pci_reset,
274 };
275 
276 static const struct pci_device_id pci_ids [] = { {
277 	/* handle any USB OHCI controller */
278 	PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
279 	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
280 	}, {
281 	/* The device in the ConneXT I/O hub has no class reg */
282 	PCI_VDEVICE(STMICRO, PCI_DEVICE_ID_STMICRO_USB_OHCI),
283 	.driver_data =	(unsigned long) &ohci_pci_hc_driver,
284 	}, { /* end: all zeroes */ }
285 };
286 MODULE_DEVICE_TABLE (pci, pci_ids);
287 
288 /* pci driver glue; this is a "new style" PCI driver module */
289 static struct pci_driver ohci_pci_driver = {
290 	.name =		(char *) hcd_name,
291 	.id_table =	pci_ids,
292 
293 	.probe =	usb_hcd_pci_probe,
294 	.remove =	usb_hcd_pci_remove,
295 	.shutdown =	usb_hcd_pci_shutdown,
296 
297 #ifdef CONFIG_PM
298 	.driver =	{
299 		.pm =	&usb_hcd_pci_pm_ops
300 	},
301 #endif
302 };
303 
304 static int __init ohci_pci_init(void)
305 {
306 	if (usb_disabled())
307 		return -ENODEV;
308 
309 	pr_info("%s: " DRIVER_DESC "\n", hcd_name);
310 
311 	ohci_init_driver(&ohci_pci_hc_driver, &pci_overrides);
312 
313 #ifdef	CONFIG_PM
314 	/* Entries for the PCI suspend/resume callbacks are special */
315 	ohci_pci_hc_driver.pci_suspend = ohci_suspend;
316 	ohci_pci_hc_driver.pci_resume = ohci_resume;
317 #endif
318 
319 	return pci_register_driver(&ohci_pci_driver);
320 }
321 module_init(ohci_pci_init);
322 
323 static void __exit ohci_pci_cleanup(void)
324 {
325 	pci_unregister_driver(&ohci_pci_driver);
326 }
327 module_exit(ohci_pci_cleanup);
328 
329 MODULE_DESCRIPTION(DRIVER_DESC);
330 MODULE_LICENSE("GPL");
331 MODULE_SOFTDEP("pre: ehci_pci");
332