1 /* 2 * OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 6 * 7 * [ Initialisation is based on Linus' ] 8 * [ uhci code and gregs ohci fragments ] 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 * 12 * PCI Bus Glue 13 * 14 * This file is licenced under the GPL. 15 */ 16 17 #ifndef CONFIG_PCI 18 #error "This file is PCI bus glue. CONFIG_PCI must be defined." 19 #endif 20 21 /*-------------------------------------------------------------------------*/ 22 23 /* AMD 756, for most chips (early revs), corrupts register 24 * values on read ... so enable the vendor workaround. 25 */ 26 static int __devinit ohci_quirk_amd756(struct usb_hcd *hcd) 27 { 28 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 29 30 ohci->flags = OHCI_QUIRK_AMD756; 31 ohci_dbg (ohci, "AMD756 erratum 4 workaround\n"); 32 33 /* also erratum 10 (suspend/resume issues) */ 34 device_init_wakeup(&hcd->self.root_hub->dev, 0); 35 36 return 0; 37 } 38 39 /* Apple's OHCI driver has a lot of bizarre workarounds 40 * for this chip. Evidently control and bulk lists 41 * can get confused. (B&W G3 models, and ...) 42 */ 43 static int __devinit ohci_quirk_opti(struct usb_hcd *hcd) 44 { 45 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 46 47 ohci_dbg (ohci, "WARNING: OPTi workarounds unavailable\n"); 48 49 return 0; 50 } 51 52 /* Check for NSC87560. We have to look at the bridge (fn1) to 53 * identify the USB (fn2). This quirk might apply to more or 54 * even all NSC stuff. 55 */ 56 static int __devinit ohci_quirk_ns(struct usb_hcd *hcd) 57 { 58 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 59 struct pci_dev *b; 60 61 b = pci_get_slot (pdev->bus, PCI_DEVFN (PCI_SLOT (pdev->devfn), 1)); 62 if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO 63 && b->vendor == PCI_VENDOR_ID_NS) { 64 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 65 66 ohci->flags |= OHCI_QUIRK_SUPERIO; 67 ohci_dbg (ohci, "Using NSC SuperIO setup\n"); 68 } 69 pci_dev_put(b); 70 71 return 0; 72 } 73 74 /* Check for Compaq's ZFMicro chipset, which needs short 75 * delays before control or bulk queues get re-activated 76 * in finish_unlinks() 77 */ 78 static int __devinit ohci_quirk_zfmicro(struct usb_hcd *hcd) 79 { 80 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 81 82 ohci->flags |= OHCI_QUIRK_ZFMICRO; 83 ohci_dbg (ohci, "enabled Compaq ZFMicro chipset quirk\n"); 84 85 return 0; 86 } 87 88 /* Check for Toshiba SCC OHCI which has big endian registers 89 * and little endian in memory data structures 90 */ 91 static int __devinit ohci_quirk_toshiba_scc(struct usb_hcd *hcd) 92 { 93 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 94 95 /* That chip is only present in the southbridge of some 96 * cell based platforms which are supposed to select 97 * CONFIG_USB_OHCI_BIG_ENDIAN_MMIO. We verify here if 98 * that was the case though. 99 */ 100 #ifdef CONFIG_USB_OHCI_BIG_ENDIAN_MMIO 101 ohci->flags |= OHCI_QUIRK_BE_MMIO; 102 ohci_dbg (ohci, "enabled big endian Toshiba quirk\n"); 103 return 0; 104 #else 105 ohci_err (ohci, "unsupported big endian Toshiba quirk\n"); 106 return -ENXIO; 107 #endif 108 } 109 110 /* List of quirks for OHCI */ 111 static const struct pci_device_id ohci_pci_quirks[] = { 112 { 113 PCI_DEVICE(PCI_VENDOR_ID_AMD, 0x740c), 114 .driver_data = (unsigned long)ohci_quirk_amd756, 115 }, 116 { 117 PCI_DEVICE(PCI_VENDOR_ID_OPTI, 0xc861), 118 .driver_data = (unsigned long)ohci_quirk_opti, 119 }, 120 { 121 PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_ANY_ID), 122 .driver_data = (unsigned long)ohci_quirk_ns, 123 }, 124 { 125 PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xa0f8), 126 .driver_data = (unsigned long)ohci_quirk_zfmicro, 127 }, 128 { 129 PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, 0x01b6), 130 .driver_data = (unsigned long)ohci_quirk_toshiba_scc, 131 }, 132 /* FIXME for some of the early AMD 760 southbridges, OHCI 133 * won't work at all. blacklist them. 134 */ 135 136 {}, 137 }; 138 139 static int ohci_pci_reset (struct usb_hcd *hcd) 140 { 141 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 142 int ret = 0; 143 144 if (hcd->self.controller) { 145 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 146 const struct pci_device_id *quirk_id; 147 148 quirk_id = pci_match_id(ohci_pci_quirks, pdev); 149 if (quirk_id != NULL) { 150 int (*quirk)(struct usb_hcd *ohci); 151 quirk = (void *)quirk_id->driver_data; 152 ret = quirk(hcd); 153 } 154 } 155 if (ret == 0) { 156 ohci_hcd_init (ohci); 157 return ohci_init (ohci); 158 } 159 return ret; 160 } 161 162 163 static int __devinit ohci_pci_start (struct usb_hcd *hcd) 164 { 165 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 166 int ret; 167 168 #ifdef CONFIG_PM /* avoid warnings about unused pdev */ 169 if (hcd->self.controller) { 170 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 171 172 /* RWC may not be set for add-in PCI cards, since boot 173 * firmware probably ignored them. This transfers PCI 174 * PM wakeup capabilities (once the PCI layer is fixed). 175 */ 176 if (device_may_wakeup(&pdev->dev)) 177 ohci->hc_control |= OHCI_CTRL_RWC; 178 } 179 #endif /* CONFIG_PM */ 180 181 ret = ohci_run (ohci); 182 if (ret < 0) { 183 ohci_err (ohci, "can't start\n"); 184 ohci_stop (hcd); 185 } 186 return ret; 187 } 188 189 #ifdef CONFIG_PM 190 191 static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message) 192 { 193 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 194 unsigned long flags; 195 int rc = 0; 196 197 /* Root hub was already suspended. Disable irq emission and 198 * mark HW unaccessible, bail out if RH has been resumed. Use 199 * the spinlock to properly synchronize with possible pending 200 * RH suspend or resume activity. 201 * 202 * This is still racy as hcd->state is manipulated outside of 203 * any locks =P But that will be a different fix. 204 */ 205 spin_lock_irqsave (&ohci->lock, flags); 206 if (hcd->state != HC_STATE_SUSPENDED) { 207 rc = -EINVAL; 208 goto bail; 209 } 210 ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 211 (void)ohci_readl(ohci, &ohci->regs->intrdisable); 212 213 /* make sure snapshot being resumed re-enumerates everything */ 214 if (message.event == PM_EVENT_PRETHAW) 215 ohci_usb_reset(ohci); 216 217 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 218 bail: 219 spin_unlock_irqrestore (&ohci->lock, flags); 220 221 return rc; 222 } 223 224 225 static int ohci_pci_resume (struct usb_hcd *hcd) 226 { 227 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 228 usb_hcd_resume_root_hub(hcd); 229 return 0; 230 } 231 232 #endif /* CONFIG_PM */ 233 234 235 /*-------------------------------------------------------------------------*/ 236 237 static const struct hc_driver ohci_pci_hc_driver = { 238 .description = hcd_name, 239 .product_desc = "OHCI Host Controller", 240 .hcd_priv_size = sizeof(struct ohci_hcd), 241 242 /* 243 * generic hardware linkage 244 */ 245 .irq = ohci_irq, 246 .flags = HCD_MEMORY | HCD_USB11, 247 248 /* 249 * basic lifecycle operations 250 */ 251 .reset = ohci_pci_reset, 252 .start = ohci_pci_start, 253 .stop = ohci_stop, 254 .shutdown = ohci_shutdown, 255 256 #ifdef CONFIG_PM 257 /* these suspend/resume entries are for upstream PCI glue ONLY */ 258 .suspend = ohci_pci_suspend, 259 .resume = ohci_pci_resume, 260 #endif 261 262 /* 263 * managing i/o requests and associated device resources 264 */ 265 .urb_enqueue = ohci_urb_enqueue, 266 .urb_dequeue = ohci_urb_dequeue, 267 .endpoint_disable = ohci_endpoint_disable, 268 269 /* 270 * scheduling support 271 */ 272 .get_frame_number = ohci_get_frame, 273 274 /* 275 * root hub support 276 */ 277 .hub_status_data = ohci_hub_status_data, 278 .hub_control = ohci_hub_control, 279 .hub_irq_enable = ohci_rhsc_enable, 280 #ifdef CONFIG_PM 281 .bus_suspend = ohci_bus_suspend, 282 .bus_resume = ohci_bus_resume, 283 #endif 284 .start_port_reset = ohci_start_port_reset, 285 }; 286 287 /*-------------------------------------------------------------------------*/ 288 289 290 static const struct pci_device_id pci_ids [] = { { 291 /* handle any USB OHCI controller */ 292 PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0), 293 .driver_data = (unsigned long) &ohci_pci_hc_driver, 294 }, { /* end: all zeroes */ } 295 }; 296 MODULE_DEVICE_TABLE (pci, pci_ids); 297 298 /* pci driver glue; this is a "new style" PCI driver module */ 299 static struct pci_driver ohci_pci_driver = { 300 .name = (char *) hcd_name, 301 .id_table = pci_ids, 302 303 .probe = usb_hcd_pci_probe, 304 .remove = usb_hcd_pci_remove, 305 306 #ifdef CONFIG_PM 307 .suspend = usb_hcd_pci_suspend, 308 .resume = usb_hcd_pci_resume, 309 #endif 310 311 .shutdown = usb_hcd_pci_shutdown, 312 }; 313 314