1 // SPDX-License-Identifier: GPL-1.0+ 2 /* 3 * OHCI HCD (Host Controller Driver) for USB. 4 * 5 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 6 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net> 7 * 8 * This file is licenced under the GPL. 9 */ 10 11 /*-------------------------------------------------------------------------*/ 12 13 /* 14 * OHCI deals with three types of memory: 15 * - data used only by the HCD ... kmalloc is fine 16 * - async and periodic schedules, shared by HC and HCD ... these 17 * need to use dma_pool or dma_alloc_coherent 18 * - driver buffers, read/written by HC ... the hcd glue or the 19 * device driver provides us with dma addresses 20 * 21 * There's also "register" data, which is memory mapped. 22 * No memory seen by this driver (or any HCD) may be paged out. 23 */ 24 25 /*-------------------------------------------------------------------------*/ 26 27 static void ohci_hcd_init (struct ohci_hcd *ohci) 28 { 29 ohci->next_statechange = jiffies; 30 spin_lock_init (&ohci->lock); 31 INIT_LIST_HEAD (&ohci->pending); 32 INIT_LIST_HEAD(&ohci->eds_in_use); 33 } 34 35 /*-------------------------------------------------------------------------*/ 36 37 static int ohci_mem_init (struct ohci_hcd *ohci) 38 { 39 ohci->td_cache = dma_pool_create ("ohci_td", 40 ohci_to_hcd(ohci)->self.controller, 41 sizeof (struct td), 42 32 /* byte alignment */, 43 0 /* no page-crossing issues */); 44 if (!ohci->td_cache) 45 return -ENOMEM; 46 ohci->ed_cache = dma_pool_create ("ohci_ed", 47 ohci_to_hcd(ohci)->self.controller, 48 sizeof (struct ed), 49 16 /* byte alignment */, 50 0 /* no page-crossing issues */); 51 if (!ohci->ed_cache) { 52 dma_pool_destroy (ohci->td_cache); 53 return -ENOMEM; 54 } 55 return 0; 56 } 57 58 static void ohci_mem_cleanup (struct ohci_hcd *ohci) 59 { 60 dma_pool_destroy(ohci->td_cache); 61 ohci->td_cache = NULL; 62 dma_pool_destroy(ohci->ed_cache); 63 ohci->ed_cache = NULL; 64 } 65 66 /*-------------------------------------------------------------------------*/ 67 68 /* ohci "done list" processing needs this mapping */ 69 static inline struct td * 70 dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma) 71 { 72 struct td *td; 73 74 td_dma &= TD_MASK; 75 td = hc->td_hash [TD_HASH_FUNC(td_dma)]; 76 while (td && td->td_dma != td_dma) 77 td = td->td_hash; 78 return td; 79 } 80 81 /* TDs ... */ 82 static struct td * 83 td_alloc (struct ohci_hcd *hc, gfp_t mem_flags) 84 { 85 dma_addr_t dma; 86 struct td *td; 87 88 td = dma_pool_zalloc (hc->td_cache, mem_flags, &dma); 89 if (td) { 90 /* in case hc fetches it, make it look dead */ 91 td->hwNextTD = cpu_to_hc32 (hc, dma); 92 td->td_dma = dma; 93 /* hashed in td_fill */ 94 } 95 return td; 96 } 97 98 static void 99 td_free (struct ohci_hcd *hc, struct td *td) 100 { 101 struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)]; 102 103 while (*prev && *prev != td) 104 prev = &(*prev)->td_hash; 105 if (*prev) 106 *prev = td->td_hash; 107 else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0) 108 ohci_dbg (hc, "no hash for td %p\n", td); 109 dma_pool_free (hc->td_cache, td, td->td_dma); 110 } 111 112 /*-------------------------------------------------------------------------*/ 113 114 /* EDs ... */ 115 static struct ed * 116 ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags) 117 { 118 dma_addr_t dma; 119 struct ed *ed; 120 121 ed = dma_pool_zalloc (hc->ed_cache, mem_flags, &dma); 122 if (ed) { 123 INIT_LIST_HEAD (&ed->td_list); 124 ed->dma = dma; 125 } 126 return ed; 127 } 128 129 static void 130 ed_free (struct ohci_hcd *hc, struct ed *ed) 131 { 132 dma_pool_free (hc->ed_cache, ed, ed->dma); 133 } 134 135