1 /* 2 * OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> 6 * 7 * [ Initialisation is based on Linus' ] 8 * [ uhci code and gregs ohci fragments ] 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 * 12 * 13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller 14 * interfaces (though some non-x86 Intel chips use it). It supports 15 * smarter hardware than UHCI. A download link for the spec available 16 * through the http://www.usb.org website. 17 * 18 * History: 19 * 20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer) 21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net) 22 * 2003/02/24 show registers in sysfs (Kevin Brosius) 23 * 24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and 25 * bandwidth accounting; if debugging, show schedules in driverfs 26 * 2002/07/19 fixes to management of ED and schedule state. 27 * 2002/06/09 SA-1111 support (Christopher Hoover) 28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info 29 * to fix urb unlink races caused by interrupt latency assumptions; 30 * minor ED field and function naming updates 31 * 2002/01/18 package as a patch for 2.5.3; this should match the 32 * 2.4.17 kernel modulo some bugs being fixed. 33 * 34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes 35 * from post-2.4.5 patches. 36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning 37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree 38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify; 39 * pbook pci quirks gone (please fix pbook pci sw!) (db) 40 * 41 * 2001/04/08 Identify version on module load (gb) 42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam); 43 pci_map_single (db) 44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db) 45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam) 46 * 47 * 2000/09/26 fixed races in removing the private portion of the urb 48 * 2000/09/07 disable bulk and control lists when unlinking the last 49 * endpoint descriptor in order to avoid unrecoverable errors on 50 * the Lucent chips. (rwc@sgi) 51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some 52 * urb unlink probs, indentation fixes 53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from 54 * device unplugs. 55 * 2000/06/28 use PCI hotplug framework, for better power management 56 * and for Cardbus support (David Brownell) 57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling 58 * when the controller loses power; handle UE; cleanup; ... 59 * 60 * v5.2 1999/12/07 URB 3rd preview, 61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi) 62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume 63 * i386: HUB, Keyboard, Mouse, Printer 64 * 65 * v4.3 1999/10/27 multiple HCs, bulk_request 66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes 67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl. 68 * v4.0 1999/08/18 69 * v3.0 1999/06/25 70 * v2.1 1999/05/09 code clean up 71 * v2.0 1999/05/04 72 * v1.0 1999/04/27 initial release 73 * 74 * This file is licenced under the GPL. 75 */ 76 77 #include <linux/config.h> 78 #include <linux/module.h> 79 #include <linux/moduleparam.h> 80 #include <linux/pci.h> 81 #include <linux/kernel.h> 82 #include <linux/delay.h> 83 #include <linux/ioport.h> 84 #include <linux/sched.h> 85 #include <linux/slab.h> 86 #include <linux/smp_lock.h> 87 #include <linux/errno.h> 88 #include <linux/init.h> 89 #include <linux/timer.h> 90 #include <linux/list.h> 91 #include <linux/usb.h> 92 #include <linux/usb_otg.h> 93 #include <linux/dma-mapping.h> 94 #include <linux/dmapool.h> 95 #include <linux/reboot.h> 96 97 #include <asm/io.h> 98 #include <asm/irq.h> 99 #include <asm/system.h> 100 #include <asm/unaligned.h> 101 #include <asm/byteorder.h> 102 103 #include "../core/hcd.h" 104 105 #define DRIVER_VERSION "2005 April 22" 106 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell" 107 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver" 108 109 /*-------------------------------------------------------------------------*/ 110 111 #undef OHCI_VERBOSE_DEBUG /* not always helpful */ 112 113 /* For initializing controller (mask in an HCFS mode too) */ 114 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR 115 #define OHCI_INTR_INIT \ 116 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH) 117 118 #ifdef __hppa__ 119 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */ 120 #define IR_DISABLE 121 #endif 122 123 #ifdef CONFIG_ARCH_OMAP 124 /* OMAP doesn't support IR (no SMM; not needed) */ 125 #define IR_DISABLE 126 #endif 127 128 /*-------------------------------------------------------------------------*/ 129 130 static const char hcd_name [] = "ohci_hcd"; 131 132 #include "ohci.h" 133 134 static void ohci_dump (struct ohci_hcd *ohci, int verbose); 135 static int ohci_init (struct ohci_hcd *ohci); 136 static void ohci_stop (struct usb_hcd *hcd); 137 static int ohci_reboot (struct notifier_block *, unsigned long , void *); 138 139 #include "ohci-hub.c" 140 #include "ohci-dbg.c" 141 #include "ohci-mem.c" 142 #include "ohci-q.c" 143 144 145 /* 146 * On architectures with edge-triggered interrupts we must never return 147 * IRQ_NONE. 148 */ 149 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */ 150 #define IRQ_NOTMINE IRQ_HANDLED 151 #else 152 #define IRQ_NOTMINE IRQ_NONE 153 #endif 154 155 156 /* Some boards misreport power switching/overcurrent */ 157 static int distrust_firmware = 1; 158 module_param (distrust_firmware, bool, 0); 159 MODULE_PARM_DESC (distrust_firmware, 160 "true to distrust firmware power/overcurrent setup"); 161 162 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */ 163 static int no_handshake = 0; 164 module_param (no_handshake, bool, 0); 165 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake"); 166 167 /*-------------------------------------------------------------------------*/ 168 169 /* 170 * queue up an urb for anything except the root hub 171 */ 172 static int ohci_urb_enqueue ( 173 struct usb_hcd *hcd, 174 struct usb_host_endpoint *ep, 175 struct urb *urb, 176 gfp_t mem_flags 177 ) { 178 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 179 struct ed *ed; 180 urb_priv_t *urb_priv; 181 unsigned int pipe = urb->pipe; 182 int i, size = 0; 183 unsigned long flags; 184 int retval = 0; 185 186 #ifdef OHCI_VERBOSE_DEBUG 187 urb_print (urb, "SUB", usb_pipein (pipe)); 188 #endif 189 190 /* every endpoint has a ed, locate and maybe (re)initialize it */ 191 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval))) 192 return -ENOMEM; 193 194 /* for the private part of the URB we need the number of TDs (size) */ 195 switch (ed->type) { 196 case PIPE_CONTROL: 197 /* td_submit_urb() doesn't yet handle these */ 198 if (urb->transfer_buffer_length > 4096) 199 return -EMSGSIZE; 200 201 /* 1 TD for setup, 1 for ACK, plus ... */ 202 size = 2; 203 /* FALLTHROUGH */ 204 // case PIPE_INTERRUPT: 205 // case PIPE_BULK: 206 default: 207 /* one TD for every 4096 Bytes (can be upto 8K) */ 208 size += urb->transfer_buffer_length / 4096; 209 /* ... and for any remaining bytes ... */ 210 if ((urb->transfer_buffer_length % 4096) != 0) 211 size++; 212 /* ... and maybe a zero length packet to wrap it up */ 213 if (size == 0) 214 size++; 215 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0 216 && (urb->transfer_buffer_length 217 % usb_maxpacket (urb->dev, pipe, 218 usb_pipeout (pipe))) == 0) 219 size++; 220 break; 221 case PIPE_ISOCHRONOUS: /* number of packets from URB */ 222 size = urb->number_of_packets; 223 break; 224 } 225 226 /* allocate the private part of the URB */ 227 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *), 228 mem_flags); 229 if (!urb_priv) 230 return -ENOMEM; 231 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *)); 232 INIT_LIST_HEAD (&urb_priv->pending); 233 urb_priv->length = size; 234 urb_priv->ed = ed; 235 236 /* allocate the TDs (deferring hash chain updates) */ 237 for (i = 0; i < size; i++) { 238 urb_priv->td [i] = td_alloc (ohci, mem_flags); 239 if (!urb_priv->td [i]) { 240 urb_priv->length = i; 241 urb_free_priv (ohci, urb_priv); 242 return -ENOMEM; 243 } 244 } 245 246 spin_lock_irqsave (&ohci->lock, flags); 247 248 /* don't submit to a dead HC */ 249 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) { 250 retval = -ENODEV; 251 goto fail; 252 } 253 if (!HC_IS_RUNNING(hcd->state)) { 254 retval = -ENODEV; 255 goto fail; 256 } 257 258 /* in case of unlink-during-submit */ 259 spin_lock (&urb->lock); 260 if (urb->status != -EINPROGRESS) { 261 spin_unlock (&urb->lock); 262 urb->hcpriv = urb_priv; 263 finish_urb (ohci, urb, NULL); 264 retval = 0; 265 goto fail; 266 } 267 268 /* schedule the ed if needed */ 269 if (ed->state == ED_IDLE) { 270 retval = ed_schedule (ohci, ed); 271 if (retval < 0) 272 goto fail0; 273 if (ed->type == PIPE_ISOCHRONOUS) { 274 u16 frame = ohci_frame_no(ohci); 275 276 /* delay a few frames before the first TD */ 277 frame += max_t (u16, 8, ed->interval); 278 frame &= ~(ed->interval - 1); 279 frame |= ed->branch; 280 urb->start_frame = frame; 281 282 /* yes, only URB_ISO_ASAP is supported, and 283 * urb->start_frame is never used as input. 284 */ 285 } 286 } else if (ed->type == PIPE_ISOCHRONOUS) 287 urb->start_frame = ed->last_iso + ed->interval; 288 289 /* fill the TDs and link them to the ed; and 290 * enable that part of the schedule, if needed 291 * and update count of queued periodic urbs 292 */ 293 urb->hcpriv = urb_priv; 294 td_submit_urb (ohci, urb); 295 296 fail0: 297 spin_unlock (&urb->lock); 298 fail: 299 if (retval) 300 urb_free_priv (ohci, urb_priv); 301 spin_unlock_irqrestore (&ohci->lock, flags); 302 return retval; 303 } 304 305 /* 306 * decouple the URB from the HC queues (TDs, urb_priv); it's 307 * already marked using urb->status. reporting is always done 308 * asynchronously, and we might be dealing with an urb that's 309 * partially transferred, or an ED with other urbs being unlinked. 310 */ 311 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) 312 { 313 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 314 unsigned long flags; 315 316 #ifdef OHCI_VERBOSE_DEBUG 317 urb_print (urb, "UNLINK", 1); 318 #endif 319 320 spin_lock_irqsave (&ohci->lock, flags); 321 if (HC_IS_RUNNING(hcd->state)) { 322 urb_priv_t *urb_priv; 323 324 /* Unless an IRQ completed the unlink while it was being 325 * handed to us, flag it for unlink and giveback, and force 326 * some upcoming INTR_SF to call finish_unlinks() 327 */ 328 urb_priv = urb->hcpriv; 329 if (urb_priv) { 330 if (urb_priv->ed->state == ED_OPER) 331 start_ed_unlink (ohci, urb_priv->ed); 332 } 333 } else { 334 /* 335 * with HC dead, we won't respect hc queue pointers 336 * any more ... just clean up every urb's memory. 337 */ 338 if (urb->hcpriv) 339 finish_urb (ohci, urb, NULL); 340 } 341 spin_unlock_irqrestore (&ohci->lock, flags); 342 return 0; 343 } 344 345 /*-------------------------------------------------------------------------*/ 346 347 /* frees config/altsetting state for endpoints, 348 * including ED memory, dummy TD, and bulk/intr data toggle 349 */ 350 351 static void 352 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) 353 { 354 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 355 unsigned long flags; 356 struct ed *ed = ep->hcpriv; 357 unsigned limit = 1000; 358 359 /* ASSERT: any requests/urbs are being unlinked */ 360 /* ASSERT: nobody can be submitting urbs for this any more */ 361 362 if (!ed) 363 return; 364 365 rescan: 366 spin_lock_irqsave (&ohci->lock, flags); 367 368 if (!HC_IS_RUNNING (hcd->state)) { 369 sanitize: 370 ed->state = ED_IDLE; 371 finish_unlinks (ohci, 0, NULL); 372 } 373 374 switch (ed->state) { 375 case ED_UNLINK: /* wait for hw to finish? */ 376 /* major IRQ delivery trouble loses INTR_SF too... */ 377 if (limit-- == 0) { 378 ohci_warn (ohci, "IRQ INTR_SF lossage\n"); 379 goto sanitize; 380 } 381 spin_unlock_irqrestore (&ohci->lock, flags); 382 schedule_timeout_uninterruptible(1); 383 goto rescan; 384 case ED_IDLE: /* fully unlinked */ 385 if (list_empty (&ed->td_list)) { 386 td_free (ohci, ed->dummy); 387 ed_free (ohci, ed); 388 break; 389 } 390 /* else FALL THROUGH */ 391 default: 392 /* caller was supposed to have unlinked any requests; 393 * that's not our job. can't recover; must leak ed. 394 */ 395 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n", 396 ed, ep->desc.bEndpointAddress, ed->state, 397 list_empty (&ed->td_list) ? "" : " (has tds)"); 398 td_free (ohci, ed->dummy); 399 break; 400 } 401 ep->hcpriv = NULL; 402 spin_unlock_irqrestore (&ohci->lock, flags); 403 return; 404 } 405 406 static int ohci_get_frame (struct usb_hcd *hcd) 407 { 408 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 409 410 return ohci_frame_no(ohci); 411 } 412 413 static void ohci_usb_reset (struct ohci_hcd *ohci) 414 { 415 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); 416 ohci->hc_control &= OHCI_CTRL_RWC; 417 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 418 } 419 420 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and 421 * other cases where the next software may expect clean state from the 422 * "firmware". this is bus-neutral, unlike shutdown() methods. 423 */ 424 static int 425 ohci_reboot (struct notifier_block *block, unsigned long code, void *null) 426 { 427 struct ohci_hcd *ohci; 428 429 ohci = container_of (block, struct ohci_hcd, reboot_notifier); 430 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 431 ohci_usb_reset (ohci); 432 /* flush the writes */ 433 (void) ohci_readl (ohci, &ohci->regs->control); 434 return 0; 435 } 436 437 /*-------------------------------------------------------------------------* 438 * HC functions 439 *-------------------------------------------------------------------------*/ 440 441 /* init memory, and kick BIOS/SMM off */ 442 443 static int ohci_init (struct ohci_hcd *ohci) 444 { 445 int ret; 446 struct usb_hcd *hcd = ohci_to_hcd(ohci); 447 448 disable (ohci); 449 ohci->regs = hcd->regs; 450 ohci->next_statechange = jiffies; 451 452 /* REVISIT this BIOS handshake is now moved into PCI "quirks", and 453 * was never needed for most non-PCI systems ... remove the code? 454 */ 455 456 #ifndef IR_DISABLE 457 /* SMM owns the HC? not for long! */ 458 if (!no_handshake && ohci_readl (ohci, 459 &ohci->regs->control) & OHCI_CTRL_IR) { 460 u32 temp; 461 462 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n"); 463 464 /* this timeout is arbitrary. we make it long, so systems 465 * depending on usb keyboards may be usable even if the 466 * BIOS/SMM code seems pretty broken. 467 */ 468 temp = 500; /* arbitrary: five seconds */ 469 470 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable); 471 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus); 472 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) { 473 msleep (10); 474 if (--temp == 0) { 475 ohci_err (ohci, "USB HC takeover failed!" 476 " (BIOS/SMM bug)\n"); 477 return -EBUSY; 478 } 479 } 480 ohci_usb_reset (ohci); 481 } 482 #endif 483 484 /* Disable HC interrupts */ 485 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 486 487 /* flush the writes, and save key bits like RWC */ 488 if (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_RWC) 489 ohci->hc_control |= OHCI_CTRL_RWC; 490 491 /* Read the number of ports unless overridden */ 492 if (ohci->num_ports == 0) 493 ohci->num_ports = roothub_a(ohci) & RH_A_NDP; 494 495 if (ohci->hcca) 496 return 0; 497 498 ohci->hcca = dma_alloc_coherent (hcd->self.controller, 499 sizeof *ohci->hcca, &ohci->hcca_dma, 0); 500 if (!ohci->hcca) 501 return -ENOMEM; 502 503 if ((ret = ohci_mem_init (ohci)) < 0) 504 ohci_stop (hcd); 505 else { 506 register_reboot_notifier (&ohci->reboot_notifier); 507 create_debug_files (ohci); 508 } 509 510 return ret; 511 } 512 513 /*-------------------------------------------------------------------------*/ 514 515 /* Start an OHCI controller, set the BUS operational 516 * resets USB and controller 517 * enable interrupts 518 */ 519 static int ohci_run (struct ohci_hcd *ohci) 520 { 521 u32 mask, temp; 522 int first = ohci->fminterval == 0; 523 struct usb_hcd *hcd = ohci_to_hcd(ohci); 524 525 disable (ohci); 526 527 /* boot firmware should have set this up (5.1.1.3.1) */ 528 if (first) { 529 530 temp = ohci_readl (ohci, &ohci->regs->fminterval); 531 ohci->fminterval = temp & 0x3fff; 532 if (ohci->fminterval != FI) 533 ohci_dbg (ohci, "fminterval delta %d\n", 534 ohci->fminterval - FI); 535 ohci->fminterval |= FSMP (ohci->fminterval) << 16; 536 /* also: power/overcurrent flags in roothub.a */ 537 } 538 539 /* Reset USB nearly "by the book". RemoteWakeupConnected was 540 * saved if boot firmware (BIOS/SMM/...) told us it's connected, 541 * or if bus glue did the same (e.g. for PCI add-in cards with 542 * PCI PM support). 543 */ 544 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", 545 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), 546 ohci_readl (ohci, &ohci->regs->control)); 547 if ((ohci->hc_control & OHCI_CTRL_RWC) != 0 548 && !device_may_wakeup(hcd->self.controller)) 549 device_init_wakeup(hcd->self.controller, 1); 550 551 switch (ohci->hc_control & OHCI_CTRL_HCFS) { 552 case OHCI_USB_OPER: 553 temp = 0; 554 break; 555 case OHCI_USB_SUSPEND: 556 case OHCI_USB_RESUME: 557 ohci->hc_control &= OHCI_CTRL_RWC; 558 ohci->hc_control |= OHCI_USB_RESUME; 559 temp = 10 /* msec wait */; 560 break; 561 // case OHCI_USB_RESET: 562 default: 563 ohci->hc_control &= OHCI_CTRL_RWC; 564 ohci->hc_control |= OHCI_USB_RESET; 565 temp = 50 /* msec wait */; 566 break; 567 } 568 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 569 // flush the writes 570 (void) ohci_readl (ohci, &ohci->regs->control); 571 msleep(temp); 572 temp = roothub_a (ohci); 573 if (!(temp & RH_A_NPS)) { 574 /* power down each port */ 575 for (temp = 0; temp < ohci->num_ports; temp++) 576 ohci_writel (ohci, RH_PS_LSDA, 577 &ohci->regs->roothub.portstatus [temp]); 578 } 579 // flush those writes 580 (void) ohci_readl (ohci, &ohci->regs->control); 581 memset (ohci->hcca, 0, sizeof (struct ohci_hcca)); 582 583 /* 2msec timelimit here means no irqs/preempt */ 584 spin_lock_irq (&ohci->lock); 585 586 retry: 587 /* HC Reset requires max 10 us delay */ 588 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus); 589 temp = 30; /* ... allow extra time */ 590 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) { 591 if (--temp == 0) { 592 spin_unlock_irq (&ohci->lock); 593 ohci_err (ohci, "USB HC reset timed out!\n"); 594 return -1; 595 } 596 udelay (1); 597 } 598 599 /* now we're in the SUSPEND state ... must go OPERATIONAL 600 * within 2msec else HC enters RESUME 601 * 602 * ... but some hardware won't init fmInterval "by the book" 603 * (SiS, OPTi ...), so reset again instead. SiS doesn't need 604 * this if we write fmInterval after we're OPERATIONAL. 605 * Unclear about ALi, ServerWorks, and others ... this could 606 * easily be a longstanding bug in chip init on Linux. 607 */ 608 if (ohci->flags & OHCI_QUIRK_INITRESET) { 609 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 610 // flush those writes 611 (void) ohci_readl (ohci, &ohci->regs->control); 612 } 613 614 /* Tell the controller where the control and bulk lists are 615 * The lists are empty now. */ 616 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead); 617 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead); 618 619 /* a reset clears this */ 620 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca); 621 622 periodic_reinit (ohci); 623 624 /* some OHCI implementations are finicky about how they init. 625 * bogus values here mean not even enumeration could work. 626 */ 627 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0 628 || !ohci_readl (ohci, &ohci->regs->periodicstart)) { 629 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) { 630 ohci->flags |= OHCI_QUIRK_INITRESET; 631 ohci_dbg (ohci, "enabling initreset quirk\n"); 632 goto retry; 633 } 634 spin_unlock_irq (&ohci->lock); 635 ohci_err (ohci, "init err (%08x %04x)\n", 636 ohci_readl (ohci, &ohci->regs->fminterval), 637 ohci_readl (ohci, &ohci->regs->periodicstart)); 638 return -EOVERFLOW; 639 } 640 641 /* start controller operations */ 642 ohci->hc_control &= OHCI_CTRL_RWC; 643 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; 644 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 645 hcd->state = HC_STATE_RUNNING; 646 647 /* wake on ConnectStatusChange, matching external hubs */ 648 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); 649 650 /* Choose the interrupts we care about now, others later on demand */ 651 mask = OHCI_INTR_INIT; 652 ohci_writel (ohci, mask, &ohci->regs->intrstatus); 653 ohci_writel (ohci, mask, &ohci->regs->intrenable); 654 655 /* handle root hub init quirks ... */ 656 temp = roothub_a (ohci); 657 temp &= ~(RH_A_PSM | RH_A_OCPM); 658 if (ohci->flags & OHCI_QUIRK_SUPERIO) { 659 /* NSC 87560 and maybe others */ 660 temp |= RH_A_NOCP; 661 temp &= ~(RH_A_POTPGT | RH_A_NPS); 662 ohci_writel (ohci, temp, &ohci->regs->roothub.a); 663 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) { 664 /* hub power always on; required for AMD-756 and some 665 * Mac platforms. ganged overcurrent reporting, if any. 666 */ 667 temp |= RH_A_NPS; 668 ohci_writel (ohci, temp, &ohci->regs->roothub.a); 669 } 670 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status); 671 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM, 672 &ohci->regs->roothub.b); 673 // flush those writes 674 (void) ohci_readl (ohci, &ohci->regs->control); 675 676 spin_unlock_irq (&ohci->lock); 677 678 // POTPGT delay is bits 24-31, in 2 ms units. 679 mdelay ((temp >> 23) & 0x1fe); 680 hcd->state = HC_STATE_RUNNING; 681 682 ohci_dump (ohci, 1); 683 684 return 0; 685 } 686 687 /*-------------------------------------------------------------------------*/ 688 689 /* an interrupt happens */ 690 691 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs) 692 { 693 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 694 struct ohci_regs __iomem *regs = ohci->regs; 695 int ints; 696 697 /* we can eliminate a (slow) ohci_readl() 698 if _only_ WDH caused this irq */ 699 if ((ohci->hcca->done_head != 0) 700 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head) 701 & 0x01)) { 702 ints = OHCI_INTR_WDH; 703 704 /* cardbus/... hardware gone before remove() */ 705 } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) { 706 disable (ohci); 707 ohci_dbg (ohci, "device removed!\n"); 708 return IRQ_HANDLED; 709 710 /* interrupt for some other device? */ 711 } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) { 712 return IRQ_NOTMINE; 713 } 714 715 if (ints & OHCI_INTR_UE) { 716 disable (ohci); 717 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); 718 // e.g. due to PCI Master/Target Abort 719 720 ohci_dump (ohci, 1); 721 ohci_usb_reset (ohci); 722 } 723 724 if (ints & OHCI_INTR_RD) { 725 ohci_vdbg (ohci, "resume detect\n"); 726 ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus); 727 if (hcd->state != HC_STATE_QUIESCING) 728 usb_hcd_resume_root_hub(hcd); 729 } 730 731 if (ints & OHCI_INTR_WDH) { 732 if (HC_IS_RUNNING(hcd->state)) 733 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable); 734 spin_lock (&ohci->lock); 735 dl_done_list (ohci, ptregs); 736 spin_unlock (&ohci->lock); 737 if (HC_IS_RUNNING(hcd->state)) 738 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable); 739 } 740 741 /* could track INTR_SO to reduce available PCI/... bandwidth */ 742 743 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled 744 * when there's still unlinking to be done (next frame). 745 */ 746 spin_lock (&ohci->lock); 747 if (ohci->ed_rm_list) 748 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs); 749 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list 750 && HC_IS_RUNNING(hcd->state)) 751 ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable); 752 spin_unlock (&ohci->lock); 753 754 if (HC_IS_RUNNING(hcd->state)) { 755 ohci_writel (ohci, ints, ®s->intrstatus); 756 ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable); 757 // flush those writes 758 (void) ohci_readl (ohci, &ohci->regs->control); 759 } 760 761 return IRQ_HANDLED; 762 } 763 764 /*-------------------------------------------------------------------------*/ 765 766 static void ohci_stop (struct usb_hcd *hcd) 767 { 768 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 769 770 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", 771 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), 772 hcd->state); 773 ohci_dump (ohci, 1); 774 775 flush_scheduled_work(); 776 777 ohci_usb_reset (ohci); 778 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 779 780 remove_debug_files (ohci); 781 unregister_reboot_notifier (&ohci->reboot_notifier); 782 ohci_mem_cleanup (ohci); 783 if (ohci->hcca) { 784 dma_free_coherent (hcd->self.controller, 785 sizeof *ohci->hcca, 786 ohci->hcca, ohci->hcca_dma); 787 ohci->hcca = NULL; 788 ohci->hcca_dma = 0; 789 } 790 } 791 792 /*-------------------------------------------------------------------------*/ 793 794 /* must not be called from interrupt context */ 795 796 #ifdef CONFIG_PM 797 798 static int ohci_restart (struct ohci_hcd *ohci) 799 { 800 int temp; 801 int i; 802 struct urb_priv *priv; 803 804 /* mark any devices gone, so they do nothing till khubd disconnects. 805 * recycle any "live" eds/tds (and urbs) right away. 806 * later, khubd disconnect processing will recycle the other state, 807 * (either as disconnect/reconnect, or maybe someday as a reset). 808 */ 809 spin_lock_irq(&ohci->lock); 810 disable (ohci); 811 usb_root_hub_lost_power(ohci_to_hcd(ohci)->self.root_hub); 812 if (!list_empty (&ohci->pending)) 813 ohci_dbg(ohci, "abort schedule...\n"); 814 list_for_each_entry (priv, &ohci->pending, pending) { 815 struct urb *urb = priv->td[0]->urb; 816 struct ed *ed = priv->ed; 817 818 switch (ed->state) { 819 case ED_OPER: 820 ed->state = ED_UNLINK; 821 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE); 822 ed_deschedule (ohci, ed); 823 824 ed->ed_next = ohci->ed_rm_list; 825 ed->ed_prev = NULL; 826 ohci->ed_rm_list = ed; 827 /* FALLTHROUGH */ 828 case ED_UNLINK: 829 break; 830 default: 831 ohci_dbg(ohci, "bogus ed %p state %d\n", 832 ed, ed->state); 833 } 834 835 spin_lock (&urb->lock); 836 urb->status = -ESHUTDOWN; 837 spin_unlock (&urb->lock); 838 } 839 finish_unlinks (ohci, 0, NULL); 840 spin_unlock_irq(&ohci->lock); 841 842 /* paranoia, in case that didn't work: */ 843 844 /* empty the interrupt branches */ 845 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; 846 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; 847 848 /* no EDs to remove */ 849 ohci->ed_rm_list = NULL; 850 851 /* empty control and bulk lists */ 852 ohci->ed_controltail = NULL; 853 ohci->ed_bulktail = NULL; 854 855 if ((temp = ohci_run (ohci)) < 0) { 856 ohci_err (ohci, "can't restart, %d\n", temp); 857 return temp; 858 } else { 859 /* here we "know" root ports should always stay powered, 860 * and that if we try to turn them back on the root hub 861 * will respond to CSC processing. 862 */ 863 i = ohci->num_ports; 864 while (i--) 865 ohci_writel (ohci, RH_PS_PSS, 866 &ohci->regs->roothub.portstatus [i]); 867 ohci_dbg (ohci, "restart complete\n"); 868 } 869 return 0; 870 } 871 #endif 872 873 /*-------------------------------------------------------------------------*/ 874 875 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC 876 877 MODULE_AUTHOR (DRIVER_AUTHOR); 878 MODULE_DESCRIPTION (DRIVER_INFO); 879 MODULE_LICENSE ("GPL"); 880 881 #ifdef CONFIG_PCI 882 #include "ohci-pci.c" 883 #endif 884 885 #ifdef CONFIG_SA1111 886 #include "ohci-sa1111.c" 887 #endif 888 889 #ifdef CONFIG_ARCH_S3C2410 890 #include "ohci-s3c2410.c" 891 #endif 892 893 #ifdef CONFIG_ARCH_OMAP 894 #include "ohci-omap.c" 895 #endif 896 897 #ifdef CONFIG_ARCH_LH7A404 898 #include "ohci-lh7a404.c" 899 #endif 900 901 #ifdef CONFIG_PXA27x 902 #include "ohci-pxa27x.c" 903 #endif 904 905 #ifdef CONFIG_SOC_AU1X00 906 #include "ohci-au1xxx.c" 907 #endif 908 909 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC 910 #include "ohci-ppc-soc.c" 911 #endif 912 913 #ifdef CONFIG_ARCH_AT91RM9200 914 #include "ohci-at91.c" 915 #endif 916 917 #if !(defined(CONFIG_PCI) \ 918 || defined(CONFIG_SA1111) \ 919 || defined(CONFIG_ARCH_S3C2410) \ 920 || defined(CONFIG_ARCH_OMAP) \ 921 || defined (CONFIG_ARCH_LH7A404) \ 922 || defined (CONFIG_PXA27x) \ 923 || defined (CONFIG_SOC_AU1X00) \ 924 || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ 925 || defined (CONFIG_ARCH_AT91RM9200) \ 926 ) 927 #error "missing bus glue for ohci-hcd" 928 #endif 929