1 /* 2 * OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net> 6 * 7 * [ Initialisation is based on Linus' ] 8 * [ uhci code and gregs ohci fragments ] 9 * [ (C) Copyright 1999 Linus Torvalds ] 10 * [ (C) Copyright 1999 Gregory P. Smith] 11 * 12 * 13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller 14 * interfaces (though some non-x86 Intel chips use it). It supports 15 * smarter hardware than UHCI. A download link for the spec available 16 * through the http://www.usb.org website. 17 * 18 * History: 19 * 20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer) 21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net) 22 * 2003/02/24 show registers in sysfs (Kevin Brosius) 23 * 24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and 25 * bandwidth accounting; if debugging, show schedules in driverfs 26 * 2002/07/19 fixes to management of ED and schedule state. 27 * 2002/06/09 SA-1111 support (Christopher Hoover) 28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info 29 * to fix urb unlink races caused by interrupt latency assumptions; 30 * minor ED field and function naming updates 31 * 2002/01/18 package as a patch for 2.5.3; this should match the 32 * 2.4.17 kernel modulo some bugs being fixed. 33 * 34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes 35 * from post-2.4.5 patches. 36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning 37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree 38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify; 39 * pbook pci quirks gone (please fix pbook pci sw!) (db) 40 * 41 * 2001/04/08 Identify version on module load (gb) 42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam); 43 pci_map_single (db) 44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db) 45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam) 46 * 47 * 2000/09/26 fixed races in removing the private portion of the urb 48 * 2000/09/07 disable bulk and control lists when unlinking the last 49 * endpoint descriptor in order to avoid unrecoverable errors on 50 * the Lucent chips. (rwc@sgi) 51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some 52 * urb unlink probs, indentation fixes 53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from 54 * device unplugs. 55 * 2000/06/28 use PCI hotplug framework, for better power management 56 * and for Cardbus support (David Brownell) 57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling 58 * when the controller loses power; handle UE; cleanup; ... 59 * 60 * v5.2 1999/12/07 URB 3rd preview, 61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi) 62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume 63 * i386: HUB, Keyboard, Mouse, Printer 64 * 65 * v4.3 1999/10/27 multiple HCs, bulk_request 66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes 67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl. 68 * v4.0 1999/08/18 69 * v3.0 1999/06/25 70 * v2.1 1999/05/09 code clean up 71 * v2.0 1999/05/04 72 * v1.0 1999/04/27 initial release 73 * 74 * This file is licenced under the GPL. 75 */ 76 77 #include <linux/config.h> 78 79 #ifdef CONFIG_USB_DEBUG 80 # define DEBUG 81 #else 82 # undef DEBUG 83 #endif 84 85 #include <linux/module.h> 86 #include <linux/moduleparam.h> 87 #include <linux/pci.h> 88 #include <linux/kernel.h> 89 #include <linux/delay.h> 90 #include <linux/ioport.h> 91 #include <linux/sched.h> 92 #include <linux/slab.h> 93 #include <linux/smp_lock.h> 94 #include <linux/errno.h> 95 #include <linux/init.h> 96 #include <linux/timer.h> 97 #include <linux/list.h> 98 #include <linux/usb.h> 99 #include <linux/usb_otg.h> 100 #include <linux/dma-mapping.h> 101 #include <linux/dmapool.h> 102 #include <linux/reboot.h> 103 104 #include <asm/io.h> 105 #include <asm/irq.h> 106 #include <asm/system.h> 107 #include <asm/unaligned.h> 108 #include <asm/byteorder.h> 109 110 #include "../core/hcd.h" 111 112 #define DRIVER_VERSION "2005 April 22" 113 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell" 114 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver" 115 116 /*-------------------------------------------------------------------------*/ 117 118 // #define OHCI_VERBOSE_DEBUG /* not always helpful */ 119 120 /* For initializing controller (mask in an HCFS mode too) */ 121 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR 122 #define OHCI_INTR_INIT \ 123 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH) 124 125 #ifdef __hppa__ 126 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */ 127 #define IR_DISABLE 128 #endif 129 130 #ifdef CONFIG_ARCH_OMAP 131 /* OMAP doesn't support IR (no SMM; not needed) */ 132 #define IR_DISABLE 133 #endif 134 135 /*-------------------------------------------------------------------------*/ 136 137 static const char hcd_name [] = "ohci_hcd"; 138 139 #include "ohci.h" 140 141 static void ohci_dump (struct ohci_hcd *ohci, int verbose); 142 static int ohci_init (struct ohci_hcd *ohci); 143 static void ohci_stop (struct usb_hcd *hcd); 144 static int ohci_reboot (struct notifier_block *, unsigned long , void *); 145 146 #include "ohci-hub.c" 147 #include "ohci-dbg.c" 148 #include "ohci-mem.c" 149 #include "ohci-q.c" 150 151 152 /* 153 * On architectures with edge-triggered interrupts we must never return 154 * IRQ_NONE. 155 */ 156 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */ 157 #define IRQ_NOTMINE IRQ_HANDLED 158 #else 159 #define IRQ_NOTMINE IRQ_NONE 160 #endif 161 162 163 /* Some boards misreport power switching/overcurrent */ 164 static int distrust_firmware = 1; 165 module_param (distrust_firmware, bool, 0); 166 MODULE_PARM_DESC (distrust_firmware, 167 "true to distrust firmware power/overcurrent setup"); 168 169 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */ 170 static int no_handshake = 0; 171 module_param (no_handshake, bool, 0); 172 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake"); 173 174 /*-------------------------------------------------------------------------*/ 175 176 /* 177 * queue up an urb for anything except the root hub 178 */ 179 static int ohci_urb_enqueue ( 180 struct usb_hcd *hcd, 181 struct usb_host_endpoint *ep, 182 struct urb *urb, 183 unsigned mem_flags 184 ) { 185 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 186 struct ed *ed; 187 urb_priv_t *urb_priv; 188 unsigned int pipe = urb->pipe; 189 int i, size = 0; 190 unsigned long flags; 191 int retval = 0; 192 193 #ifdef OHCI_VERBOSE_DEBUG 194 urb_print (urb, "SUB", usb_pipein (pipe)); 195 #endif 196 197 /* every endpoint has a ed, locate and maybe (re)initialize it */ 198 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval))) 199 return -ENOMEM; 200 201 /* for the private part of the URB we need the number of TDs (size) */ 202 switch (ed->type) { 203 case PIPE_CONTROL: 204 /* td_submit_urb() doesn't yet handle these */ 205 if (urb->transfer_buffer_length > 4096) 206 return -EMSGSIZE; 207 208 /* 1 TD for setup, 1 for ACK, plus ... */ 209 size = 2; 210 /* FALLTHROUGH */ 211 // case PIPE_INTERRUPT: 212 // case PIPE_BULK: 213 default: 214 /* one TD for every 4096 Bytes (can be upto 8K) */ 215 size += urb->transfer_buffer_length / 4096; 216 /* ... and for any remaining bytes ... */ 217 if ((urb->transfer_buffer_length % 4096) != 0) 218 size++; 219 /* ... and maybe a zero length packet to wrap it up */ 220 if (size == 0) 221 size++; 222 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0 223 && (urb->transfer_buffer_length 224 % usb_maxpacket (urb->dev, pipe, 225 usb_pipeout (pipe))) == 0) 226 size++; 227 break; 228 case PIPE_ISOCHRONOUS: /* number of packets from URB */ 229 size = urb->number_of_packets; 230 break; 231 } 232 233 /* allocate the private part of the URB */ 234 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *), 235 mem_flags); 236 if (!urb_priv) 237 return -ENOMEM; 238 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *)); 239 INIT_LIST_HEAD (&urb_priv->pending); 240 urb_priv->length = size; 241 urb_priv->ed = ed; 242 243 /* allocate the TDs (deferring hash chain updates) */ 244 for (i = 0; i < size; i++) { 245 urb_priv->td [i] = td_alloc (ohci, mem_flags); 246 if (!urb_priv->td [i]) { 247 urb_priv->length = i; 248 urb_free_priv (ohci, urb_priv); 249 return -ENOMEM; 250 } 251 } 252 253 spin_lock_irqsave (&ohci->lock, flags); 254 255 /* don't submit to a dead HC */ 256 if (!HC_IS_RUNNING(hcd->state)) { 257 retval = -ENODEV; 258 goto fail; 259 } 260 261 /* in case of unlink-during-submit */ 262 spin_lock (&urb->lock); 263 if (urb->status != -EINPROGRESS) { 264 spin_unlock (&urb->lock); 265 urb->hcpriv = urb_priv; 266 finish_urb (ohci, urb, NULL); 267 retval = 0; 268 goto fail; 269 } 270 271 /* schedule the ed if needed */ 272 if (ed->state == ED_IDLE) { 273 retval = ed_schedule (ohci, ed); 274 if (retval < 0) 275 goto fail0; 276 if (ed->type == PIPE_ISOCHRONOUS) { 277 u16 frame = ohci_frame_no(ohci); 278 279 /* delay a few frames before the first TD */ 280 frame += max_t (u16, 8, ed->interval); 281 frame &= ~(ed->interval - 1); 282 frame |= ed->branch; 283 urb->start_frame = frame; 284 285 /* yes, only URB_ISO_ASAP is supported, and 286 * urb->start_frame is never used as input. 287 */ 288 } 289 } else if (ed->type == PIPE_ISOCHRONOUS) 290 urb->start_frame = ed->last_iso + ed->interval; 291 292 /* fill the TDs and link them to the ed; and 293 * enable that part of the schedule, if needed 294 * and update count of queued periodic urbs 295 */ 296 urb->hcpriv = urb_priv; 297 td_submit_urb (ohci, urb); 298 299 fail0: 300 spin_unlock (&urb->lock); 301 fail: 302 if (retval) 303 urb_free_priv (ohci, urb_priv); 304 spin_unlock_irqrestore (&ohci->lock, flags); 305 return retval; 306 } 307 308 /* 309 * decouple the URB from the HC queues (TDs, urb_priv); it's 310 * already marked using urb->status. reporting is always done 311 * asynchronously, and we might be dealing with an urb that's 312 * partially transferred, or an ED with other urbs being unlinked. 313 */ 314 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb) 315 { 316 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 317 unsigned long flags; 318 319 #ifdef OHCI_VERBOSE_DEBUG 320 urb_print (urb, "UNLINK", 1); 321 #endif 322 323 spin_lock_irqsave (&ohci->lock, flags); 324 if (HC_IS_RUNNING(hcd->state)) { 325 urb_priv_t *urb_priv; 326 327 /* Unless an IRQ completed the unlink while it was being 328 * handed to us, flag it for unlink and giveback, and force 329 * some upcoming INTR_SF to call finish_unlinks() 330 */ 331 urb_priv = urb->hcpriv; 332 if (urb_priv) { 333 if (urb_priv->ed->state == ED_OPER) 334 start_ed_unlink (ohci, urb_priv->ed); 335 } 336 } else { 337 /* 338 * with HC dead, we won't respect hc queue pointers 339 * any more ... just clean up every urb's memory. 340 */ 341 if (urb->hcpriv) 342 finish_urb (ohci, urb, NULL); 343 } 344 spin_unlock_irqrestore (&ohci->lock, flags); 345 return 0; 346 } 347 348 /*-------------------------------------------------------------------------*/ 349 350 /* frees config/altsetting state for endpoints, 351 * including ED memory, dummy TD, and bulk/intr data toggle 352 */ 353 354 static void 355 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep) 356 { 357 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 358 unsigned long flags; 359 struct ed *ed = ep->hcpriv; 360 unsigned limit = 1000; 361 362 /* ASSERT: any requests/urbs are being unlinked */ 363 /* ASSERT: nobody can be submitting urbs for this any more */ 364 365 if (!ed) 366 return; 367 368 rescan: 369 spin_lock_irqsave (&ohci->lock, flags); 370 371 if (!HC_IS_RUNNING (hcd->state)) { 372 sanitize: 373 ed->state = ED_IDLE; 374 finish_unlinks (ohci, 0, NULL); 375 } 376 377 switch (ed->state) { 378 case ED_UNLINK: /* wait for hw to finish? */ 379 /* major IRQ delivery trouble loses INTR_SF too... */ 380 if (limit-- == 0) { 381 ohci_warn (ohci, "IRQ INTR_SF lossage\n"); 382 goto sanitize; 383 } 384 spin_unlock_irqrestore (&ohci->lock, flags); 385 schedule_timeout_uninterruptible(1); 386 goto rescan; 387 case ED_IDLE: /* fully unlinked */ 388 if (list_empty (&ed->td_list)) { 389 td_free (ohci, ed->dummy); 390 ed_free (ohci, ed); 391 break; 392 } 393 /* else FALL THROUGH */ 394 default: 395 /* caller was supposed to have unlinked any requests; 396 * that's not our job. can't recover; must leak ed. 397 */ 398 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n", 399 ed, ep->desc.bEndpointAddress, ed->state, 400 list_empty (&ed->td_list) ? "" : " (has tds)"); 401 td_free (ohci, ed->dummy); 402 break; 403 } 404 ep->hcpriv = NULL; 405 spin_unlock_irqrestore (&ohci->lock, flags); 406 return; 407 } 408 409 static int ohci_get_frame (struct usb_hcd *hcd) 410 { 411 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 412 413 return ohci_frame_no(ohci); 414 } 415 416 static void ohci_usb_reset (struct ohci_hcd *ohci) 417 { 418 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); 419 ohci->hc_control &= OHCI_CTRL_RWC; 420 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 421 } 422 423 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and 424 * other cases where the next software may expect clean state from the 425 * "firmware". this is bus-neutral, unlike shutdown() methods. 426 */ 427 static int 428 ohci_reboot (struct notifier_block *block, unsigned long code, void *null) 429 { 430 struct ohci_hcd *ohci; 431 432 ohci = container_of (block, struct ohci_hcd, reboot_notifier); 433 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 434 ohci_usb_reset (ohci); 435 /* flush the writes */ 436 (void) ohci_readl (ohci, &ohci->regs->control); 437 return 0; 438 } 439 440 /*-------------------------------------------------------------------------* 441 * HC functions 442 *-------------------------------------------------------------------------*/ 443 444 /* init memory, and kick BIOS/SMM off */ 445 446 static int ohci_init (struct ohci_hcd *ohci) 447 { 448 int ret; 449 450 disable (ohci); 451 ohci->regs = ohci_to_hcd(ohci)->regs; 452 ohci->next_statechange = jiffies; 453 454 #ifndef IR_DISABLE 455 /* SMM owns the HC? not for long! */ 456 if (!no_handshake && ohci_readl (ohci, 457 &ohci->regs->control) & OHCI_CTRL_IR) { 458 u32 temp; 459 460 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n"); 461 462 /* this timeout is arbitrary. we make it long, so systems 463 * depending on usb keyboards may be usable even if the 464 * BIOS/SMM code seems pretty broken. 465 */ 466 temp = 500; /* arbitrary: five seconds */ 467 468 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable); 469 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus); 470 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) { 471 msleep (10); 472 if (--temp == 0) { 473 ohci_err (ohci, "USB HC takeover failed!" 474 " (BIOS/SMM bug)\n"); 475 return -EBUSY; 476 } 477 } 478 ohci_usb_reset (ohci); 479 } 480 #endif 481 482 /* Disable HC interrupts */ 483 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 484 // flush the writes 485 (void) ohci_readl (ohci, &ohci->regs->control); 486 487 /* Read the number of ports unless overridden */ 488 if (ohci->num_ports == 0) 489 ohci->num_ports = roothub_a(ohci) & RH_A_NDP; 490 491 if (ohci->hcca) 492 return 0; 493 494 ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller, 495 sizeof *ohci->hcca, &ohci->hcca_dma, 0); 496 if (!ohci->hcca) 497 return -ENOMEM; 498 499 if ((ret = ohci_mem_init (ohci)) < 0) 500 ohci_stop (ohci_to_hcd(ohci)); 501 502 return ret; 503 504 } 505 506 /*-------------------------------------------------------------------------*/ 507 508 /* Start an OHCI controller, set the BUS operational 509 * resets USB and controller 510 * enable interrupts 511 */ 512 static int ohci_run (struct ohci_hcd *ohci) 513 { 514 u32 mask, temp; 515 int first = ohci->fminterval == 0; 516 517 disable (ohci); 518 519 /* boot firmware should have set this up (5.1.1.3.1) */ 520 if (first) { 521 522 temp = ohci_readl (ohci, &ohci->regs->fminterval); 523 ohci->fminterval = temp & 0x3fff; 524 if (ohci->fminterval != FI) 525 ohci_dbg (ohci, "fminterval delta %d\n", 526 ohci->fminterval - FI); 527 ohci->fminterval |= FSMP (ohci->fminterval) << 16; 528 /* also: power/overcurrent flags in roothub.a */ 529 } 530 531 /* Reset USB nearly "by the book". RemoteWakeupConnected 532 * saved if boot firmware (BIOS/SMM/...) told us it's connected 533 * (for OHCI integrated on mainboard, it normally is) 534 */ 535 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control); 536 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n", 537 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), 538 ohci->hc_control); 539 540 if (ohci->hc_control & OHCI_CTRL_RWC 541 && !(ohci->flags & OHCI_QUIRK_AMD756)) 542 ohci_to_hcd(ohci)->can_wakeup = 1; 543 544 switch (ohci->hc_control & OHCI_CTRL_HCFS) { 545 case OHCI_USB_OPER: 546 temp = 0; 547 break; 548 case OHCI_USB_SUSPEND: 549 case OHCI_USB_RESUME: 550 ohci->hc_control &= OHCI_CTRL_RWC; 551 ohci->hc_control |= OHCI_USB_RESUME; 552 temp = 10 /* msec wait */; 553 break; 554 // case OHCI_USB_RESET: 555 default: 556 ohci->hc_control &= OHCI_CTRL_RWC; 557 ohci->hc_control |= OHCI_USB_RESET; 558 temp = 50 /* msec wait */; 559 break; 560 } 561 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 562 // flush the writes 563 (void) ohci_readl (ohci, &ohci->regs->control); 564 msleep(temp); 565 temp = roothub_a (ohci); 566 if (!(temp & RH_A_NPS)) { 567 /* power down each port */ 568 for (temp = 0; temp < ohci->num_ports; temp++) 569 ohci_writel (ohci, RH_PS_LSDA, 570 &ohci->regs->roothub.portstatus [temp]); 571 } 572 // flush those writes 573 (void) ohci_readl (ohci, &ohci->regs->control); 574 memset (ohci->hcca, 0, sizeof (struct ohci_hcca)); 575 576 /* 2msec timelimit here means no irqs/preempt */ 577 spin_lock_irq (&ohci->lock); 578 579 retry: 580 /* HC Reset requires max 10 us delay */ 581 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus); 582 temp = 30; /* ... allow extra time */ 583 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) { 584 if (--temp == 0) { 585 spin_unlock_irq (&ohci->lock); 586 ohci_err (ohci, "USB HC reset timed out!\n"); 587 return -1; 588 } 589 udelay (1); 590 } 591 592 /* now we're in the SUSPEND state ... must go OPERATIONAL 593 * within 2msec else HC enters RESUME 594 * 595 * ... but some hardware won't init fmInterval "by the book" 596 * (SiS, OPTi ...), so reset again instead. SiS doesn't need 597 * this if we write fmInterval after we're OPERATIONAL. 598 * Unclear about ALi, ServerWorks, and others ... this could 599 * easily be a longstanding bug in chip init on Linux. 600 */ 601 if (ohci->flags & OHCI_QUIRK_INITRESET) { 602 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 603 // flush those writes 604 (void) ohci_readl (ohci, &ohci->regs->control); 605 } 606 607 /* Tell the controller where the control and bulk lists are 608 * The lists are empty now. */ 609 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead); 610 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead); 611 612 /* a reset clears this */ 613 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca); 614 615 periodic_reinit (ohci); 616 617 /* some OHCI implementations are finicky about how they init. 618 * bogus values here mean not even enumeration could work. 619 */ 620 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0 621 || !ohci_readl (ohci, &ohci->regs->periodicstart)) { 622 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) { 623 ohci->flags |= OHCI_QUIRK_INITRESET; 624 ohci_dbg (ohci, "enabling initreset quirk\n"); 625 goto retry; 626 } 627 spin_unlock_irq (&ohci->lock); 628 ohci_err (ohci, "init err (%08x %04x)\n", 629 ohci_readl (ohci, &ohci->regs->fminterval), 630 ohci_readl (ohci, &ohci->regs->periodicstart)); 631 return -EOVERFLOW; 632 } 633 634 /* start controller operations */ 635 ohci->hc_control &= OHCI_CTRL_RWC; 636 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER; 637 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control); 638 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; 639 640 /* wake on ConnectStatusChange, matching external hubs */ 641 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status); 642 643 /* Choose the interrupts we care about now, others later on demand */ 644 mask = OHCI_INTR_INIT; 645 ohci_writel (ohci, mask, &ohci->regs->intrstatus); 646 ohci_writel (ohci, mask, &ohci->regs->intrenable); 647 648 /* handle root hub init quirks ... */ 649 temp = roothub_a (ohci); 650 temp &= ~(RH_A_PSM | RH_A_OCPM); 651 if (ohci->flags & OHCI_QUIRK_SUPERIO) { 652 /* NSC 87560 and maybe others */ 653 temp |= RH_A_NOCP; 654 temp &= ~(RH_A_POTPGT | RH_A_NPS); 655 ohci_writel (ohci, temp, &ohci->regs->roothub.a); 656 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) { 657 /* hub power always on; required for AMD-756 and some 658 * Mac platforms. ganged overcurrent reporting, if any. 659 */ 660 temp |= RH_A_NPS; 661 ohci_writel (ohci, temp, &ohci->regs->roothub.a); 662 } 663 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status); 664 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM, 665 &ohci->regs->roothub.b); 666 // flush those writes 667 (void) ohci_readl (ohci, &ohci->regs->control); 668 669 spin_unlock_irq (&ohci->lock); 670 671 // POTPGT delay is bits 24-31, in 2 ms units. 672 mdelay ((temp >> 23) & 0x1fe); 673 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING; 674 675 ohci_dump (ohci, 1); 676 677 if (ohci_to_hcd(ohci)->self.root_hub == NULL) { 678 register_reboot_notifier (&ohci->reboot_notifier); 679 create_debug_files (ohci); 680 } 681 682 return 0; 683 } 684 685 /*-------------------------------------------------------------------------*/ 686 687 /* an interrupt happens */ 688 689 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs) 690 { 691 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 692 struct ohci_regs __iomem *regs = ohci->regs; 693 int ints; 694 695 /* we can eliminate a (slow) ohci_readl() 696 if _only_ WDH caused this irq */ 697 if ((ohci->hcca->done_head != 0) 698 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head) 699 & 0x01)) { 700 ints = OHCI_INTR_WDH; 701 702 /* cardbus/... hardware gone before remove() */ 703 } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) { 704 disable (ohci); 705 ohci_dbg (ohci, "device removed!\n"); 706 return IRQ_HANDLED; 707 708 /* interrupt for some other device? */ 709 } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) { 710 return IRQ_NOTMINE; 711 } 712 713 if (ints & OHCI_INTR_UE) { 714 disable (ohci); 715 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n"); 716 // e.g. due to PCI Master/Target Abort 717 718 ohci_dump (ohci, 1); 719 ohci_usb_reset (ohci); 720 } 721 722 if (ints & OHCI_INTR_RD) { 723 ohci_vdbg (ohci, "resume detect\n"); 724 ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus); 725 if (hcd->state != HC_STATE_QUIESCING) 726 schedule_work(&ohci->rh_resume); 727 } 728 729 if (ints & OHCI_INTR_WDH) { 730 if (HC_IS_RUNNING(hcd->state)) 731 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable); 732 spin_lock (&ohci->lock); 733 dl_done_list (ohci, ptregs); 734 spin_unlock (&ohci->lock); 735 if (HC_IS_RUNNING(hcd->state)) 736 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable); 737 } 738 739 /* could track INTR_SO to reduce available PCI/... bandwidth */ 740 741 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled 742 * when there's still unlinking to be done (next frame). 743 */ 744 spin_lock (&ohci->lock); 745 if (ohci->ed_rm_list) 746 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs); 747 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list 748 && HC_IS_RUNNING(hcd->state)) 749 ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable); 750 spin_unlock (&ohci->lock); 751 752 if (HC_IS_RUNNING(hcd->state)) { 753 ohci_writel (ohci, ints, ®s->intrstatus); 754 ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable); 755 // flush those writes 756 (void) ohci_readl (ohci, &ohci->regs->control); 757 } 758 759 return IRQ_HANDLED; 760 } 761 762 /*-------------------------------------------------------------------------*/ 763 764 static void ohci_stop (struct usb_hcd *hcd) 765 { 766 struct ohci_hcd *ohci = hcd_to_ohci (hcd); 767 768 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n", 769 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS), 770 hcd->state); 771 ohci_dump (ohci, 1); 772 773 flush_scheduled_work(); 774 775 ohci_usb_reset (ohci); 776 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable); 777 778 remove_debug_files (ohci); 779 unregister_reboot_notifier (&ohci->reboot_notifier); 780 ohci_mem_cleanup (ohci); 781 if (ohci->hcca) { 782 dma_free_coherent (hcd->self.controller, 783 sizeof *ohci->hcca, 784 ohci->hcca, ohci->hcca_dma); 785 ohci->hcca = NULL; 786 ohci->hcca_dma = 0; 787 } 788 } 789 790 /*-------------------------------------------------------------------------*/ 791 792 /* must not be called from interrupt context */ 793 794 #if defined(CONFIG_USB_SUSPEND) || defined(CONFIG_PM) 795 796 static int ohci_restart (struct ohci_hcd *ohci) 797 { 798 int temp; 799 int i; 800 struct urb_priv *priv; 801 struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub; 802 803 /* mark any devices gone, so they do nothing till khubd disconnects. 804 * recycle any "live" eds/tds (and urbs) right away. 805 * later, khubd disconnect processing will recycle the other state, 806 * (either as disconnect/reconnect, or maybe someday as a reset). 807 */ 808 spin_lock_irq(&ohci->lock); 809 disable (ohci); 810 for (i = 0; i < root->maxchild; i++) { 811 if (root->children [i]) 812 usb_set_device_state (root->children[i], 813 USB_STATE_NOTATTACHED); 814 } 815 if (!list_empty (&ohci->pending)) 816 ohci_dbg(ohci, "abort schedule...\n"); 817 list_for_each_entry (priv, &ohci->pending, pending) { 818 struct urb *urb = priv->td[0]->urb; 819 struct ed *ed = priv->ed; 820 821 switch (ed->state) { 822 case ED_OPER: 823 ed->state = ED_UNLINK; 824 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE); 825 ed_deschedule (ohci, ed); 826 827 ed->ed_next = ohci->ed_rm_list; 828 ed->ed_prev = NULL; 829 ohci->ed_rm_list = ed; 830 /* FALLTHROUGH */ 831 case ED_UNLINK: 832 break; 833 default: 834 ohci_dbg(ohci, "bogus ed %p state %d\n", 835 ed, ed->state); 836 } 837 838 spin_lock (&urb->lock); 839 urb->status = -ESHUTDOWN; 840 spin_unlock (&urb->lock); 841 } 842 finish_unlinks (ohci, 0, NULL); 843 spin_unlock_irq(&ohci->lock); 844 845 /* paranoia, in case that didn't work: */ 846 847 /* empty the interrupt branches */ 848 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0; 849 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0; 850 851 /* no EDs to remove */ 852 ohci->ed_rm_list = NULL; 853 854 /* empty control and bulk lists */ 855 ohci->ed_controltail = NULL; 856 ohci->ed_bulktail = NULL; 857 858 if ((temp = ohci_run (ohci)) < 0) { 859 ohci_err (ohci, "can't restart, %d\n", temp); 860 return temp; 861 } else { 862 /* here we "know" root ports should always stay powered, 863 * and that if we try to turn them back on the root hub 864 * will respond to CSC processing. 865 */ 866 i = ohci->num_ports; 867 while (i--) 868 ohci_writel (ohci, RH_PS_PSS, 869 &ohci->regs->roothub.portstatus [temp]); 870 ohci_dbg (ohci, "restart complete\n"); 871 } 872 return 0; 873 } 874 #endif 875 876 /*-------------------------------------------------------------------------*/ 877 878 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC 879 880 MODULE_AUTHOR (DRIVER_AUTHOR); 881 MODULE_DESCRIPTION (DRIVER_INFO); 882 MODULE_LICENSE ("GPL"); 883 884 #ifdef CONFIG_PCI 885 #include "ohci-pci.c" 886 #endif 887 888 #ifdef CONFIG_SA1111 889 #include "ohci-sa1111.c" 890 #endif 891 892 #ifdef CONFIG_ARCH_S3C2410 893 #include "ohci-s3c2410.c" 894 #endif 895 896 #ifdef CONFIG_ARCH_OMAP 897 #include "ohci-omap.c" 898 #endif 899 900 #ifdef CONFIG_ARCH_LH7A404 901 #include "ohci-lh7a404.c" 902 #endif 903 904 #ifdef CONFIG_PXA27x 905 #include "ohci-pxa27x.c" 906 #endif 907 908 #ifdef CONFIG_SOC_AU1X00 909 #include "ohci-au1xxx.c" 910 #endif 911 912 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC 913 #include "ohci-ppc-soc.c" 914 #endif 915 916 #if !(defined(CONFIG_PCI) \ 917 || defined(CONFIG_SA1111) \ 918 || defined(CONFIG_ARCH_S3C2410) \ 919 || defined(CONFIG_ARCH_OMAP) \ 920 || defined (CONFIG_ARCH_LH7A404) \ 921 || defined (CONFIG_PXA27x) \ 922 || defined (CONFIG_SOC_AU1X00) \ 923 || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \ 924 ) 925 #error "missing bus glue for ohci-hcd" 926 #endif 927