1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Freescale QUICC Engine USB Host Controller Driver 4 * 5 * Copyright (c) Freescale Semicondutor, Inc. 2006. 6 * Shlomi Gridish <gridish@freescale.com> 7 * Jerry Huang <Chang-Ming.Huang@freescale.com> 8 * Copyright (c) Logic Product Development, Inc. 2007 9 * Peter Barada <peterb@logicpd.com> 10 * Copyright (c) MontaVista Software, Inc. 2008. 11 * Anton Vorontsov <avorontsov@ru.mvista.com> 12 */ 13 14 #ifndef __FHCI_H 15 #define __FHCI_H 16 17 #include <linux/kernel.h> 18 #include <linux/types.h> 19 #include <linux/bug.h> 20 #include <linux/spinlock.h> 21 #include <linux/interrupt.h> 22 #include <linux/kfifo.h> 23 #include <linux/io.h> 24 #include <linux/usb.h> 25 #include <linux/usb/hcd.h> 26 #include <soc/fsl/qe/qe.h> 27 #include <soc/fsl/qe/immap_qe.h> 28 29 #define USB_CLOCK 48000000 30 31 #define FHCI_PRAM_SIZE 0x100 32 33 #define MAX_EDS 32 34 #define MAX_TDS 32 35 36 37 /* CRC16 field size */ 38 #define CRC_SIZE 2 39 40 /* USB protocol overhead for each frame transmitted from the host */ 41 #define PROTOCOL_OVERHEAD 7 42 43 /* Packet structure, info field */ 44 #define PKT_PID_DATA0 0x80000000 /* PID - Data toggle zero */ 45 #define PKT_PID_DATA1 0x40000000 /* PID - Data toggle one */ 46 #define PKT_PID_SETUP 0x20000000 /* PID - Setup bit */ 47 #define PKT_SETUP_STATUS 0x10000000 /* Setup status bit */ 48 #define PKT_SETADDR_STATUS 0x08000000 /* Set address status bit */ 49 #define PKT_SET_HOST_LAST 0x04000000 /* Last data packet */ 50 #define PKT_HOST_DATA 0x02000000 /* Data packet */ 51 #define PKT_FIRST_IN_FRAME 0x01000000 /* First packet in the frame */ 52 #define PKT_TOKEN_FRAME 0x00800000 /* Token packet */ 53 #define PKT_ZLP 0x00400000 /* Zero length packet */ 54 #define PKT_IN_TOKEN_FRAME 0x00200000 /* IN token packet */ 55 #define PKT_OUT_TOKEN_FRAME 0x00100000 /* OUT token packet */ 56 #define PKT_SETUP_TOKEN_FRAME 0x00080000 /* SETUP token packet */ 57 #define PKT_STALL_FRAME 0x00040000 /* STALL packet */ 58 #define PKT_NACK_FRAME 0x00020000 /* NACK packet */ 59 #define PKT_NO_PID 0x00010000 /* No PID */ 60 #define PKT_NO_CRC 0x00008000 /* don't append CRC */ 61 #define PKT_HOST_COMMAND 0x00004000 /* Host command packet */ 62 #define PKT_DUMMY_PACKET 0x00002000 /* Dummy packet, used for mmm */ 63 #define PKT_LOW_SPEED_PACKET 0x00001000 /* Low-Speed packet */ 64 65 #define TRANS_OK (0) 66 #define TRANS_INPROGRESS (-1) 67 #define TRANS_DISCARD (-2) 68 #define TRANS_FAIL (-3) 69 70 #define PS_INT 0 71 #define PS_DISCONNECTED 1 72 #define PS_CONNECTED 2 73 #define PS_READY 3 74 #define PS_MISSING 4 75 76 /* Transfer Descriptor status field */ 77 #define USB_TD_OK 0x00000000 /* TD transmited or received ok */ 78 #define USB_TD_INPROGRESS 0x80000000 /* TD is being transmitted */ 79 #define USB_TD_RX_ER_NONOCT 0x40000000 /* Tx Non Octet Aligned Packet */ 80 #define USB_TD_RX_ER_BITSTUFF 0x20000000 /* Frame Aborted-Received pkt */ 81 #define USB_TD_RX_ER_CRC 0x10000000 /* CRC error */ 82 #define USB_TD_RX_ER_OVERUN 0x08000000 /* Over - run occurred */ 83 #define USB_TD_RX_ER_PID 0x04000000 /* wrong PID received */ 84 #define USB_TD_RX_DATA_UNDERUN 0x02000000 /* shorter than expected */ 85 #define USB_TD_RX_DATA_OVERUN 0x01000000 /* longer than expected */ 86 #define USB_TD_TX_ER_NAK 0x00800000 /* NAK handshake */ 87 #define USB_TD_TX_ER_STALL 0x00400000 /* STALL handshake */ 88 #define USB_TD_TX_ER_TIMEOUT 0x00200000 /* transmit time out */ 89 #define USB_TD_TX_ER_UNDERUN 0x00100000 /* transmit underrun */ 90 91 #define USB_TD_ERROR (USB_TD_RX_ER_NONOCT | USB_TD_RX_ER_BITSTUFF | \ 92 USB_TD_RX_ER_CRC | USB_TD_RX_ER_OVERUN | USB_TD_RX_ER_PID | \ 93 USB_TD_RX_DATA_UNDERUN | USB_TD_RX_DATA_OVERUN | \ 94 USB_TD_TX_ER_NAK | USB_TD_TX_ER_STALL | \ 95 USB_TD_TX_ER_TIMEOUT | USB_TD_TX_ER_UNDERUN) 96 97 /* Transfer Descriptor toggle field */ 98 #define USB_TD_TOGGLE_DATA0 0 99 #define USB_TD_TOGGLE_DATA1 1 100 #define USB_TD_TOGGLE_CARRY 2 101 102 /* #define MULTI_DATA_BUS */ 103 104 /* Bus mode register RBMR/TBMR */ 105 #define BUS_MODE_GBL 0x20 /* Global snooping */ 106 #define BUS_MODE_BO 0x18 /* Byte ordering */ 107 #define BUS_MODE_BO_BE 0x10 /* Byte ordering - Big-endian */ 108 #define BUS_MODE_DTB 0x02 /* Data bus */ 109 110 /* FHCI QE USB Register Description */ 111 112 /* USB Mode Register bit define */ 113 #define USB_MODE_EN 0x01 114 #define USB_MODE_HOST 0x02 115 #define USB_MODE_TEST 0x04 116 #define USB_MODE_SFTE 0x08 117 #define USB_MODE_RESUME 0x40 118 #define USB_MODE_LSS 0x80 119 120 /* USB Slave Address Register Mask */ 121 #define USB_SLVADDR_MASK 0x7F 122 123 /* USB Endpoint register define */ 124 #define USB_EPNUM_MASK 0xF000 125 #define USB_EPNUM_SHIFT 12 126 127 #define USB_TRANS_MODE_SHIFT 8 128 #define USB_TRANS_CTR 0x0000 129 #define USB_TRANS_INT 0x0100 130 #define USB_TRANS_BULK 0x0200 131 #define USB_TRANS_ISO 0x0300 132 133 #define USB_EP_MF 0x0020 134 #define USB_EP_RTE 0x0010 135 136 #define USB_THS_SHIFT 2 137 #define USB_THS_MASK 0x000c 138 #define USB_THS_NORMAL 0x0 139 #define USB_THS_IGNORE_IN 0x0004 140 #define USB_THS_NACK 0x0008 141 #define USB_THS_STALL 0x000c 142 143 #define USB_RHS_SHIFT 0 144 #define USB_RHS_MASK 0x0003 145 #define USB_RHS_NORMAL 0x0 146 #define USB_RHS_IGNORE_OUT 0x0001 147 #define USB_RHS_NACK 0x0002 148 #define USB_RHS_STALL 0x0003 149 150 #define USB_RTHS_MASK 0x000f 151 152 /* USB Command Register define */ 153 #define USB_CMD_STR_FIFO 0x80 154 #define USB_CMD_FLUSH_FIFO 0x40 155 #define USB_CMD_ISFT 0x20 156 #define USB_CMD_DSFT 0x10 157 #define USB_CMD_EP_MASK 0x03 158 159 /* USB Event and Mask Register define */ 160 #define USB_E_MSF_MASK 0x0800 161 #define USB_E_SFT_MASK 0x0400 162 #define USB_E_RESET_MASK 0x0200 163 #define USB_E_IDLE_MASK 0x0100 164 #define USB_E_TXE4_MASK 0x0080 165 #define USB_E_TXE3_MASK 0x0040 166 #define USB_E_TXE2_MASK 0x0020 167 #define USB_E_TXE1_MASK 0x0010 168 #define USB_E_SOF_MASK 0x0008 169 #define USB_E_BSY_MASK 0x0004 170 #define USB_E_TXB_MASK 0x0002 171 #define USB_E_RXB_MASK 0x0001 172 173 /* Freescale USB HOST */ 174 struct fhci_pram { 175 __be16 ep_ptr[4]; /* Endpoint porter reg */ 176 __be32 rx_state; /* Rx internal state */ 177 __be32 rx_ptr; /* Rx internal data pointer */ 178 __be16 frame_num; /* Frame number */ 179 __be16 rx_cnt; /* Rx byte count */ 180 __be32 rx_temp; /* Rx temp */ 181 __be32 rx_data_temp; /* Rx data temp */ 182 __be16 rx_u_ptr; /* Rx microcode return address temp */ 183 u8 reserved1[2]; /* reserved area */ 184 __be32 sof_tbl; /* SOF lookup table pointer */ 185 u8 sof_u_crc_temp; /* SOF micorcode CRC5 temp reg */ 186 u8 reserved2[0xdb]; 187 }; 188 189 /* Freescale USB Endpoint*/ 190 struct fhci_ep_pram { 191 __be16 rx_base; /* Rx BD base address */ 192 __be16 tx_base; /* Tx BD base address */ 193 u8 rx_func_code; /* Rx function code */ 194 u8 tx_func_code; /* Tx function code */ 195 __be16 rx_buff_len; /* Rx buffer length */ 196 __be16 rx_bd_ptr; /* Rx BD pointer */ 197 __be16 tx_bd_ptr; /* Tx BD pointer */ 198 __be32 tx_state; /* Tx internal state */ 199 __be32 tx_ptr; /* Tx internal data pointer */ 200 __be16 tx_crc; /* temp transmit CRC */ 201 __be16 tx_cnt; /* Tx byte count */ 202 __be32 tx_temp; /* Tx temp */ 203 __be16 tx_u_ptr; /* Tx microcode return address temp */ 204 __be16 reserved; 205 }; 206 207 struct fhci_controller_list { 208 struct list_head ctrl_list; /* control endpoints */ 209 struct list_head bulk_list; /* bulk endpoints */ 210 struct list_head iso_list; /* isochronous endpoints */ 211 struct list_head intr_list; /* interruput endpoints */ 212 struct list_head done_list; /* done transfers */ 213 }; 214 215 struct virtual_root_hub { 216 int dev_num; /* USB address of the root hub */ 217 u32 feature; /* indicates what feature has been set */ 218 struct usb_hub_status hub; 219 struct usb_port_status port; 220 }; 221 222 enum fhci_gpios { 223 GPIO_USBOE = 0, 224 GPIO_USBTP, 225 GPIO_USBTN, 226 GPIO_USBRP, 227 GPIO_USBRN, 228 /* these are optional */ 229 GPIO_SPEED, 230 GPIO_POWER, 231 NUM_GPIOS, 232 }; 233 234 enum fhci_pins { 235 PIN_USBOE = 0, 236 PIN_USBTP, 237 PIN_USBTN, 238 NUM_PINS, 239 }; 240 241 struct fhci_hcd { 242 enum qe_clock fullspeed_clk; 243 enum qe_clock lowspeed_clk; 244 struct qe_pin *pins[NUM_PINS]; 245 int gpios[NUM_GPIOS]; 246 bool alow_gpios[NUM_GPIOS]; 247 248 struct qe_usb_ctlr __iomem *regs; /* I/O memory used to communicate */ 249 struct fhci_pram __iomem *pram; /* Parameter RAM */ 250 struct gtm_timer *timer; 251 252 spinlock_t lock; 253 struct fhci_usb *usb_lld; /* Low-level driver */ 254 struct virtual_root_hub *vroot_hub; /* the virtual root hub */ 255 int active_urbs; 256 struct fhci_controller_list *hc_list; 257 struct tasklet_struct *process_done_task; /* tasklet for done list */ 258 259 struct list_head empty_eds; 260 struct list_head empty_tds; 261 262 #ifdef CONFIG_FHCI_DEBUG 263 int usb_irq_stat[13]; 264 struct dentry *dfs_root; 265 #endif 266 }; 267 268 #define USB_FRAME_USAGE 90 269 #define FRAME_TIME_USAGE (USB_FRAME_USAGE*10) /* frame time usage */ 270 #define SW_FIX_TIME_BETWEEN_TRANSACTION 150 /* SW */ 271 #define MAX_BYTES_PER_FRAME (USB_FRAME_USAGE*15) 272 #define MAX_PERIODIC_FRAME_USAGE 90 273 274 /* transaction type */ 275 enum fhci_ta_type { 276 FHCI_TA_IN = 0, /* input transaction */ 277 FHCI_TA_OUT, /* output transaction */ 278 FHCI_TA_SETUP, /* setup transaction */ 279 }; 280 281 /* transfer mode */ 282 enum fhci_tf_mode { 283 FHCI_TF_CTRL = 0, 284 FHCI_TF_ISO, 285 FHCI_TF_BULK, 286 FHCI_TF_INTR, 287 }; 288 289 enum fhci_speed { 290 FHCI_FULL_SPEED, 291 FHCI_LOW_SPEED, 292 }; 293 294 /* endpoint state */ 295 enum fhci_ed_state { 296 FHCI_ED_NEW = 0, /* pipe is new */ 297 FHCI_ED_OPER, /* pipe is operating */ 298 FHCI_ED_URB_DEL, /* pipe is in hold because urb is being deleted */ 299 FHCI_ED_SKIP, /* skip this pipe */ 300 FHCI_ED_HALTED, /* pipe is halted */ 301 }; 302 303 enum fhci_port_status { 304 FHCI_PORT_POWER_OFF = 0, 305 FHCI_PORT_DISABLED, 306 FHCI_PORT_DISCONNECTING, 307 FHCI_PORT_WAITING, /* waiting for connection */ 308 FHCI_PORT_FULL, /* full speed connected */ 309 FHCI_PORT_LOW, /* low speed connected */ 310 }; 311 312 enum fhci_mem_alloc { 313 MEM_CACHABLE_SYS = 0x00000001, /* primary DDR,cachable */ 314 MEM_NOCACHE_SYS = 0x00000004, /* primary DDR,non-cachable */ 315 MEM_SECONDARY = 0x00000002, /* either secondary DDR or SDRAM */ 316 MEM_PRAM = 0x00000008, /* multi-user RAM identifier */ 317 }; 318 319 /* USB default parameters*/ 320 #define DEFAULT_RING_LEN 8 321 #define DEFAULT_DATA_MEM MEM_CACHABLE_SYS 322 323 struct ed { 324 u8 dev_addr; /* device address */ 325 u8 ep_addr; /* endpoint address */ 326 enum fhci_tf_mode mode; /* USB transfer mode */ 327 enum fhci_speed speed; 328 unsigned int max_pkt_size; 329 enum fhci_ed_state state; 330 struct list_head td_list; /* a list of all queued TD to this pipe */ 331 struct list_head node; 332 333 /* read only parameters, should be cleared upon initialization */ 334 u8 toggle_carry; /* toggle carry from the last TD submitted */ 335 u16 next_iso; /* time stamp of next queued ISO transfer */ 336 struct td *td_head; /* a pointer to the current TD handled */ 337 }; 338 339 struct td { 340 void *data; /* a pointer to the data buffer */ 341 unsigned int len; /* length of the data to be submitted */ 342 unsigned int actual_len; /* actual bytes transferred on this td */ 343 enum fhci_ta_type type; /* transaction type */ 344 u8 toggle; /* toggle for next trans. within this TD */ 345 u16 iso_index; /* ISO transaction index */ 346 u16 start_frame; /* start frame time stamp */ 347 u16 interval; /* interval between trans. (for ISO/Intr) */ 348 u32 status; /* status of the TD */ 349 struct ed *ed; /* a handle to the corresponding ED */ 350 struct urb *urb; /* a handle to the corresponding URB */ 351 bool ioc; /* Inform On Completion */ 352 struct list_head node; 353 354 /* read only parameters should be cleared upon initialization */ 355 struct packet *pkt; 356 int nak_cnt; 357 int error_cnt; 358 struct list_head frame_lh; 359 }; 360 361 struct packet { 362 u8 *data; /* packet data */ 363 u32 len; /* packet length */ 364 u32 status; /* status of the packet - equivalent to the status 365 * field for the corresponding structure td */ 366 u32 info; /* packet information */ 367 void __iomem *priv_data; /* private data of the driver (TDs or BDs) */ 368 }; 369 370 /* struct for each URB */ 371 #define URB_INPROGRESS 0 372 #define URB_DEL 1 373 374 /* URB states (state field) */ 375 #define US_BULK 0 376 #define US_BULK0 1 377 378 /* three setup states */ 379 #define US_CTRL_SETUP 2 380 #define US_CTRL_DATA 1 381 #define US_CTRL_ACK 0 382 383 #define EP_ZERO 0 384 385 struct urb_priv { 386 int num_of_tds; 387 int tds_cnt; 388 int state; 389 390 struct td **tds; 391 struct ed *ed; 392 struct timer_list time_out; 393 }; 394 395 struct endpoint { 396 /* Pointer to ep parameter RAM */ 397 struct fhci_ep_pram __iomem *ep_pram_ptr; 398 399 /* Host transactions */ 400 struct usb_td __iomem *td_base; /* first TD in the ring */ 401 struct usb_td __iomem *conf_td; /* next TD for confirm after transac */ 402 struct usb_td __iomem *empty_td;/* next TD for new transaction req. */ 403 struct kfifo empty_frame_Q; /* Empty frames list to use */ 404 struct kfifo conf_frame_Q; /* frames passed to TDs,waiting for tx */ 405 struct kfifo dummy_packets_Q;/* dummy packets for the CRC overun */ 406 407 bool already_pushed_dummy_bd; 408 }; 409 410 /* struct for each 1mSec frame time */ 411 #define FRAME_IS_TRANSMITTED 0x00 412 #define FRAME_TIMER_END_TRANSMISSION 0x01 413 #define FRAME_DATA_END_TRANSMISSION 0x02 414 #define FRAME_END_TRANSMISSION 0x03 415 #define FRAME_IS_PREPARED 0x04 416 417 struct fhci_time_frame { 418 u16 frame_num; /* frame number */ 419 u16 total_bytes; /* total bytes submitted within this frame */ 420 u8 frame_status; /* flag that indicates to stop fill this frame */ 421 struct list_head tds_list; /* all tds of this frame */ 422 }; 423 424 /* internal driver structure*/ 425 struct fhci_usb { 426 u16 saved_msk; /* saving of the USB mask register */ 427 struct endpoint *ep0; /* pointer for endpoint0 structure */ 428 int intr_nesting_cnt; /* interrupt nesting counter */ 429 u16 max_frame_usage; /* max frame time usage,in micro-sec */ 430 u16 max_bytes_per_frame; /* max byte can be tx in one time frame */ 431 u32 sw_transaction_time; /* sw complete trans time,in micro-sec */ 432 struct fhci_time_frame *actual_frame; 433 struct fhci_controller_list *hc_list; /* main structure for hc */ 434 struct virtual_root_hub *vroot_hub; 435 enum fhci_port_status port_status; /* v_rh port status */ 436 437 u32 (*transfer_confirm)(struct fhci_hcd *fhci); 438 439 struct fhci_hcd *fhci; 440 }; 441 442 /* 443 * Various helpers and prototypes below. 444 */ 445 446 static inline u16 get_frame_num(struct fhci_hcd *fhci) 447 { 448 return in_be16(&fhci->pram->frame_num) & 0x07ff; 449 } 450 451 #define fhci_dbg(fhci, fmt, args...) \ 452 dev_dbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args) 453 #define fhci_vdbg(fhci, fmt, args...) \ 454 dev_vdbg(fhci_to_hcd(fhci)->self.controller, fmt, ##args) 455 #define fhci_err(fhci, fmt, args...) \ 456 dev_err(fhci_to_hcd(fhci)->self.controller, fmt, ##args) 457 #define fhci_info(fhci, fmt, args...) \ 458 dev_info(fhci_to_hcd(fhci)->self.controller, fmt, ##args) 459 #define fhci_warn(fhci, fmt, args...) \ 460 dev_warn(fhci_to_hcd(fhci)->self.controller, fmt, ##args) 461 462 static inline struct fhci_hcd *hcd_to_fhci(struct usb_hcd *hcd) 463 { 464 return (struct fhci_hcd *)hcd->hcd_priv; 465 } 466 467 static inline struct usb_hcd *fhci_to_hcd(struct fhci_hcd *fhci) 468 { 469 return container_of((void *)fhci, struct usb_hcd, hcd_priv); 470 } 471 472 /* fifo of pointers */ 473 static inline int cq_new(struct kfifo *fifo, int size) 474 { 475 return kfifo_alloc(fifo, size * sizeof(void *), GFP_KERNEL); 476 } 477 478 static inline void cq_delete(struct kfifo *kfifo) 479 { 480 kfifo_free(kfifo); 481 } 482 483 static inline unsigned int cq_howmany(struct kfifo *kfifo) 484 { 485 return kfifo_len(kfifo) / sizeof(void *); 486 } 487 488 static inline int cq_put(struct kfifo *kfifo, void *p) 489 { 490 return kfifo_in(kfifo, (void *)&p, sizeof(p)); 491 } 492 493 static inline void *cq_get(struct kfifo *kfifo) 494 { 495 unsigned int sz; 496 void *p; 497 498 sz = kfifo_out(kfifo, (void *)&p, sizeof(p)); 499 if (sz != sizeof(p)) 500 return NULL; 501 502 return p; 503 } 504 505 /* fhci-hcd.c */ 506 void fhci_start_sof_timer(struct fhci_hcd *fhci); 507 void fhci_stop_sof_timer(struct fhci_hcd *fhci); 508 u16 fhci_get_sof_timer_count(struct fhci_usb *usb); 509 void fhci_usb_enable_interrupt(struct fhci_usb *usb); 510 void fhci_usb_disable_interrupt(struct fhci_usb *usb); 511 int fhci_ioports_check_bus_state(struct fhci_hcd *fhci); 512 513 /* fhci-mem.c */ 514 void fhci_recycle_empty_td(struct fhci_hcd *fhci, struct td *td); 515 void fhci_recycle_empty_ed(struct fhci_hcd *fhci, struct ed *ed); 516 struct ed *fhci_get_empty_ed(struct fhci_hcd *fhci); 517 struct td *fhci_td_fill(struct fhci_hcd *fhci, struct urb *urb, 518 struct urb_priv *urb_priv, struct ed *ed, u16 index, 519 enum fhci_ta_type type, int toggle, u8 *data, u32 len, 520 u16 interval, u16 start_frame, bool ioc); 521 void fhci_add_tds_to_ed(struct ed *ed, struct td **td_list, int number); 522 523 /* fhci-hub.c */ 524 void fhci_config_transceiver(struct fhci_hcd *fhci, 525 enum fhci_port_status status); 526 void fhci_port_disable(struct fhci_hcd *fhci); 527 void fhci_port_enable(void *lld); 528 void fhci_io_port_generate_reset(struct fhci_hcd *fhci); 529 void fhci_port_reset(void *lld); 530 int fhci_hub_status_data(struct usb_hcd *hcd, char *buf); 531 int fhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 532 u16 wIndex, char *buf, u16 wLength); 533 534 /* fhci-tds.c */ 535 void fhci_flush_bds(struct fhci_usb *usb); 536 void fhci_flush_actual_frame(struct fhci_usb *usb); 537 u32 fhci_host_transaction(struct fhci_usb *usb, struct packet *pkt, 538 enum fhci_ta_type trans_type, u8 dest_addr, 539 u8 dest_ep, enum fhci_tf_mode trans_mode, 540 enum fhci_speed dest_speed, u8 data_toggle); 541 void fhci_host_transmit_actual_frame(struct fhci_usb *usb); 542 void fhci_tx_conf_interrupt(struct fhci_usb *usb); 543 void fhci_push_dummy_bd(struct endpoint *ep); 544 u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem, 545 u32 ring_len); 546 void fhci_init_ep_registers(struct fhci_usb *usb, 547 struct endpoint *ep, 548 enum fhci_mem_alloc data_mem); 549 void fhci_ep0_free(struct fhci_usb *usb); 550 551 /* fhci-sched.c */ 552 extern struct tasklet_struct fhci_tasklet; 553 void fhci_transaction_confirm(struct fhci_usb *usb, struct packet *pkt); 554 void fhci_flush_all_transmissions(struct fhci_usb *usb); 555 void fhci_schedule_transactions(struct fhci_usb *usb); 556 void fhci_device_connected_interrupt(struct fhci_hcd *fhci); 557 void fhci_device_disconnected_interrupt(struct fhci_hcd *fhci); 558 void fhci_queue_urb(struct fhci_hcd *fhci, struct urb *urb); 559 u32 fhci_transfer_confirm_callback(struct fhci_hcd *fhci); 560 irqreturn_t fhci_irq(struct usb_hcd *hcd); 561 irqreturn_t fhci_frame_limit_timer_irq(int irq, void *_hcd); 562 563 /* fhci-q.h */ 564 void fhci_urb_complete_free(struct fhci_hcd *fhci, struct urb *urb); 565 struct td *fhci_remove_td_from_ed(struct ed *ed); 566 struct td *fhci_remove_td_from_frame(struct fhci_time_frame *frame); 567 void fhci_move_td_from_ed_to_done_list(struct fhci_usb *usb, struct ed *ed); 568 struct td *fhci_peek_td_from_frame(struct fhci_time_frame *frame); 569 void fhci_add_td_to_frame(struct fhci_time_frame *frame, struct td *td); 570 struct td *fhci_remove_td_from_done_list(struct fhci_controller_list *p_list); 571 void fhci_done_td(struct urb *urb, struct td *td); 572 void fhci_del_ed_list(struct fhci_hcd *fhci, struct ed *ed); 573 574 #ifdef CONFIG_FHCI_DEBUG 575 576 void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er); 577 void fhci_dfs_destroy(struct fhci_hcd *fhci); 578 void fhci_dfs_create(struct fhci_hcd *fhci); 579 580 #else 581 582 static inline void fhci_dbg_isr(struct fhci_hcd *fhci, int usb_er) {} 583 static inline void fhci_dfs_destroy(struct fhci_hcd *fhci) {} 584 static inline void fhci_dfs_create(struct fhci_hcd *fhci) {} 585 586 #endif /* CONFIG_FHCI_DEBUG */ 587 588 #endif /* __FHCI_H */ 589