xref: /linux/drivers/usb/host/ehci-fsl.c (revision 26b0d14106954ae46d2f4f7eec3481828a210f7d)
1 /*
2  * Copyright 2005-2009 MontaVista Software, Inc.
3  * Copyright 2008,2012      Freescale Semiconductor, Inc.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License as published by the
7  * Free Software Foundation; either version 2 of the License, or (at your
8  * option) any later version.
9  *
10  * This program is distributed in the hope that it will be useful, but
11  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
12  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * for more details.
14  *
15  * You should have received a copy of the GNU General Public License
16  * along with this program; if not, write to the Free Software Foundation,
17  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18  *
19  * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided
20  * by Hunter Wu.
21  * Power Management support by Dave Liu <daveliu@freescale.com>,
22  * Jerry Huang <Chang-Ming.Huang@freescale.com> and
23  * Anton Vorontsov <avorontsov@ru.mvista.com>.
24  */
25 
26 #include <linux/kernel.h>
27 #include <linux/types.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/platform_device.h>
31 #include <linux/fsl_devices.h>
32 
33 #include "ehci-fsl.h"
34 
35 /* configure so an HC device and id are always provided */
36 /* always called with process context; sleeping is OK */
37 
38 /**
39  * usb_hcd_fsl_probe - initialize FSL-based HCDs
40  * @drvier: Driver to be used for this HCD
41  * @pdev: USB Host Controller being probed
42  * Context: !in_interrupt()
43  *
44  * Allocates basic resources for this USB host controller.
45  *
46  */
47 static int usb_hcd_fsl_probe(const struct hc_driver *driver,
48 			     struct platform_device *pdev)
49 {
50 	struct fsl_usb2_platform_data *pdata;
51 	struct usb_hcd *hcd;
52 	struct resource *res;
53 	int irq;
54 	int retval;
55 
56 	pr_debug("initializing FSL-SOC USB Controller\n");
57 
58 	/* Need platform data for setup */
59 	pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data;
60 	if (!pdata) {
61 		dev_err(&pdev->dev,
62 			"No platform data for %s.\n", dev_name(&pdev->dev));
63 		return -ENODEV;
64 	}
65 
66 	/*
67 	 * This is a host mode driver, verify that we're supposed to be
68 	 * in host mode.
69 	 */
70 	if (!((pdata->operating_mode == FSL_USB2_DR_HOST) ||
71 	      (pdata->operating_mode == FSL_USB2_MPH_HOST) ||
72 	      (pdata->operating_mode == FSL_USB2_DR_OTG))) {
73 		dev_err(&pdev->dev,
74 			"Non Host Mode configured for %s. Wrong driver linked.\n",
75 			dev_name(&pdev->dev));
76 		return -ENODEV;
77 	}
78 
79 	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
80 	if (!res) {
81 		dev_err(&pdev->dev,
82 			"Found HC with no IRQ. Check %s setup!\n",
83 			dev_name(&pdev->dev));
84 		return -ENODEV;
85 	}
86 	irq = res->start;
87 
88 	hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
89 	if (!hcd) {
90 		retval = -ENOMEM;
91 		goto err1;
92 	}
93 
94 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
95 	if (!res) {
96 		dev_err(&pdev->dev,
97 			"Found HC with no register addr. Check %s setup!\n",
98 			dev_name(&pdev->dev));
99 		retval = -ENODEV;
100 		goto err2;
101 	}
102 	hcd->rsrc_start = res->start;
103 	hcd->rsrc_len = resource_size(res);
104 	if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len,
105 				driver->description)) {
106 		dev_dbg(&pdev->dev, "controller already in use\n");
107 		retval = -EBUSY;
108 		goto err2;
109 	}
110 	hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
111 
112 	if (hcd->regs == NULL) {
113 		dev_dbg(&pdev->dev, "error mapping memory\n");
114 		retval = -EFAULT;
115 		goto err3;
116 	}
117 
118 	pdata->regs = hcd->regs;
119 
120 	if (pdata->power_budget)
121 		hcd->power_budget = pdata->power_budget;
122 
123 	/*
124 	 * do platform specific init: check the clock, grab/config pins, etc.
125 	 */
126 	if (pdata->init && pdata->init(pdev)) {
127 		retval = -ENODEV;
128 		goto err4;
129 	}
130 
131 	/* Enable USB controller, 83xx or 8536 */
132 	if (pdata->have_sysif_regs)
133 		setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4);
134 
135 	/* Don't need to set host mode here. It will be done by tdi_reset() */
136 
137 	retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
138 	if (retval != 0)
139 		goto err4;
140 
141 #ifdef CONFIG_USB_OTG
142 	if (pdata->operating_mode == FSL_USB2_DR_OTG) {
143 		struct ehci_hcd *ehci = hcd_to_ehci(hcd);
144 
145 		ehci->transceiver = usb_get_transceiver();
146 		dev_dbg(&pdev->dev, "hcd=0x%p  ehci=0x%p, transceiver=0x%p\n",
147 			hcd, ehci, ehci->transceiver);
148 
149 		if (ehci->transceiver) {
150 			retval = otg_set_host(ehci->transceiver->otg,
151 					      &ehci_to_hcd(ehci)->self);
152 			if (retval) {
153 				usb_put_transceiver(ehci->transceiver);
154 				goto err4;
155 			}
156 		} else {
157 			dev_err(&pdev->dev, "can't find transceiver\n");
158 			retval = -ENODEV;
159 			goto err4;
160 		}
161 	}
162 #endif
163 	return retval;
164 
165       err4:
166 	iounmap(hcd->regs);
167       err3:
168 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
169       err2:
170 	usb_put_hcd(hcd);
171       err1:
172 	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval);
173 	if (pdata->exit)
174 		pdata->exit(pdev);
175 	return retval;
176 }
177 
178 /* may be called without controller electrically present */
179 /* may be called with controller, bus, and devices active */
180 
181 /**
182  * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs
183  * @dev: USB Host Controller being removed
184  * Context: !in_interrupt()
185  *
186  * Reverses the effect of usb_hcd_fsl_probe().
187  *
188  */
189 static void usb_hcd_fsl_remove(struct usb_hcd *hcd,
190 			       struct platform_device *pdev)
191 {
192 	struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
193 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
194 
195 	if (ehci->transceiver) {
196 		otg_set_host(ehci->transceiver->otg, NULL);
197 		usb_put_transceiver(ehci->transceiver);
198 	}
199 
200 	usb_remove_hcd(hcd);
201 
202 	/*
203 	 * do platform specific un-initialization:
204 	 * release iomux pins, disable clock, etc.
205 	 */
206 	if (pdata->exit)
207 		pdata->exit(pdev);
208 	iounmap(hcd->regs);
209 	release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
210 	usb_put_hcd(hcd);
211 }
212 
213 static void ehci_fsl_setup_phy(struct usb_hcd *hcd,
214 			       enum fsl_usb2_phy_modes phy_mode,
215 			       unsigned int port_offset)
216 {
217 	u32 portsc, temp;
218 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
219 	void __iomem *non_ehci = hcd->regs;
220 	struct device *dev = hcd->self.controller;
221 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
222 
223 	if (pdata->controller_ver < 0) {
224 		dev_warn(hcd->self.controller, "Could not get controller version\n");
225 		return;
226 	}
227 
228 	portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]);
229 	portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW);
230 
231 	switch (phy_mode) {
232 	case FSL_USB2_PHY_ULPI:
233 		if (pdata->controller_ver) {
234 			/* controller version 1.6 or above */
235 			temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
236 			out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
237 				USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL);
238 		}
239 		portsc |= PORT_PTS_ULPI;
240 		break;
241 	case FSL_USB2_PHY_SERIAL:
242 		portsc |= PORT_PTS_SERIAL;
243 		break;
244 	case FSL_USB2_PHY_UTMI_WIDE:
245 		portsc |= PORT_PTS_PTW;
246 		/* fall through */
247 	case FSL_USB2_PHY_UTMI:
248 		if (pdata->controller_ver) {
249 			/* controller version 1.6 or above */
250 			temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
251 			out_be32(non_ehci + FSL_SOC_USB_CTRL, temp |
252 				UTMI_PHY_EN | USB_CTRL_USB_EN);
253 			mdelay(FSL_UTMI_PHY_DLY);  /* Delay for UTMI PHY CLK to
254 						become stable - 10ms*/
255 		}
256 		/* enable UTMI PHY */
257 		if (pdata->have_sysif_regs)
258 			setbits32(non_ehci + FSL_SOC_USB_CTRL,
259 				  CTRL_UTMI_PHY_EN);
260 		portsc |= PORT_PTS_UTMI;
261 		break;
262 	case FSL_USB2_PHY_NONE:
263 		break;
264 	}
265 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
266 }
267 
268 static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
269 {
270 	struct usb_hcd *hcd = ehci_to_hcd(ehci);
271 	struct fsl_usb2_platform_data *pdata;
272 	void __iomem *non_ehci = hcd->regs;
273 	u32 temp;
274 
275 	pdata = hcd->self.controller->platform_data;
276 
277 	/* Enable PHY interface in the control reg. */
278 	if (pdata->have_sysif_regs) {
279 		temp = in_be32(non_ehci + FSL_SOC_USB_CTRL);
280 		out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004);
281 
282 		/*
283 		* Turn on cache snooping hardware, since some PowerPC platforms
284 		* wholly rely on hardware to deal with cache coherent
285 		*/
286 
287 		/* Setup Snooping for all the 4GB space */
288 		/* SNOOP1 starts from 0x0, size 2G */
289 		out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB);
290 		/* SNOOP2 starts from 0x80000000, size 2G */
291 		out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB);
292 	}
293 
294 	if ((pdata->operating_mode == FSL_USB2_DR_HOST) ||
295 			(pdata->operating_mode == FSL_USB2_DR_OTG))
296 		ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
297 
298 	if (pdata->operating_mode == FSL_USB2_MPH_HOST) {
299 		unsigned int chip, rev, svr;
300 
301 		svr = mfspr(SPRN_SVR);
302 		chip = svr >> 16;
303 		rev = (svr >> 4) & 0xf;
304 
305 		/* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */
306 		if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055))
307 			ehci->has_fsl_port_bug = 1;
308 
309 		if (pdata->port_enables & FSL_USB2_PORT0_ENABLED)
310 			ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0);
311 		if (pdata->port_enables & FSL_USB2_PORT1_ENABLED)
312 			ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1);
313 	}
314 
315 	if (pdata->have_sysif_regs) {
316 #ifdef CONFIG_PPC_85xx
317 		out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
318 		out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
319 #else
320 		out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c);
321 		out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040);
322 #endif
323 		out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001);
324 	}
325 }
326 
327 /* called after powerup, by probe or system-pm "wakeup" */
328 static int ehci_fsl_reinit(struct ehci_hcd *ehci)
329 {
330 	ehci_fsl_usb_setup(ehci);
331 	ehci_port_power(ehci, 0);
332 
333 	return 0;
334 }
335 
336 /* called during probe() after chip reset completes */
337 static int ehci_fsl_setup(struct usb_hcd *hcd)
338 {
339 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
340 	int retval;
341 	struct fsl_usb2_platform_data *pdata;
342 	struct device *dev;
343 
344 	dev = hcd->self.controller;
345 	pdata = hcd->self.controller->platform_data;
346 	ehci->big_endian_desc = pdata->big_endian_desc;
347 	ehci->big_endian_mmio = pdata->big_endian_mmio;
348 
349 	/* EHCI registers start at offset 0x100 */
350 	ehci->caps = hcd->regs + 0x100;
351 	ehci->regs = hcd->regs + 0x100 +
352 		HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
353 	dbg_hcs_params(ehci, "reset");
354 	dbg_hcc_params(ehci, "reset");
355 
356 	/* cache this readonly data; minimize chip reads */
357 	ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
358 
359 	hcd->has_tt = 1;
360 
361 	retval = ehci_halt(ehci);
362 	if (retval)
363 		return retval;
364 
365 	/* data structure init */
366 	retval = ehci_init(hcd);
367 	if (retval)
368 		return retval;
369 
370 	ehci->sbrn = 0x20;
371 
372 	ehci_reset(ehci);
373 
374 	if (of_device_is_compatible(dev->parent->of_node,
375 				    "fsl,mpc5121-usb2-dr")) {
376 		/*
377 		 * set SBUSCFG:AHBBRST so that control msgs don't
378 		 * fail when doing heavy PATA writes.
379 		 */
380 		ehci_writel(ehci, SBUSCFG_INCR8,
381 			    hcd->regs + FSL_SOC_USB_SBUSCFG);
382 	}
383 
384 	retval = ehci_fsl_reinit(ehci);
385 	return retval;
386 }
387 
388 struct ehci_fsl {
389 	struct ehci_hcd	ehci;
390 
391 #ifdef CONFIG_PM
392 	/* Saved USB PHY settings, need to restore after deep sleep. */
393 	u32 usb_ctrl;
394 #endif
395 };
396 
397 #ifdef CONFIG_PM
398 
399 #ifdef CONFIG_PPC_MPC512x
400 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
401 {
402 	struct usb_hcd *hcd = dev_get_drvdata(dev);
403 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
404 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
405 	u32 tmp;
406 
407 #ifdef DEBUG
408 	u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE);
409 	mode &= USBMODE_CM_MASK;
410 	tmp = ehci_readl(ehci, hcd->regs + 0x140);	/* usbcmd */
411 
412 	dev_dbg(dev, "suspend=%d already_suspended=%d "
413 		"mode=%d  usbcmd %08x\n", pdata->suspended,
414 		pdata->already_suspended, mode, tmp);
415 #endif
416 
417 	/*
418 	 * If the controller is already suspended, then this must be a
419 	 * PM suspend.  Remember this fact, so that we will leave the
420 	 * controller suspended at PM resume time.
421 	 */
422 	if (pdata->suspended) {
423 		dev_dbg(dev, "already suspended, leaving early\n");
424 		pdata->already_suspended = 1;
425 		return 0;
426 	}
427 
428 	dev_dbg(dev, "suspending...\n");
429 
430 	ehci->rh_state = EHCI_RH_SUSPENDED;
431 	dev->power.power_state = PMSG_SUSPEND;
432 
433 	/* ignore non-host interrupts */
434 	clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
435 
436 	/* stop the controller */
437 	tmp = ehci_readl(ehci, &ehci->regs->command);
438 	tmp &= ~CMD_RUN;
439 	ehci_writel(ehci, tmp, &ehci->regs->command);
440 
441 	/* save EHCI registers */
442 	pdata->pm_command = ehci_readl(ehci, &ehci->regs->command);
443 	pdata->pm_command &= ~CMD_RUN;
444 	pdata->pm_status  = ehci_readl(ehci, &ehci->regs->status);
445 	pdata->pm_intr_enable  = ehci_readl(ehci, &ehci->regs->intr_enable);
446 	pdata->pm_frame_index  = ehci_readl(ehci, &ehci->regs->frame_index);
447 	pdata->pm_segment  = ehci_readl(ehci, &ehci->regs->segment);
448 	pdata->pm_frame_list  = ehci_readl(ehci, &ehci->regs->frame_list);
449 	pdata->pm_async_next  = ehci_readl(ehci, &ehci->regs->async_next);
450 	pdata->pm_configured_flag  =
451 		ehci_readl(ehci, &ehci->regs->configured_flag);
452 	pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]);
453 	pdata->pm_usbgenctrl = ehci_readl(ehci,
454 					  hcd->regs + FSL_SOC_USB_USBGENCTRL);
455 
456 	/* clear the W1C bits */
457 	pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS);
458 
459 	pdata->suspended = 1;
460 
461 	/* clear PP to cut power to the port */
462 	tmp = ehci_readl(ehci, &ehci->regs->port_status[0]);
463 	tmp &= ~PORT_POWER;
464 	ehci_writel(ehci, tmp, &ehci->regs->port_status[0]);
465 
466 	return 0;
467 }
468 
469 static int ehci_fsl_mpc512x_drv_resume(struct device *dev)
470 {
471 	struct usb_hcd *hcd = dev_get_drvdata(dev);
472 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
473 	struct fsl_usb2_platform_data *pdata = dev->platform_data;
474 	u32 tmp;
475 
476 	dev_dbg(dev, "suspend=%d already_suspended=%d\n",
477 		pdata->suspended, pdata->already_suspended);
478 
479 	/*
480 	 * If the controller was already suspended at suspend time,
481 	 * then don't resume it now.
482 	 */
483 	if (pdata->already_suspended) {
484 		dev_dbg(dev, "already suspended, leaving early\n");
485 		pdata->already_suspended = 0;
486 		return 0;
487 	}
488 
489 	if (!pdata->suspended) {
490 		dev_dbg(dev, "not suspended, leaving early\n");
491 		return 0;
492 	}
493 
494 	pdata->suspended = 0;
495 
496 	dev_dbg(dev, "resuming...\n");
497 
498 	/* set host mode */
499 	tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0);
500 	ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE);
501 
502 	ehci_writel(ehci, pdata->pm_usbgenctrl,
503 		    hcd->regs + FSL_SOC_USB_USBGENCTRL);
504 	ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE,
505 		    hcd->regs + FSL_SOC_USB_ISIPHYCTRL);
506 
507 	ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG);
508 
509 	/* restore EHCI registers */
510 	ehci_writel(ehci, pdata->pm_command, &ehci->regs->command);
511 	ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable);
512 	ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index);
513 	ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment);
514 	ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list);
515 	ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next);
516 	ehci_writel(ehci, pdata->pm_configured_flag,
517 		    &ehci->regs->configured_flag);
518 	ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]);
519 
520 	set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
521 	ehci->rh_state = EHCI_RH_RUNNING;
522 	dev->power.power_state = PMSG_ON;
523 
524 	tmp = ehci_readl(ehci, &ehci->regs->command);
525 	tmp |= CMD_RUN;
526 	ehci_writel(ehci, tmp, &ehci->regs->command);
527 
528 	usb_hcd_resume_root_hub(hcd);
529 
530 	return 0;
531 }
532 #else
533 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev)
534 {
535 	return 0;
536 }
537 
538 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev)
539 {
540 	return 0;
541 }
542 #endif /* CONFIG_PPC_MPC512x */
543 
544 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd)
545 {
546 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
547 
548 	return container_of(ehci, struct ehci_fsl, ehci);
549 }
550 
551 static int ehci_fsl_drv_suspend(struct device *dev)
552 {
553 	struct usb_hcd *hcd = dev_get_drvdata(dev);
554 	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
555 	void __iomem *non_ehci = hcd->regs;
556 
557 	if (of_device_is_compatible(dev->parent->of_node,
558 				    "fsl,mpc5121-usb2-dr")) {
559 		return ehci_fsl_mpc512x_drv_suspend(dev);
560 	}
561 
562 	ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd),
563 			device_may_wakeup(dev));
564 	if (!fsl_deep_sleep())
565 		return 0;
566 
567 	ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL);
568 	return 0;
569 }
570 
571 static int ehci_fsl_drv_resume(struct device *dev)
572 {
573 	struct usb_hcd *hcd = dev_get_drvdata(dev);
574 	struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd);
575 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
576 	void __iomem *non_ehci = hcd->regs;
577 
578 	if (of_device_is_compatible(dev->parent->of_node,
579 				    "fsl,mpc5121-usb2-dr")) {
580 		return ehci_fsl_mpc512x_drv_resume(dev);
581 	}
582 
583 	ehci_prepare_ports_for_controller_resume(ehci);
584 	if (!fsl_deep_sleep())
585 		return 0;
586 
587 	usb_root_hub_lost_power(hcd->self.root_hub);
588 
589 	/* Restore USB PHY settings and enable the controller. */
590 	out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl);
591 
592 	ehci_reset(ehci);
593 	ehci_fsl_reinit(ehci);
594 
595 	return 0;
596 }
597 
598 static int ehci_fsl_drv_restore(struct device *dev)
599 {
600 	struct usb_hcd *hcd = dev_get_drvdata(dev);
601 
602 	usb_root_hub_lost_power(hcd->self.root_hub);
603 	return 0;
604 }
605 
606 static struct dev_pm_ops ehci_fsl_pm_ops = {
607 	.suspend = ehci_fsl_drv_suspend,
608 	.resume = ehci_fsl_drv_resume,
609 	.restore = ehci_fsl_drv_restore,
610 };
611 
612 #define EHCI_FSL_PM_OPS		(&ehci_fsl_pm_ops)
613 #else
614 #define EHCI_FSL_PM_OPS		NULL
615 #endif /* CONFIG_PM */
616 
617 #ifdef CONFIG_USB_OTG
618 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port)
619 {
620 	struct ehci_hcd *ehci = hcd_to_ehci(hcd);
621 	u32 status;
622 
623 	if (!port)
624 		return -EINVAL;
625 
626 	port--;
627 
628 	/* start port reset before HNP protocol time out */
629 	status = readl(&ehci->regs->port_status[port]);
630 	if (!(status & PORT_CONNECT))
631 		return -ENODEV;
632 
633 	/* khubd will finish the reset later */
634 	if (ehci_is_TDI(ehci)) {
635 		writel(PORT_RESET |
636 		       (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)),
637 		       &ehci->regs->port_status[port]);
638 	} else {
639 		writel(PORT_RESET, &ehci->regs->port_status[port]);
640 	}
641 
642 	return 0;
643 }
644 #else
645 #define ehci_start_port_reset	NULL
646 #endif /* CONFIG_USB_OTG */
647 
648 
649 static const struct hc_driver ehci_fsl_hc_driver = {
650 	.description = hcd_name,
651 	.product_desc = "Freescale On-Chip EHCI Host Controller",
652 	.hcd_priv_size = sizeof(struct ehci_fsl),
653 
654 	/*
655 	 * generic hardware linkage
656 	 */
657 	.irq = ehci_irq,
658 	.flags = HCD_USB2 | HCD_MEMORY,
659 
660 	/*
661 	 * basic lifecycle operations
662 	 */
663 	.reset = ehci_fsl_setup,
664 	.start = ehci_run,
665 	.stop = ehci_stop,
666 	.shutdown = ehci_shutdown,
667 
668 	/*
669 	 * managing i/o requests and associated device resources
670 	 */
671 	.urb_enqueue = ehci_urb_enqueue,
672 	.urb_dequeue = ehci_urb_dequeue,
673 	.endpoint_disable = ehci_endpoint_disable,
674 	.endpoint_reset = ehci_endpoint_reset,
675 
676 	/*
677 	 * scheduling support
678 	 */
679 	.get_frame_number = ehci_get_frame,
680 
681 	/*
682 	 * root hub support
683 	 */
684 	.hub_status_data = ehci_hub_status_data,
685 	.hub_control = ehci_hub_control,
686 	.bus_suspend = ehci_bus_suspend,
687 	.bus_resume = ehci_bus_resume,
688 	.start_port_reset = ehci_start_port_reset,
689 	.relinquish_port = ehci_relinquish_port,
690 	.port_handed_over = ehci_port_handed_over,
691 
692 	.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
693 };
694 
695 static int ehci_fsl_drv_probe(struct platform_device *pdev)
696 {
697 	if (usb_disabled())
698 		return -ENODEV;
699 
700 	/* FIXME we only want one one probe() not two */
701 	return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev);
702 }
703 
704 static int ehci_fsl_drv_remove(struct platform_device *pdev)
705 {
706 	struct usb_hcd *hcd = platform_get_drvdata(pdev);
707 
708 	/* FIXME we only want one one remove() not two */
709 	usb_hcd_fsl_remove(hcd, pdev);
710 	return 0;
711 }
712 
713 MODULE_ALIAS("platform:fsl-ehci");
714 
715 static struct platform_driver ehci_fsl_driver = {
716 	.probe = ehci_fsl_drv_probe,
717 	.remove = ehci_fsl_drv_remove,
718 	.shutdown = usb_hcd_platform_shutdown,
719 	.driver = {
720 		.name = "fsl-ehci",
721 		.pm = EHCI_FSL_PM_OPS,
722 	},
723 };
724