1 /* 2 * Copyright 2005-2009 MontaVista Software, Inc. 3 * Copyright 2008,2012 Freescale Semiconductor, Inc. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License as published by the 7 * Free Software Foundation; either version 2 of the License, or (at your 8 * option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 12 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software Foundation, 17 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 18 * 19 * Ported to 834x by Randy Vinson <rvinson@mvista.com> using code provided 20 * by Hunter Wu. 21 * Power Management support by Dave Liu <daveliu@freescale.com>, 22 * Jerry Huang <Chang-Ming.Huang@freescale.com> and 23 * Anton Vorontsov <avorontsov@ru.mvista.com>. 24 */ 25 26 #include <linux/kernel.h> 27 #include <linux/types.h> 28 #include <linux/delay.h> 29 #include <linux/pm.h> 30 #include <linux/err.h> 31 #include <linux/platform_device.h> 32 #include <linux/fsl_devices.h> 33 34 #include "ehci-fsl.h" 35 36 /* configure so an HC device and id are always provided */ 37 /* always called with process context; sleeping is OK */ 38 39 /** 40 * usb_hcd_fsl_probe - initialize FSL-based HCDs 41 * @drvier: Driver to be used for this HCD 42 * @pdev: USB Host Controller being probed 43 * Context: !in_interrupt() 44 * 45 * Allocates basic resources for this USB host controller. 46 * 47 */ 48 static int usb_hcd_fsl_probe(const struct hc_driver *driver, 49 struct platform_device *pdev) 50 { 51 struct fsl_usb2_platform_data *pdata; 52 struct usb_hcd *hcd; 53 struct resource *res; 54 int irq; 55 int retval; 56 57 pr_debug("initializing FSL-SOC USB Controller\n"); 58 59 /* Need platform data for setup */ 60 pdata = (struct fsl_usb2_platform_data *)pdev->dev.platform_data; 61 if (!pdata) { 62 dev_err(&pdev->dev, 63 "No platform data for %s.\n", dev_name(&pdev->dev)); 64 return -ENODEV; 65 } 66 67 /* 68 * This is a host mode driver, verify that we're supposed to be 69 * in host mode. 70 */ 71 if (!((pdata->operating_mode == FSL_USB2_DR_HOST) || 72 (pdata->operating_mode == FSL_USB2_MPH_HOST) || 73 (pdata->operating_mode == FSL_USB2_DR_OTG))) { 74 dev_err(&pdev->dev, 75 "Non Host Mode configured for %s. Wrong driver linked.\n", 76 dev_name(&pdev->dev)); 77 return -ENODEV; 78 } 79 80 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 81 if (!res) { 82 dev_err(&pdev->dev, 83 "Found HC with no IRQ. Check %s setup!\n", 84 dev_name(&pdev->dev)); 85 return -ENODEV; 86 } 87 irq = res->start; 88 89 hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev)); 90 if (!hcd) { 91 retval = -ENOMEM; 92 goto err1; 93 } 94 95 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 96 if (!res) { 97 dev_err(&pdev->dev, 98 "Found HC with no register addr. Check %s setup!\n", 99 dev_name(&pdev->dev)); 100 retval = -ENODEV; 101 goto err2; 102 } 103 hcd->rsrc_start = res->start; 104 hcd->rsrc_len = resource_size(res); 105 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, 106 driver->description)) { 107 dev_dbg(&pdev->dev, "controller already in use\n"); 108 retval = -EBUSY; 109 goto err2; 110 } 111 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); 112 113 if (hcd->regs == NULL) { 114 dev_dbg(&pdev->dev, "error mapping memory\n"); 115 retval = -EFAULT; 116 goto err3; 117 } 118 119 pdata->regs = hcd->regs; 120 121 if (pdata->power_budget) 122 hcd->power_budget = pdata->power_budget; 123 124 /* 125 * do platform specific init: check the clock, grab/config pins, etc. 126 */ 127 if (pdata->init && pdata->init(pdev)) { 128 retval = -ENODEV; 129 goto err4; 130 } 131 132 /* Enable USB controller, 83xx or 8536 */ 133 if (pdata->have_sysif_regs) 134 setbits32(hcd->regs + FSL_SOC_USB_CTRL, 0x4); 135 136 /* Don't need to set host mode here. It will be done by tdi_reset() */ 137 138 retval = usb_add_hcd(hcd, irq, IRQF_SHARED); 139 if (retval != 0) 140 goto err4; 141 142 #ifdef CONFIG_USB_OTG 143 if (pdata->operating_mode == FSL_USB2_DR_OTG) { 144 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 145 146 hcd->phy = usb_get_phy(USB_PHY_TYPE_USB2); 147 dev_dbg(&pdev->dev, "hcd=0x%p ehci=0x%p, phy=0x%p\n", 148 hcd, ehci, hcd->phy); 149 150 if (!IS_ERR_OR_NULL(hcd->phy)) { 151 retval = otg_set_host(hcd->phy->otg, 152 &ehci_to_hcd(ehci)->self); 153 if (retval) { 154 usb_put_phy(hcd->phy); 155 goto err4; 156 } 157 } else { 158 dev_err(&pdev->dev, "can't find phy\n"); 159 retval = -ENODEV; 160 goto err4; 161 } 162 } 163 #endif 164 return retval; 165 166 err4: 167 iounmap(hcd->regs); 168 err3: 169 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 170 err2: 171 usb_put_hcd(hcd); 172 err1: 173 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), retval); 174 if (pdata->exit) 175 pdata->exit(pdev); 176 return retval; 177 } 178 179 /* may be called without controller electrically present */ 180 /* may be called with controller, bus, and devices active */ 181 182 /** 183 * usb_hcd_fsl_remove - shutdown processing for FSL-based HCDs 184 * @dev: USB Host Controller being removed 185 * Context: !in_interrupt() 186 * 187 * Reverses the effect of usb_hcd_fsl_probe(). 188 * 189 */ 190 static void usb_hcd_fsl_remove(struct usb_hcd *hcd, 191 struct platform_device *pdev) 192 { 193 struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data; 194 195 if (!IS_ERR_OR_NULL(hcd->phy)) { 196 otg_set_host(hcd->phy->otg, NULL); 197 usb_put_phy(hcd->phy); 198 } 199 200 usb_remove_hcd(hcd); 201 202 /* 203 * do platform specific un-initialization: 204 * release iomux pins, disable clock, etc. 205 */ 206 if (pdata->exit) 207 pdata->exit(pdev); 208 iounmap(hcd->regs); 209 release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 210 usb_put_hcd(hcd); 211 } 212 213 static void ehci_fsl_setup_phy(struct usb_hcd *hcd, 214 enum fsl_usb2_phy_modes phy_mode, 215 unsigned int port_offset) 216 { 217 u32 portsc, temp; 218 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 219 void __iomem *non_ehci = hcd->regs; 220 struct device *dev = hcd->self.controller; 221 struct fsl_usb2_platform_data *pdata = dev->platform_data; 222 223 if (pdata->controller_ver < 0) { 224 dev_warn(hcd->self.controller, "Could not get controller version\n"); 225 return; 226 } 227 228 portsc = ehci_readl(ehci, &ehci->regs->port_status[port_offset]); 229 portsc &= ~(PORT_PTS_MSK | PORT_PTS_PTW); 230 231 switch (phy_mode) { 232 case FSL_USB2_PHY_ULPI: 233 if (pdata->controller_ver) { 234 /* controller version 1.6 or above */ 235 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); 236 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 237 USB_CTRL_USB_EN | ULPI_PHY_CLK_SEL); 238 } 239 portsc |= PORT_PTS_ULPI; 240 break; 241 case FSL_USB2_PHY_SERIAL: 242 portsc |= PORT_PTS_SERIAL; 243 break; 244 case FSL_USB2_PHY_UTMI_WIDE: 245 portsc |= PORT_PTS_PTW; 246 /* fall through */ 247 case FSL_USB2_PHY_UTMI: 248 if (pdata->controller_ver) { 249 /* controller version 1.6 or above */ 250 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); 251 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 252 UTMI_PHY_EN | USB_CTRL_USB_EN); 253 mdelay(FSL_UTMI_PHY_DLY); /* Delay for UTMI PHY CLK to 254 become stable - 10ms*/ 255 } 256 /* enable UTMI PHY */ 257 if (pdata->have_sysif_regs) 258 setbits32(non_ehci + FSL_SOC_USB_CTRL, 259 CTRL_UTMI_PHY_EN); 260 portsc |= PORT_PTS_UTMI; 261 break; 262 case FSL_USB2_PHY_NONE: 263 break; 264 } 265 ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]); 266 } 267 268 static void ehci_fsl_usb_setup(struct ehci_hcd *ehci) 269 { 270 struct usb_hcd *hcd = ehci_to_hcd(ehci); 271 struct fsl_usb2_platform_data *pdata; 272 void __iomem *non_ehci = hcd->regs; 273 u32 temp; 274 275 pdata = hcd->self.controller->platform_data; 276 277 /* Enable PHY interface in the control reg. */ 278 if (pdata->have_sysif_regs) { 279 temp = in_be32(non_ehci + FSL_SOC_USB_CTRL); 280 out_be32(non_ehci + FSL_SOC_USB_CTRL, temp | 0x00000004); 281 282 /* 283 * Turn on cache snooping hardware, since some PowerPC platforms 284 * wholly rely on hardware to deal with cache coherent 285 */ 286 287 /* Setup Snooping for all the 4GB space */ 288 /* SNOOP1 starts from 0x0, size 2G */ 289 out_be32(non_ehci + FSL_SOC_USB_SNOOP1, 0x0 | SNOOP_SIZE_2GB); 290 /* SNOOP2 starts from 0x80000000, size 2G */ 291 out_be32(non_ehci + FSL_SOC_USB_SNOOP2, 0x80000000 | SNOOP_SIZE_2GB); 292 } 293 294 if ((pdata->operating_mode == FSL_USB2_DR_HOST) || 295 (pdata->operating_mode == FSL_USB2_DR_OTG)) 296 ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0); 297 298 if (pdata->operating_mode == FSL_USB2_MPH_HOST) { 299 unsigned int chip, rev, svr; 300 301 svr = mfspr(SPRN_SVR); 302 chip = svr >> 16; 303 rev = (svr >> 4) & 0xf; 304 305 /* Deal with USB Erratum #14 on MPC834x Rev 1.0 & 1.1 chips */ 306 if ((rev == 1) && (chip >= 0x8050) && (chip <= 0x8055)) 307 ehci->has_fsl_port_bug = 1; 308 309 if (pdata->port_enables & FSL_USB2_PORT0_ENABLED) 310 ehci_fsl_setup_phy(hcd, pdata->phy_mode, 0); 311 if (pdata->port_enables & FSL_USB2_PORT1_ENABLED) 312 ehci_fsl_setup_phy(hcd, pdata->phy_mode, 1); 313 } 314 315 if (pdata->have_sysif_regs) { 316 #ifdef CONFIG_FSL_SOC_BOOKE 317 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008); 318 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080); 319 #else 320 out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x0000000c); 321 out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000040); 322 #endif 323 out_be32(non_ehci + FSL_SOC_USB_SICTRL, 0x00000001); 324 } 325 } 326 327 /* called after powerup, by probe or system-pm "wakeup" */ 328 static int ehci_fsl_reinit(struct ehci_hcd *ehci) 329 { 330 ehci_fsl_usb_setup(ehci); 331 ehci_port_power(ehci, 0); 332 333 return 0; 334 } 335 336 /* called during probe() after chip reset completes */ 337 static int ehci_fsl_setup(struct usb_hcd *hcd) 338 { 339 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 340 int retval; 341 struct fsl_usb2_platform_data *pdata; 342 struct device *dev; 343 344 dev = hcd->self.controller; 345 pdata = hcd->self.controller->platform_data; 346 ehci->big_endian_desc = pdata->big_endian_desc; 347 ehci->big_endian_mmio = pdata->big_endian_mmio; 348 349 /* EHCI registers start at offset 0x100 */ 350 ehci->caps = hcd->regs + 0x100; 351 352 hcd->has_tt = 1; 353 354 retval = ehci_setup(hcd); 355 if (retval) 356 return retval; 357 358 if (of_device_is_compatible(dev->parent->of_node, 359 "fsl,mpc5121-usb2-dr")) { 360 /* 361 * set SBUSCFG:AHBBRST so that control msgs don't 362 * fail when doing heavy PATA writes. 363 */ 364 ehci_writel(ehci, SBUSCFG_INCR8, 365 hcd->regs + FSL_SOC_USB_SBUSCFG); 366 } 367 368 retval = ehci_fsl_reinit(ehci); 369 return retval; 370 } 371 372 struct ehci_fsl { 373 struct ehci_hcd ehci; 374 375 #ifdef CONFIG_PM 376 /* Saved USB PHY settings, need to restore after deep sleep. */ 377 u32 usb_ctrl; 378 #endif 379 }; 380 381 #ifdef CONFIG_PM 382 383 #ifdef CONFIG_PPC_MPC512x 384 static int ehci_fsl_mpc512x_drv_suspend(struct device *dev) 385 { 386 struct usb_hcd *hcd = dev_get_drvdata(dev); 387 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 388 struct fsl_usb2_platform_data *pdata = dev->platform_data; 389 u32 tmp; 390 391 #ifdef DEBUG 392 u32 mode = ehci_readl(ehci, hcd->regs + FSL_SOC_USB_USBMODE); 393 mode &= USBMODE_CM_MASK; 394 tmp = ehci_readl(ehci, hcd->regs + 0x140); /* usbcmd */ 395 396 dev_dbg(dev, "suspend=%d already_suspended=%d " 397 "mode=%d usbcmd %08x\n", pdata->suspended, 398 pdata->already_suspended, mode, tmp); 399 #endif 400 401 /* 402 * If the controller is already suspended, then this must be a 403 * PM suspend. Remember this fact, so that we will leave the 404 * controller suspended at PM resume time. 405 */ 406 if (pdata->suspended) { 407 dev_dbg(dev, "already suspended, leaving early\n"); 408 pdata->already_suspended = 1; 409 return 0; 410 } 411 412 dev_dbg(dev, "suspending...\n"); 413 414 ehci->rh_state = EHCI_RH_SUSPENDED; 415 dev->power.power_state = PMSG_SUSPEND; 416 417 /* ignore non-host interrupts */ 418 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 419 420 /* stop the controller */ 421 tmp = ehci_readl(ehci, &ehci->regs->command); 422 tmp &= ~CMD_RUN; 423 ehci_writel(ehci, tmp, &ehci->regs->command); 424 425 /* save EHCI registers */ 426 pdata->pm_command = ehci_readl(ehci, &ehci->regs->command); 427 pdata->pm_command &= ~CMD_RUN; 428 pdata->pm_status = ehci_readl(ehci, &ehci->regs->status); 429 pdata->pm_intr_enable = ehci_readl(ehci, &ehci->regs->intr_enable); 430 pdata->pm_frame_index = ehci_readl(ehci, &ehci->regs->frame_index); 431 pdata->pm_segment = ehci_readl(ehci, &ehci->regs->segment); 432 pdata->pm_frame_list = ehci_readl(ehci, &ehci->regs->frame_list); 433 pdata->pm_async_next = ehci_readl(ehci, &ehci->regs->async_next); 434 pdata->pm_configured_flag = 435 ehci_readl(ehci, &ehci->regs->configured_flag); 436 pdata->pm_portsc = ehci_readl(ehci, &ehci->regs->port_status[0]); 437 pdata->pm_usbgenctrl = ehci_readl(ehci, 438 hcd->regs + FSL_SOC_USB_USBGENCTRL); 439 440 /* clear the W1C bits */ 441 pdata->pm_portsc &= cpu_to_hc32(ehci, ~PORT_RWC_BITS); 442 443 pdata->suspended = 1; 444 445 /* clear PP to cut power to the port */ 446 tmp = ehci_readl(ehci, &ehci->regs->port_status[0]); 447 tmp &= ~PORT_POWER; 448 ehci_writel(ehci, tmp, &ehci->regs->port_status[0]); 449 450 return 0; 451 } 452 453 static int ehci_fsl_mpc512x_drv_resume(struct device *dev) 454 { 455 struct usb_hcd *hcd = dev_get_drvdata(dev); 456 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 457 struct fsl_usb2_platform_data *pdata = dev->platform_data; 458 u32 tmp; 459 460 dev_dbg(dev, "suspend=%d already_suspended=%d\n", 461 pdata->suspended, pdata->already_suspended); 462 463 /* 464 * If the controller was already suspended at suspend time, 465 * then don't resume it now. 466 */ 467 if (pdata->already_suspended) { 468 dev_dbg(dev, "already suspended, leaving early\n"); 469 pdata->already_suspended = 0; 470 return 0; 471 } 472 473 if (!pdata->suspended) { 474 dev_dbg(dev, "not suspended, leaving early\n"); 475 return 0; 476 } 477 478 pdata->suspended = 0; 479 480 dev_dbg(dev, "resuming...\n"); 481 482 /* set host mode */ 483 tmp = USBMODE_CM_HOST | (pdata->es ? USBMODE_ES : 0); 484 ehci_writel(ehci, tmp, hcd->regs + FSL_SOC_USB_USBMODE); 485 486 ehci_writel(ehci, pdata->pm_usbgenctrl, 487 hcd->regs + FSL_SOC_USB_USBGENCTRL); 488 ehci_writel(ehci, ISIPHYCTRL_PXE | ISIPHYCTRL_PHYE, 489 hcd->regs + FSL_SOC_USB_ISIPHYCTRL); 490 491 ehci_writel(ehci, SBUSCFG_INCR8, hcd->regs + FSL_SOC_USB_SBUSCFG); 492 493 /* restore EHCI registers */ 494 ehci_writel(ehci, pdata->pm_command, &ehci->regs->command); 495 ehci_writel(ehci, pdata->pm_intr_enable, &ehci->regs->intr_enable); 496 ehci_writel(ehci, pdata->pm_frame_index, &ehci->regs->frame_index); 497 ehci_writel(ehci, pdata->pm_segment, &ehci->regs->segment); 498 ehci_writel(ehci, pdata->pm_frame_list, &ehci->regs->frame_list); 499 ehci_writel(ehci, pdata->pm_async_next, &ehci->regs->async_next); 500 ehci_writel(ehci, pdata->pm_configured_flag, 501 &ehci->regs->configured_flag); 502 ehci_writel(ehci, pdata->pm_portsc, &ehci->regs->port_status[0]); 503 504 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 505 ehci->rh_state = EHCI_RH_RUNNING; 506 dev->power.power_state = PMSG_ON; 507 508 tmp = ehci_readl(ehci, &ehci->regs->command); 509 tmp |= CMD_RUN; 510 ehci_writel(ehci, tmp, &ehci->regs->command); 511 512 usb_hcd_resume_root_hub(hcd); 513 514 return 0; 515 } 516 #else 517 static inline int ehci_fsl_mpc512x_drv_suspend(struct device *dev) 518 { 519 return 0; 520 } 521 522 static inline int ehci_fsl_mpc512x_drv_resume(struct device *dev) 523 { 524 return 0; 525 } 526 #endif /* CONFIG_PPC_MPC512x */ 527 528 static struct ehci_fsl *hcd_to_ehci_fsl(struct usb_hcd *hcd) 529 { 530 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 531 532 return container_of(ehci, struct ehci_fsl, ehci); 533 } 534 535 static int ehci_fsl_drv_suspend(struct device *dev) 536 { 537 struct usb_hcd *hcd = dev_get_drvdata(dev); 538 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); 539 void __iomem *non_ehci = hcd->regs; 540 541 if (of_device_is_compatible(dev->parent->of_node, 542 "fsl,mpc5121-usb2-dr")) { 543 return ehci_fsl_mpc512x_drv_suspend(dev); 544 } 545 546 ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), 547 device_may_wakeup(dev)); 548 if (!fsl_deep_sleep()) 549 return 0; 550 551 ehci_fsl->usb_ctrl = in_be32(non_ehci + FSL_SOC_USB_CTRL); 552 return 0; 553 } 554 555 static int ehci_fsl_drv_resume(struct device *dev) 556 { 557 struct usb_hcd *hcd = dev_get_drvdata(dev); 558 struct ehci_fsl *ehci_fsl = hcd_to_ehci_fsl(hcd); 559 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 560 void __iomem *non_ehci = hcd->regs; 561 562 if (of_device_is_compatible(dev->parent->of_node, 563 "fsl,mpc5121-usb2-dr")) { 564 return ehci_fsl_mpc512x_drv_resume(dev); 565 } 566 567 ehci_prepare_ports_for_controller_resume(ehci); 568 if (!fsl_deep_sleep()) 569 return 0; 570 571 usb_root_hub_lost_power(hcd->self.root_hub); 572 573 /* Restore USB PHY settings and enable the controller. */ 574 out_be32(non_ehci + FSL_SOC_USB_CTRL, ehci_fsl->usb_ctrl); 575 576 ehci_reset(ehci); 577 ehci_fsl_reinit(ehci); 578 579 return 0; 580 } 581 582 static int ehci_fsl_drv_restore(struct device *dev) 583 { 584 struct usb_hcd *hcd = dev_get_drvdata(dev); 585 586 usb_root_hub_lost_power(hcd->self.root_hub); 587 return 0; 588 } 589 590 static struct dev_pm_ops ehci_fsl_pm_ops = { 591 .suspend = ehci_fsl_drv_suspend, 592 .resume = ehci_fsl_drv_resume, 593 .restore = ehci_fsl_drv_restore, 594 }; 595 596 #define EHCI_FSL_PM_OPS (&ehci_fsl_pm_ops) 597 #else 598 #define EHCI_FSL_PM_OPS NULL 599 #endif /* CONFIG_PM */ 600 601 #ifdef CONFIG_USB_OTG 602 static int ehci_start_port_reset(struct usb_hcd *hcd, unsigned port) 603 { 604 struct ehci_hcd *ehci = hcd_to_ehci(hcd); 605 u32 status; 606 607 if (!port) 608 return -EINVAL; 609 610 port--; 611 612 /* start port reset before HNP protocol time out */ 613 status = readl(&ehci->regs->port_status[port]); 614 if (!(status & PORT_CONNECT)) 615 return -ENODEV; 616 617 /* khubd will finish the reset later */ 618 if (ehci_is_TDI(ehci)) { 619 writel(PORT_RESET | 620 (status & ~(PORT_CSC | PORT_PEC | PORT_OCC)), 621 &ehci->regs->port_status[port]); 622 } else { 623 writel(PORT_RESET, &ehci->regs->port_status[port]); 624 } 625 626 return 0; 627 } 628 #else 629 #define ehci_start_port_reset NULL 630 #endif /* CONFIG_USB_OTG */ 631 632 633 static const struct hc_driver ehci_fsl_hc_driver = { 634 .description = hcd_name, 635 .product_desc = "Freescale On-Chip EHCI Host Controller", 636 .hcd_priv_size = sizeof(struct ehci_fsl), 637 638 /* 639 * generic hardware linkage 640 */ 641 .irq = ehci_irq, 642 .flags = HCD_USB2 | HCD_MEMORY, 643 644 /* 645 * basic lifecycle operations 646 */ 647 .reset = ehci_fsl_setup, 648 .start = ehci_run, 649 .stop = ehci_stop, 650 .shutdown = ehci_shutdown, 651 652 /* 653 * managing i/o requests and associated device resources 654 */ 655 .urb_enqueue = ehci_urb_enqueue, 656 .urb_dequeue = ehci_urb_dequeue, 657 .endpoint_disable = ehci_endpoint_disable, 658 .endpoint_reset = ehci_endpoint_reset, 659 660 /* 661 * scheduling support 662 */ 663 .get_frame_number = ehci_get_frame, 664 665 /* 666 * root hub support 667 */ 668 .hub_status_data = ehci_hub_status_data, 669 .hub_control = ehci_hub_control, 670 .bus_suspend = ehci_bus_suspend, 671 .bus_resume = ehci_bus_resume, 672 .start_port_reset = ehci_start_port_reset, 673 .relinquish_port = ehci_relinquish_port, 674 .port_handed_over = ehci_port_handed_over, 675 676 .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 677 }; 678 679 static int ehci_fsl_drv_probe(struct platform_device *pdev) 680 { 681 if (usb_disabled()) 682 return -ENODEV; 683 684 /* FIXME we only want one one probe() not two */ 685 return usb_hcd_fsl_probe(&ehci_fsl_hc_driver, pdev); 686 } 687 688 static int ehci_fsl_drv_remove(struct platform_device *pdev) 689 { 690 struct usb_hcd *hcd = platform_get_drvdata(pdev); 691 692 /* FIXME we only want one one remove() not two */ 693 usb_hcd_fsl_remove(hcd, pdev); 694 return 0; 695 } 696 697 MODULE_ALIAS("platform:fsl-ehci"); 698 699 static struct platform_driver ehci_fsl_driver = { 700 .probe = ehci_fsl_drv_probe, 701 .remove = ehci_fsl_drv_remove, 702 .shutdown = usb_hcd_platform_shutdown, 703 .driver = { 704 .name = "fsl-ehci", 705 .pm = EHCI_FSL_PM_OPS, 706 }, 707 }; 708