xref: /linux/drivers/usb/host/ehci-dbg.c (revision f3d9478b2ce468c3115b02ecae7e975990697f15)
1 /*
2  * Copyright (c) 2001-2002 by David Brownell
3  *
4  * This program is free software; you can redistribute it and/or modify it
5  * under the terms of the GNU General Public License as published by the
6  * Free Software Foundation; either version 2 of the License, or (at your
7  * option) any later version.
8  *
9  * This program is distributed in the hope that it will be useful, but
10  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
12  * for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program; if not, write to the Free Software Foundation,
16  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  */
18 
19 /* this file is part of ehci-hcd.c */
20 
21 #define ehci_dbg(ehci, fmt, args...) \
22 	dev_dbg (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
23 #define ehci_err(ehci, fmt, args...) \
24 	dev_err (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
25 #define ehci_info(ehci, fmt, args...) \
26 	dev_info (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
27 #define ehci_warn(ehci, fmt, args...) \
28 	dev_warn (ehci_to_hcd(ehci)->self.controller , fmt , ## args )
29 
30 #ifdef EHCI_VERBOSE_DEBUG
31 #	define vdbg dbg
32 #	define ehci_vdbg ehci_dbg
33 #else
34 #	define vdbg(fmt,args...) do { } while (0)
35 #	define ehci_vdbg(ehci, fmt, args...) do { } while (0)
36 #endif
37 
38 #ifdef	DEBUG
39 
40 /* check the values in the HCSPARAMS register
41  * (host controller _Structural_ parameters)
42  * see EHCI spec, Table 2-4 for each value
43  */
44 static void dbg_hcs_params (struct ehci_hcd *ehci, char *label)
45 {
46 	u32	params = readl (&ehci->caps->hcs_params);
47 
48 	ehci_dbg (ehci,
49 		"%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n",
50 		label, params,
51 		HCS_DEBUG_PORT (params),
52 		HCS_INDICATOR (params) ? " ind" : "",
53 		HCS_N_CC (params),
54 		HCS_N_PCC (params),
55 	        HCS_PORTROUTED (params) ? "" : " ordered",
56 		HCS_PPC (params) ? "" : " !ppc",
57 		HCS_N_PORTS (params)
58 		);
59 	/* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */
60 	if (HCS_PORTROUTED (params)) {
61 		int i;
62 		char buf [46], tmp [7], byte;
63 
64 		buf[0] = 0;
65 		for (i = 0; i < HCS_N_PORTS (params); i++) {
66 			// FIXME MIPS won't readb() ...
67 			byte = readb (&ehci->caps->portroute[(i>>1)]);
68 			sprintf(tmp, "%d ",
69 				((i & 0x1) ? ((byte)&0xf) : ((byte>>4)&0xf)));
70 			strcat(buf, tmp);
71 		}
72 		ehci_dbg (ehci, "%s portroute %s\n",
73 				label, buf);
74 	}
75 }
76 #else
77 
78 static inline void dbg_hcs_params (struct ehci_hcd *ehci, char *label) {}
79 
80 #endif
81 
82 #ifdef	DEBUG
83 
84 /* check the values in the HCCPARAMS register
85  * (host controller _Capability_ parameters)
86  * see EHCI Spec, Table 2-5 for each value
87  * */
88 static void dbg_hcc_params (struct ehci_hcd *ehci, char *label)
89 {
90 	u32	params = readl (&ehci->caps->hcc_params);
91 
92 	if (HCC_ISOC_CACHE (params)) {
93 		ehci_dbg (ehci,
94 		     "%s hcc_params %04x caching frame %s%s%s\n",
95 		     label, params,
96 		     HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
97 		     HCC_CANPARK (params) ? " park" : "",
98 		     HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
99 	} else {
100 		ehci_dbg (ehci,
101 		     "%s hcc_params %04x thresh %d uframes %s%s%s\n",
102 		     label,
103 		     params,
104 		     HCC_ISOC_THRES (params),
105 		     HCC_PGM_FRAMELISTLEN (params) ? "256/512/1024" : "1024",
106 		     HCC_CANPARK (params) ? " park" : "",
107 		     HCC_64BIT_ADDR (params) ? " 64 bit addr" : "");
108 	}
109 }
110 #else
111 
112 static inline void dbg_hcc_params (struct ehci_hcd *ehci, char *label) {}
113 
114 #endif
115 
116 #ifdef	DEBUG
117 
118 static void __attribute__((__unused__))
119 dbg_qtd (const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd)
120 {
121 	ehci_dbg (ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd,
122 		le32_to_cpup (&qtd->hw_next),
123 		le32_to_cpup (&qtd->hw_alt_next),
124 		le32_to_cpup (&qtd->hw_token),
125 		le32_to_cpup (&qtd->hw_buf [0]));
126 	if (qtd->hw_buf [1])
127 		ehci_dbg (ehci, "  p1=%08x p2=%08x p3=%08x p4=%08x\n",
128 			le32_to_cpup (&qtd->hw_buf [1]),
129 			le32_to_cpup (&qtd->hw_buf [2]),
130 			le32_to_cpup (&qtd->hw_buf [3]),
131 			le32_to_cpup (&qtd->hw_buf [4]));
132 }
133 
134 static void __attribute__((__unused__))
135 dbg_qh (const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
136 {
137 	ehci_dbg (ehci, "%s qh %p n%08x info %x %x qtd %x\n", label,
138 		qh, qh->hw_next, qh->hw_info1, qh->hw_info2,
139 		qh->hw_current);
140 	dbg_qtd ("overlay", ehci, (struct ehci_qtd *) &qh->hw_qtd_next);
141 }
142 
143 static void __attribute__((__unused__))
144 dbg_itd (const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd)
145 {
146 	ehci_dbg (ehci, "%s [%d] itd %p, next %08x, urb %p\n",
147 		label, itd->frame, itd, le32_to_cpu(itd->hw_next), itd->urb);
148 	ehci_dbg (ehci,
149 		"  trans: %08x %08x %08x %08x %08x %08x %08x %08x\n",
150 		le32_to_cpu(itd->hw_transaction[0]),
151 		le32_to_cpu(itd->hw_transaction[1]),
152 		le32_to_cpu(itd->hw_transaction[2]),
153 		le32_to_cpu(itd->hw_transaction[3]),
154 		le32_to_cpu(itd->hw_transaction[4]),
155 		le32_to_cpu(itd->hw_transaction[5]),
156 		le32_to_cpu(itd->hw_transaction[6]),
157 		le32_to_cpu(itd->hw_transaction[7]));
158 	ehci_dbg (ehci,
159 		"  buf:   %08x %08x %08x %08x %08x %08x %08x\n",
160 		le32_to_cpu(itd->hw_bufp[0]),
161 		le32_to_cpu(itd->hw_bufp[1]),
162 		le32_to_cpu(itd->hw_bufp[2]),
163 		le32_to_cpu(itd->hw_bufp[3]),
164 		le32_to_cpu(itd->hw_bufp[4]),
165 		le32_to_cpu(itd->hw_bufp[5]),
166 		le32_to_cpu(itd->hw_bufp[6]));
167 	ehci_dbg (ehci, "  index: %d %d %d %d %d %d %d %d\n",
168 		itd->index[0], itd->index[1], itd->index[2],
169 		itd->index[3], itd->index[4], itd->index[5],
170 		itd->index[6], itd->index[7]);
171 }
172 
173 static void __attribute__((__unused__))
174 dbg_sitd (const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd)
175 {
176 	ehci_dbg (ehci, "%s [%d] sitd %p, next %08x, urb %p\n",
177 		label, sitd->frame, sitd, le32_to_cpu(sitd->hw_next), sitd->urb);
178 	ehci_dbg (ehci,
179 		"  addr %08x sched %04x result %08x buf %08x %08x\n",
180 		le32_to_cpu(sitd->hw_fullspeed_ep),
181 		le32_to_cpu(sitd->hw_uframe),
182 		le32_to_cpu(sitd->hw_results),
183 		le32_to_cpu(sitd->hw_buf [0]),
184 		le32_to_cpu(sitd->hw_buf [1]));
185 }
186 
187 static int __attribute__((__unused__))
188 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
189 {
190 	return scnprintf (buf, len,
191 		"%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
192 		label, label [0] ? " " : "", status,
193 		(status & STS_ASS) ? " Async" : "",
194 		(status & STS_PSS) ? " Periodic" : "",
195 		(status & STS_RECL) ? " Recl" : "",
196 		(status & STS_HALT) ? " Halt" : "",
197 		(status & STS_IAA) ? " IAA" : "",
198 		(status & STS_FATAL) ? " FATAL" : "",
199 		(status & STS_FLR) ? " FLR" : "",
200 		(status & STS_PCD) ? " PCD" : "",
201 		(status & STS_ERR) ? " ERR" : "",
202 		(status & STS_INT) ? " INT" : ""
203 		);
204 }
205 
206 static int __attribute__((__unused__))
207 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
208 {
209 	return scnprintf (buf, len,
210 		"%s%sintrenable %02x%s%s%s%s%s%s",
211 		label, label [0] ? " " : "", enable,
212 		(enable & STS_IAA) ? " IAA" : "",
213 		(enable & STS_FATAL) ? " FATAL" : "",
214 		(enable & STS_FLR) ? " FLR" : "",
215 		(enable & STS_PCD) ? " PCD" : "",
216 		(enable & STS_ERR) ? " ERR" : "",
217 		(enable & STS_INT) ? " INT" : ""
218 		);
219 }
220 
221 static const char *const fls_strings [] =
222     { "1024", "512", "256", "??" };
223 
224 static int
225 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
226 {
227 	return scnprintf (buf, len,
228 		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
229 		label, label [0] ? " " : "", command,
230 		(command & CMD_PARK) ? "park" : "(park)",
231 		CMD_PARK_CNT (command),
232 		(command >> 16) & 0x3f,
233 		(command & CMD_LRESET) ? " LReset" : "",
234 		(command & CMD_IAAD) ? " IAAD" : "",
235 		(command & CMD_ASE) ? " Async" : "",
236 		(command & CMD_PSE) ? " Periodic" : "",
237 		fls_strings [(command >> 2) & 0x3],
238 		(command & CMD_RESET) ? " Reset" : "",
239 		(command & CMD_RUN) ? "RUN" : "HALT"
240 		);
241 }
242 
243 static int
244 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
245 {
246 	char	*sig;
247 
248 	/* signaling state */
249 	switch (status & (3 << 10)) {
250 	case 0 << 10: sig = "se0"; break;
251 	case 1 << 10: sig = "k"; break;		/* low speed */
252 	case 2 << 10: sig = "j"; break;
253 	default: sig = "?"; break;
254 	}
255 
256 	return scnprintf (buf, len,
257 		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
258 		label, label [0] ? " " : "", port, status,
259 		(status & PORT_POWER) ? " POWER" : "",
260 		(status & PORT_OWNER) ? " OWNER" : "",
261 		sig,
262 		(status & PORT_RESET) ? " RESET" : "",
263 		(status & PORT_SUSPEND) ? " SUSPEND" : "",
264 		(status & PORT_RESUME) ? " RESUME" : "",
265 		(status & PORT_OCC) ? " OCC" : "",
266 		(status & PORT_OC) ? " OC" : "",
267 		(status & PORT_PEC) ? " PEC" : "",
268 		(status & PORT_PE) ? " PE" : "",
269 		(status & PORT_CSC) ? " CSC" : "",
270 		(status & PORT_CONNECT) ? " CONNECT" : ""
271 	    );
272 }
273 
274 #else
275 static inline void __attribute__((__unused__))
276 dbg_qh (char *label, struct ehci_hcd *ehci, struct ehci_qh *qh)
277 {}
278 
279 static inline int __attribute__((__unused__))
280 dbg_status_buf (char *buf, unsigned len, const char *label, u32 status)
281 { return 0; }
282 
283 static inline int __attribute__((__unused__))
284 dbg_command_buf (char *buf, unsigned len, const char *label, u32 command)
285 { return 0; }
286 
287 static inline int __attribute__((__unused__))
288 dbg_intr_buf (char *buf, unsigned len, const char *label, u32 enable)
289 { return 0; }
290 
291 static inline int __attribute__((__unused__))
292 dbg_port_buf (char *buf, unsigned len, const char *label, int port, u32 status)
293 { return 0; }
294 
295 #endif	/* DEBUG */
296 
297 /* functions have the "wrong" filename when they're output... */
298 #define dbg_status(ehci, label, status) { \
299 	char _buf [80]; \
300 	dbg_status_buf (_buf, sizeof _buf, label, status); \
301 	ehci_dbg (ehci, "%s\n", _buf); \
302 }
303 
304 #define dbg_cmd(ehci, label, command) { \
305 	char _buf [80]; \
306 	dbg_command_buf (_buf, sizeof _buf, label, command); \
307 	ehci_dbg (ehci, "%s\n", _buf); \
308 }
309 
310 #define dbg_port(ehci, label, port, status) { \
311 	char _buf [80]; \
312 	dbg_port_buf (_buf, sizeof _buf, label, port, status); \
313 	ehci_dbg (ehci, "%s\n", _buf); \
314 }
315 
316 /*-------------------------------------------------------------------------*/
317 
318 #ifdef STUB_DEBUG_FILES
319 
320 static inline void create_debug_files (struct ehci_hcd *bus) { }
321 static inline void remove_debug_files (struct ehci_hcd *bus) { }
322 
323 #else
324 
325 /* troubleshooting help: expose state in driverfs */
326 
327 #define speed_char(info1) ({ char tmp; \
328 		switch (info1 & (3 << 12)) { \
329 		case 0 << 12: tmp = 'f'; break; \
330 		case 1 << 12: tmp = 'l'; break; \
331 		case 2 << 12: tmp = 'h'; break; \
332 		default: tmp = '?'; break; \
333 		}; tmp; })
334 
335 static inline char token_mark (__le32 token)
336 {
337 	__u32 v = le32_to_cpu (token);
338 	if (v & QTD_STS_ACTIVE)
339 		return '*';
340 	if (v & QTD_STS_HALT)
341 		return '-';
342 	if (!IS_SHORT_READ (v))
343 		return ' ';
344 	/* tries to advance through hw_alt_next */
345 	return '/';
346 }
347 
348 static void qh_lines (
349 	struct ehci_hcd *ehci,
350 	struct ehci_qh *qh,
351 	char **nextp,
352 	unsigned *sizep
353 )
354 {
355 	u32			scratch;
356 	u32			hw_curr;
357 	struct list_head	*entry;
358 	struct ehci_qtd		*td;
359 	unsigned		temp;
360 	unsigned		size = *sizep;
361 	char			*next = *nextp;
362 	char			mark;
363 
364 	if (qh->hw_qtd_next == EHCI_LIST_END)	/* NEC does this */
365 		mark = '@';
366 	else
367 		mark = token_mark (qh->hw_token);
368 	if (mark == '/') {	/* qh_alt_next controls qh advance? */
369 		if ((qh->hw_alt_next & QTD_MASK) == ehci->async->hw_alt_next)
370 			mark = '#';	/* blocked */
371 		else if (qh->hw_alt_next == EHCI_LIST_END)
372 			mark = '.';	/* use hw_qtd_next */
373 		/* else alt_next points to some other qtd */
374 	}
375 	scratch = le32_to_cpup (&qh->hw_info1);
376 	hw_curr = (mark == '*') ? le32_to_cpup (&qh->hw_current) : 0;
377 	temp = scnprintf (next, size,
378 			"qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)",
379 			qh, scratch & 0x007f,
380 			speed_char (scratch),
381 			(scratch >> 8) & 0x000f,
382 			scratch, le32_to_cpup (&qh->hw_info2),
383 			le32_to_cpup (&qh->hw_token), mark,
384 			(__constant_cpu_to_le32 (QTD_TOGGLE) & qh->hw_token)
385 				? "data1" : "data0",
386 			(le32_to_cpup (&qh->hw_alt_next) >> 1) & 0x0f);
387 	size -= temp;
388 	next += temp;
389 
390 	/* hc may be modifying the list as we read it ... */
391 	list_for_each (entry, &qh->qtd_list) {
392 		td = list_entry (entry, struct ehci_qtd, qtd_list);
393 		scratch = le32_to_cpup (&td->hw_token);
394 		mark = ' ';
395 		if (hw_curr == td->qtd_dma)
396 			mark = '*';
397 		else if (qh->hw_qtd_next == cpu_to_le32(td->qtd_dma))
398 			mark = '+';
399 		else if (QTD_LENGTH (scratch)) {
400 			if (td->hw_alt_next == ehci->async->hw_alt_next)
401 				mark = '#';
402 			else if (td->hw_alt_next != EHCI_LIST_END)
403 				mark = '/';
404 		}
405 		temp = snprintf (next, size,
406 				"\n\t%p%c%s len=%d %08x urb %p",
407 				td, mark, ({ char *tmp;
408 				 switch ((scratch>>8)&0x03) {
409 				 case 0: tmp = "out"; break;
410 				 case 1: tmp = "in"; break;
411 				 case 2: tmp = "setup"; break;
412 				 default: tmp = "?"; break;
413 				 } tmp;}),
414 				(scratch >> 16) & 0x7fff,
415 				scratch,
416 				td->urb);
417 		if (temp < 0)
418 			temp = 0;
419 		else if (size < temp)
420 			temp = size;
421 		size -= temp;
422 		next += temp;
423 		if (temp == size)
424 			goto done;
425 	}
426 
427 	temp = snprintf (next, size, "\n");
428 	if (temp < 0)
429 		temp = 0;
430 	else if (size < temp)
431 		temp = size;
432 	size -= temp;
433 	next += temp;
434 
435 done:
436 	*sizep = size;
437 	*nextp = next;
438 }
439 
440 static ssize_t
441 show_async (struct class_device *class_dev, char *buf)
442 {
443 	struct usb_bus		*bus;
444 	struct usb_hcd		*hcd;
445 	struct ehci_hcd		*ehci;
446 	unsigned long		flags;
447 	unsigned		temp, size;
448 	char			*next;
449 	struct ehci_qh		*qh;
450 
451 	*buf = 0;
452 
453 	bus = class_get_devdata(class_dev);
454 	hcd = bus->hcpriv;
455 	ehci = hcd_to_ehci (hcd);
456 	next = buf;
457 	size = PAGE_SIZE;
458 
459 	/* dumps a snapshot of the async schedule.
460 	 * usually empty except for long-term bulk reads, or head.
461 	 * one QH per line, and TDs we know about
462 	 */
463 	spin_lock_irqsave (&ehci->lock, flags);
464 	for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh)
465 		qh_lines (ehci, qh, &next, &size);
466 	if (ehci->reclaim && size > 0) {
467 		temp = scnprintf (next, size, "\nreclaim =\n");
468 		size -= temp;
469 		next += temp;
470 
471 		for (qh = ehci->reclaim; size > 0 && qh; qh = qh->reclaim)
472 			qh_lines (ehci, qh, &next, &size);
473 	}
474 	spin_unlock_irqrestore (&ehci->lock, flags);
475 
476 	return strlen (buf);
477 }
478 static CLASS_DEVICE_ATTR (async, S_IRUGO, show_async, NULL);
479 
480 #define DBG_SCHED_LIMIT 64
481 
482 static ssize_t
483 show_periodic (struct class_device *class_dev, char *buf)
484 {
485 	struct usb_bus		*bus;
486 	struct usb_hcd		*hcd;
487 	struct ehci_hcd		*ehci;
488 	unsigned long		flags;
489 	union ehci_shadow	p, *seen;
490 	unsigned		temp, size, seen_count;
491 	char			*next;
492 	unsigned		i;
493 	__le32			tag;
494 
495 	if (!(seen = kmalloc (DBG_SCHED_LIMIT * sizeof *seen, SLAB_ATOMIC)))
496 		return 0;
497 	seen_count = 0;
498 
499 	bus = class_get_devdata(class_dev);
500 	hcd = bus->hcpriv;
501 	ehci = hcd_to_ehci (hcd);
502 	next = buf;
503 	size = PAGE_SIZE;
504 
505 	temp = scnprintf (next, size, "size = %d\n", ehci->periodic_size);
506 	size -= temp;
507 	next += temp;
508 
509 	/* dump a snapshot of the periodic schedule.
510 	 * iso changes, interrupt usually doesn't.
511 	 */
512 	spin_lock_irqsave (&ehci->lock, flags);
513 	for (i = 0; i < ehci->periodic_size; i++) {
514 		p = ehci->pshadow [i];
515 		if (likely (!p.ptr))
516 			continue;
517 		tag = Q_NEXT_TYPE (ehci->periodic [i]);
518 
519 		temp = scnprintf (next, size, "%4d: ", i);
520 		size -= temp;
521 		next += temp;
522 
523 		do {
524 			switch (tag) {
525 			case Q_TYPE_QH:
526 				temp = scnprintf (next, size, " qh%d-%04x/%p",
527 						p.qh->period,
528 						le32_to_cpup (&p.qh->hw_info2)
529 							/* uframe masks */
530 							& (QH_CMASK | QH_SMASK),
531 						p.qh);
532 				size -= temp;
533 				next += temp;
534 				/* don't repeat what follows this qh */
535 				for (temp = 0; temp < seen_count; temp++) {
536 					if (seen [temp].ptr != p.ptr)
537 						continue;
538 					if (p.qh->qh_next.ptr)
539 						temp = scnprintf (next, size,
540 							" ...");
541 					p.ptr = NULL;
542 					break;
543 				}
544 				/* show more info the first time around */
545 				if (temp == seen_count && p.ptr) {
546 					u32	scratch = le32_to_cpup (
547 							&p.qh->hw_info1);
548 					struct ehci_qtd	*qtd;
549 					char		*type = "";
550 
551 					/* count tds, get ep direction */
552 					temp = 0;
553 					list_for_each_entry (qtd,
554 							&p.qh->qtd_list,
555 							qtd_list) {
556 						temp++;
557 						switch (0x03 & (le32_to_cpu (
558 							qtd->hw_token) >> 8)) {
559 						case 0: type = "out"; continue;
560 						case 1: type = "in"; continue;
561 						}
562 					}
563 
564 					temp = scnprintf (next, size,
565 						" (%c%d ep%d%s "
566 						"[%d/%d] q%d p%d)",
567 						speed_char (scratch),
568 						scratch & 0x007f,
569 						(scratch >> 8) & 0x000f, type,
570 						p.qh->usecs, p.qh->c_usecs,
571 						temp,
572 						0x7ff & (scratch >> 16));
573 
574 					if (seen_count < DBG_SCHED_LIMIT)
575 						seen [seen_count++].qh = p.qh;
576 				} else
577 					temp = 0;
578 				if (p.qh) {
579 					tag = Q_NEXT_TYPE (p.qh->hw_next);
580 					p = p.qh->qh_next;
581 				}
582 				break;
583 			case Q_TYPE_FSTN:
584 				temp = scnprintf (next, size,
585 					" fstn-%8x/%p", p.fstn->hw_prev,
586 					p.fstn);
587 				tag = Q_NEXT_TYPE (p.fstn->hw_next);
588 				p = p.fstn->fstn_next;
589 				break;
590 			case Q_TYPE_ITD:
591 				temp = scnprintf (next, size,
592 					" itd/%p", p.itd);
593 				tag = Q_NEXT_TYPE (p.itd->hw_next);
594 				p = p.itd->itd_next;
595 				break;
596 			case Q_TYPE_SITD:
597 				temp = scnprintf (next, size,
598 					" sitd%d-%04x/%p",
599 					p.sitd->stream->interval,
600 					le32_to_cpup (&p.sitd->hw_uframe)
601 						& 0x0000ffff,
602 					p.sitd);
603 				tag = Q_NEXT_TYPE (p.sitd->hw_next);
604 				p = p.sitd->sitd_next;
605 				break;
606 			}
607 			size -= temp;
608 			next += temp;
609 		} while (p.ptr);
610 
611 		temp = scnprintf (next, size, "\n");
612 		size -= temp;
613 		next += temp;
614 	}
615 	spin_unlock_irqrestore (&ehci->lock, flags);
616 	kfree (seen);
617 
618 	return PAGE_SIZE - size;
619 }
620 static CLASS_DEVICE_ATTR (periodic, S_IRUGO, show_periodic, NULL);
621 
622 #undef DBG_SCHED_LIMIT
623 
624 static ssize_t
625 show_registers (struct class_device *class_dev, char *buf)
626 {
627 	struct usb_bus		*bus;
628 	struct usb_hcd		*hcd;
629 	struct ehci_hcd		*ehci;
630 	unsigned long		flags;
631 	unsigned		temp, size, i;
632 	char			*next, scratch [80];
633 	static char		fmt [] = "%*s\n";
634 	static char		label [] = "";
635 
636 	bus = class_get_devdata(class_dev);
637 	hcd = bus->hcpriv;
638 	ehci = hcd_to_ehci (hcd);
639 	next = buf;
640 	size = PAGE_SIZE;
641 
642 	spin_lock_irqsave (&ehci->lock, flags);
643 
644 	if (bus->controller->power.power_state.event) {
645 		size = scnprintf (next, size,
646 			"bus %s, device %s (driver " DRIVER_VERSION ")\n"
647 			"%s\n"
648 			"SUSPENDED (no register access)\n",
649 			hcd->self.controller->bus->name,
650 			hcd->self.controller->bus_id,
651 			hcd->product_desc);
652 		goto done;
653 	}
654 
655 	/* Capability Registers */
656 	i = HC_VERSION(readl (&ehci->caps->hc_capbase));
657 	temp = scnprintf (next, size,
658 		"bus %s, device %s (driver " DRIVER_VERSION ")\n"
659 		"%s\n"
660 		"EHCI %x.%02x, hcd state %d\n",
661 		hcd->self.controller->bus->name,
662 		hcd->self.controller->bus_id,
663 		hcd->product_desc,
664 		i >> 8, i & 0x0ff, hcd->state);
665 	size -= temp;
666 	next += temp;
667 
668 #ifdef	CONFIG_PCI
669 	/* EHCI 0.96 and later may have "extended capabilities" */
670 	if (hcd->self.controller->bus == &pci_bus_type) {
671 		struct pci_dev	*pdev;
672 		u32		offset, cap, cap2;
673 		unsigned	count = 256/4;
674 
675 		pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
676 		offset = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
677 		while (offset && count--) {
678 			pci_read_config_dword (pdev, offset, &cap);
679 			switch (cap & 0xff) {
680 			case 1:
681 				temp = scnprintf (next, size,
682 					"ownership %08x%s%s\n", cap,
683 					(cap & (1 << 24)) ? " linux" : "",
684 					(cap & (1 << 16)) ? " firmware" : "");
685 				size -= temp;
686 				next += temp;
687 
688 				offset += 4;
689 				pci_read_config_dword (pdev, offset, &cap2);
690 				temp = scnprintf (next, size,
691 					"SMI sts/enable 0x%08x\n", cap2);
692 				size -= temp;
693 				next += temp;
694 				break;
695 			case 0:		/* illegal reserved capability */
696 				cap = 0;
697 				/* FALLTHROUGH */
698 			default:		/* unknown */
699 				break;
700 			}
701 			temp = (cap >> 8) & 0xff;
702 		}
703 	}
704 #endif
705 
706 	// FIXME interpret both types of params
707 	i = readl (&ehci->caps->hcs_params);
708 	temp = scnprintf (next, size, "structural params 0x%08x\n", i);
709 	size -= temp;
710 	next += temp;
711 
712 	i = readl (&ehci->caps->hcc_params);
713 	temp = scnprintf (next, size, "capability params 0x%08x\n", i);
714 	size -= temp;
715 	next += temp;
716 
717 	/* Operational Registers */
718 	temp = dbg_status_buf (scratch, sizeof scratch, label,
719 			readl (&ehci->regs->status));
720 	temp = scnprintf (next, size, fmt, temp, scratch);
721 	size -= temp;
722 	next += temp;
723 
724 	temp = dbg_command_buf (scratch, sizeof scratch, label,
725 			readl (&ehci->regs->command));
726 	temp = scnprintf (next, size, fmt, temp, scratch);
727 	size -= temp;
728 	next += temp;
729 
730 	temp = dbg_intr_buf (scratch, sizeof scratch, label,
731 			readl (&ehci->regs->intr_enable));
732 	temp = scnprintf (next, size, fmt, temp, scratch);
733 	size -= temp;
734 	next += temp;
735 
736 	temp = scnprintf (next, size, "uframe %04x\n",
737 			readl (&ehci->regs->frame_index));
738 	size -= temp;
739 	next += temp;
740 
741 	for (i = 1; i <= HCS_N_PORTS (ehci->hcs_params); i++) {
742 		temp = dbg_port_buf (scratch, sizeof scratch, label, i,
743 				readl (&ehci->regs->port_status [i - 1]));
744 		temp = scnprintf (next, size, fmt, temp, scratch);
745 		size -= temp;
746 		next += temp;
747 		if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) {
748 			temp = scnprintf (next, size,
749 					"    debug control %08x\n",
750 					readl (&ehci->debug->control));
751 			size -= temp;
752 			next += temp;
753 		}
754 	}
755 
756 	if (ehci->reclaim) {
757 		temp = scnprintf (next, size, "reclaim qh %p%s\n",
758 				ehci->reclaim,
759 				ehci->reclaim_ready ? " ready" : "");
760 		size -= temp;
761 		next += temp;
762 	}
763 
764 #ifdef EHCI_STATS
765 	temp = scnprintf (next, size,
766 		"irq normal %ld err %ld reclaim %ld (lost %ld)\n",
767 		ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
768 		ehci->stats.lost_iaa);
769 	size -= temp;
770 	next += temp;
771 
772 	temp = scnprintf (next, size, "complete %ld unlink %ld\n",
773 		ehci->stats.complete, ehci->stats.unlink);
774 	size -= temp;
775 	next += temp;
776 #endif
777 
778 done:
779 	spin_unlock_irqrestore (&ehci->lock, flags);
780 
781 	return PAGE_SIZE - size;
782 }
783 static CLASS_DEVICE_ATTR (registers, S_IRUGO, show_registers, NULL);
784 
785 static inline void create_debug_files (struct ehci_hcd *ehci)
786 {
787 	struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
788 
789 	class_device_create_file(cldev, &class_device_attr_async);
790 	class_device_create_file(cldev, &class_device_attr_periodic);
791 	class_device_create_file(cldev, &class_device_attr_registers);
792 }
793 
794 static inline void remove_debug_files (struct ehci_hcd *ehci)
795 {
796 	struct class_device *cldev = ehci_to_hcd(ehci)->self.class_dev;
797 
798 	class_device_remove_file(cldev, &class_device_attr_async);
799 	class_device_remove_file(cldev, &class_device_attr_periodic);
800 	class_device_remove_file(cldev, &class_device_attr_registers);
801 }
802 
803 #endif /* STUB_DEBUG_FILES */
804 
805