1 /* 2 * Copyright (c) 2001-2002 by David Brownell 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the 6 * Free Software Foundation; either version 2 of the License, or (at your 7 * option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but 10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * for more details. 13 * 14 */ 15 16 /* this file is part of ehci-hcd.c */ 17 18 #ifdef CONFIG_DYNAMIC_DEBUG 19 20 /* 21 * check the values in the HCSPARAMS register 22 * (host controller _Structural_ parameters) 23 * see EHCI spec, Table 2-4 for each value 24 */ 25 static void dbg_hcs_params(struct ehci_hcd *ehci, char *label) 26 { 27 u32 params = ehci_readl(ehci, &ehci->caps->hcs_params); 28 29 ehci_dbg(ehci, 30 "%s hcs_params 0x%x dbg=%d%s cc=%d pcc=%d%s%s ports=%d\n", 31 label, params, 32 HCS_DEBUG_PORT(params), 33 HCS_INDICATOR(params) ? " ind" : "", 34 HCS_N_CC(params), 35 HCS_N_PCC(params), 36 HCS_PORTROUTED(params) ? "" : " ordered", 37 HCS_PPC(params) ? "" : " !ppc", 38 HCS_N_PORTS(params)); 39 /* Port routing, per EHCI 0.95 Spec, Section 2.2.5 */ 40 if (HCS_PORTROUTED(params)) { 41 int i; 42 char buf[46], tmp[7], byte; 43 44 buf[0] = 0; 45 for (i = 0; i < HCS_N_PORTS(params); i++) { 46 /* FIXME MIPS won't readb() ... */ 47 byte = readb(&ehci->caps->portroute[(i >> 1)]); 48 sprintf(tmp, "%d ", 49 (i & 0x1) ? byte & 0xf : (byte >> 4) & 0xf); 50 strcat(buf, tmp); 51 } 52 ehci_dbg(ehci, "%s portroute %s\n", label, buf); 53 } 54 } 55 #else 56 57 static inline void dbg_hcs_params(struct ehci_hcd *ehci, char *label) {} 58 59 #endif 60 61 #ifdef CONFIG_DYNAMIC_DEBUG 62 63 /* 64 * check the values in the HCCPARAMS register 65 * (host controller _Capability_ parameters) 66 * see EHCI Spec, Table 2-5 for each value 67 */ 68 static void dbg_hcc_params(struct ehci_hcd *ehci, char *label) 69 { 70 u32 params = ehci_readl(ehci, &ehci->caps->hcc_params); 71 72 if (HCC_ISOC_CACHE(params)) { 73 ehci_dbg(ehci, 74 "%s hcc_params %04x caching frame %s%s%s\n", 75 label, params, 76 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 77 HCC_CANPARK(params) ? " park" : "", 78 HCC_64BIT_ADDR(params) ? " 64 bit addr" : ""); 79 } else { 80 ehci_dbg(ehci, 81 "%s hcc_params %04x thresh %d uframes %s%s%s%s%s%s%s\n", 82 label, 83 params, 84 HCC_ISOC_THRES(params), 85 HCC_PGM_FRAMELISTLEN(params) ? "256/512/1024" : "1024", 86 HCC_CANPARK(params) ? " park" : "", 87 HCC_64BIT_ADDR(params) ? " 64 bit addr" : "", 88 HCC_LPM(params) ? " LPM" : "", 89 HCC_PER_PORT_CHANGE_EVENT(params) ? " ppce" : "", 90 HCC_HW_PREFETCH(params) ? " hw prefetch" : "", 91 HCC_32FRAME_PERIODIC_LIST(params) ? 92 " 32 periodic list" : ""); 93 } 94 } 95 #else 96 97 static inline void dbg_hcc_params(struct ehci_hcd *ehci, char *label) {} 98 99 #endif 100 101 #ifdef CONFIG_DYNAMIC_DEBUG 102 103 static void __maybe_unused 104 dbg_qtd(const char *label, struct ehci_hcd *ehci, struct ehci_qtd *qtd) 105 { 106 ehci_dbg(ehci, "%s td %p n%08x %08x t%08x p0=%08x\n", label, qtd, 107 hc32_to_cpup(ehci, &qtd->hw_next), 108 hc32_to_cpup(ehci, &qtd->hw_alt_next), 109 hc32_to_cpup(ehci, &qtd->hw_token), 110 hc32_to_cpup(ehci, &qtd->hw_buf[0])); 111 if (qtd->hw_buf[1]) 112 ehci_dbg(ehci, " p1=%08x p2=%08x p3=%08x p4=%08x\n", 113 hc32_to_cpup(ehci, &qtd->hw_buf[1]), 114 hc32_to_cpup(ehci, &qtd->hw_buf[2]), 115 hc32_to_cpup(ehci, &qtd->hw_buf[3]), 116 hc32_to_cpup(ehci, &qtd->hw_buf[4])); 117 } 118 119 static void __maybe_unused 120 dbg_qh(const char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 121 { 122 struct ehci_qh_hw *hw = qh->hw; 123 124 ehci_dbg(ehci, "%s qh %p n%08x info %x %x qtd %x\n", label, 125 qh, hw->hw_next, hw->hw_info1, hw->hw_info2, hw->hw_current); 126 dbg_qtd("overlay", ehci, (struct ehci_qtd *) &hw->hw_qtd_next); 127 } 128 129 static void __maybe_unused 130 dbg_itd(const char *label, struct ehci_hcd *ehci, struct ehci_itd *itd) 131 { 132 ehci_dbg(ehci, "%s [%d] itd %p, next %08x, urb %p\n", 133 label, itd->frame, itd, hc32_to_cpu(ehci, itd->hw_next), 134 itd->urb); 135 ehci_dbg(ehci, 136 " trans: %08x %08x %08x %08x %08x %08x %08x %08x\n", 137 hc32_to_cpu(ehci, itd->hw_transaction[0]), 138 hc32_to_cpu(ehci, itd->hw_transaction[1]), 139 hc32_to_cpu(ehci, itd->hw_transaction[2]), 140 hc32_to_cpu(ehci, itd->hw_transaction[3]), 141 hc32_to_cpu(ehci, itd->hw_transaction[4]), 142 hc32_to_cpu(ehci, itd->hw_transaction[5]), 143 hc32_to_cpu(ehci, itd->hw_transaction[6]), 144 hc32_to_cpu(ehci, itd->hw_transaction[7])); 145 ehci_dbg(ehci, 146 " buf: %08x %08x %08x %08x %08x %08x %08x\n", 147 hc32_to_cpu(ehci, itd->hw_bufp[0]), 148 hc32_to_cpu(ehci, itd->hw_bufp[1]), 149 hc32_to_cpu(ehci, itd->hw_bufp[2]), 150 hc32_to_cpu(ehci, itd->hw_bufp[3]), 151 hc32_to_cpu(ehci, itd->hw_bufp[4]), 152 hc32_to_cpu(ehci, itd->hw_bufp[5]), 153 hc32_to_cpu(ehci, itd->hw_bufp[6])); 154 ehci_dbg(ehci, " index: %d %d %d %d %d %d %d %d\n", 155 itd->index[0], itd->index[1], itd->index[2], 156 itd->index[3], itd->index[4], itd->index[5], 157 itd->index[6], itd->index[7]); 158 } 159 160 static void __maybe_unused 161 dbg_sitd(const char *label, struct ehci_hcd *ehci, struct ehci_sitd *sitd) 162 { 163 ehci_dbg(ehci, "%s [%d] sitd %p, next %08x, urb %p\n", 164 label, sitd->frame, sitd, hc32_to_cpu(ehci, sitd->hw_next), 165 sitd->urb); 166 ehci_dbg(ehci, 167 " addr %08x sched %04x result %08x buf %08x %08x\n", 168 hc32_to_cpu(ehci, sitd->hw_fullspeed_ep), 169 hc32_to_cpu(ehci, sitd->hw_uframe), 170 hc32_to_cpu(ehci, sitd->hw_results), 171 hc32_to_cpu(ehci, sitd->hw_buf[0]), 172 hc32_to_cpu(ehci, sitd->hw_buf[1])); 173 } 174 175 static int __maybe_unused 176 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status) 177 { 178 return scnprintf(buf, len, 179 "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s%s", 180 label, label[0] ? " " : "", status, 181 (status & STS_PPCE_MASK) ? " PPCE" : "", 182 (status & STS_ASS) ? " Async" : "", 183 (status & STS_PSS) ? " Periodic" : "", 184 (status & STS_RECL) ? " Recl" : "", 185 (status & STS_HALT) ? " Halt" : "", 186 (status & STS_IAA) ? " IAA" : "", 187 (status & STS_FATAL) ? " FATAL" : "", 188 (status & STS_FLR) ? " FLR" : "", 189 (status & STS_PCD) ? " PCD" : "", 190 (status & STS_ERR) ? " ERR" : "", 191 (status & STS_INT) ? " INT" : ""); 192 } 193 194 static int __maybe_unused 195 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable) 196 { 197 return scnprintf(buf, len, 198 "%s%sintrenable %02x%s%s%s%s%s%s%s", 199 label, label[0] ? " " : "", enable, 200 (enable & STS_PPCE_MASK) ? " PPCE" : "", 201 (enable & STS_IAA) ? " IAA" : "", 202 (enable & STS_FATAL) ? " FATAL" : "", 203 (enable & STS_FLR) ? " FLR" : "", 204 (enable & STS_PCD) ? " PCD" : "", 205 (enable & STS_ERR) ? " ERR" : "", 206 (enable & STS_INT) ? " INT" : ""); 207 } 208 209 static const char *const fls_strings[] = { "1024", "512", "256", "??" }; 210 211 static int 212 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command) 213 { 214 return scnprintf(buf, len, 215 "%s%scommand %07x %s%s%s%s%s%s=%d ithresh=%d%s%s%s%s " 216 "period=%s%s %s", 217 label, label[0] ? " " : "", command, 218 (command & CMD_HIRD) ? " HIRD" : "", 219 (command & CMD_PPCEE) ? " PPCEE" : "", 220 (command & CMD_FSP) ? " FSP" : "", 221 (command & CMD_ASPE) ? " ASPE" : "", 222 (command & CMD_PSPE) ? " PSPE" : "", 223 (command & CMD_PARK) ? " park" : "(park)", 224 CMD_PARK_CNT(command), 225 (command >> 16) & 0x3f, 226 (command & CMD_LRESET) ? " LReset" : "", 227 (command & CMD_IAAD) ? " IAAD" : "", 228 (command & CMD_ASE) ? " Async" : "", 229 (command & CMD_PSE) ? " Periodic" : "", 230 fls_strings[(command >> 2) & 0x3], 231 (command & CMD_RESET) ? " Reset" : "", 232 (command & CMD_RUN) ? "RUN" : "HALT"); 233 } 234 235 static int 236 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status) 237 { 238 char *sig; 239 240 /* signaling state */ 241 switch (status & (3 << 10)) { 242 case 0 << 10: 243 sig = "se0"; 244 break; 245 case 1 << 10: /* low speed */ 246 sig = "k"; 247 break; 248 case 2 << 10: 249 sig = "j"; 250 break; 251 default: 252 sig = "?"; 253 break; 254 } 255 256 return scnprintf(buf, len, 257 "%s%sport:%d status %06x %d %s%s%s%s%s%s " 258 "sig=%s%s%s%s%s%s%s%s%s%s%s", 259 label, label[0] ? " " : "", port, status, 260 status >> 25, /*device address */ 261 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ACK ? 262 " ACK" : "", 263 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_NYET ? 264 " NYET" : "", 265 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_STALL ? 266 " STALL" : "", 267 (status & PORT_SSTS) >> 23 == PORTSC_SUSPEND_STS_ERR ? 268 " ERR" : "", 269 (status & PORT_POWER) ? " POWER" : "", 270 (status & PORT_OWNER) ? " OWNER" : "", 271 sig, 272 (status & PORT_LPM) ? " LPM" : "", 273 (status & PORT_RESET) ? " RESET" : "", 274 (status & PORT_SUSPEND) ? " SUSPEND" : "", 275 (status & PORT_RESUME) ? " RESUME" : "", 276 (status & PORT_OCC) ? " OCC" : "", 277 (status & PORT_OC) ? " OC" : "", 278 (status & PORT_PEC) ? " PEC" : "", 279 (status & PORT_PE) ? " PE" : "", 280 (status & PORT_CSC) ? " CSC" : "", 281 (status & PORT_CONNECT) ? " CONNECT" : ""); 282 } 283 284 #else 285 static inline void __maybe_unused 286 dbg_qh(char *label, struct ehci_hcd *ehci, struct ehci_qh *qh) 287 {} 288 289 static inline int __maybe_unused 290 dbg_status_buf(char *buf, unsigned len, const char *label, u32 status) 291 { 292 return 0; 293 } 294 295 static inline int __maybe_unused 296 dbg_command_buf(char *buf, unsigned len, const char *label, u32 command) 297 { 298 return 0; 299 } 300 301 static inline int __maybe_unused 302 dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable) 303 { 304 return 0; 305 } 306 307 static inline int __maybe_unused 308 dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status) 309 { 310 return 0; 311 } 312 313 #endif /* CONFIG_DYNAMIC_DEBUG */ 314 315 static inline void 316 dbg_status(struct ehci_hcd *ehci, const char *label, u32 status) 317 { 318 char buf[80]; 319 320 dbg_status_buf(buf, sizeof(buf), label, status); 321 ehci_dbg(ehci, "%s\n", buf); 322 } 323 324 static inline void 325 dbg_cmd(struct ehci_hcd *ehci, const char *label, u32 command) 326 { 327 char buf[80]; 328 329 dbg_command_buf(buf, sizeof(buf), label, command); 330 ehci_dbg(ehci, "%s\n", buf); 331 } 332 333 static inline void 334 dbg_port(struct ehci_hcd *ehci, const char *label, int port, u32 status) 335 { 336 char buf[80]; 337 338 dbg_port_buf(buf, sizeof(buf), label, port, status); 339 ehci_dbg(ehci, "%s\n", buf); 340 } 341 342 /*-------------------------------------------------------------------------*/ 343 344 #ifndef CONFIG_DYNAMIC_DEBUG 345 346 static inline void create_debug_files(struct ehci_hcd *bus) { } 347 static inline void remove_debug_files(struct ehci_hcd *bus) { } 348 349 #else 350 351 /* troubleshooting help: expose state in debugfs */ 352 353 static int debug_async_open(struct inode *, struct file *); 354 static int debug_bandwidth_open(struct inode *, struct file *); 355 static int debug_periodic_open(struct inode *, struct file *); 356 static int debug_registers_open(struct inode *, struct file *); 357 358 static ssize_t debug_output(struct file*, char __user*, size_t, loff_t*); 359 static int debug_close(struct inode *, struct file *); 360 361 static const struct file_operations debug_async_fops = { 362 .owner = THIS_MODULE, 363 .open = debug_async_open, 364 .read = debug_output, 365 .release = debug_close, 366 .llseek = default_llseek, 367 }; 368 369 static const struct file_operations debug_bandwidth_fops = { 370 .owner = THIS_MODULE, 371 .open = debug_bandwidth_open, 372 .read = debug_output, 373 .release = debug_close, 374 .llseek = default_llseek, 375 }; 376 377 static const struct file_operations debug_periodic_fops = { 378 .owner = THIS_MODULE, 379 .open = debug_periodic_open, 380 .read = debug_output, 381 .release = debug_close, 382 .llseek = default_llseek, 383 }; 384 385 static const struct file_operations debug_registers_fops = { 386 .owner = THIS_MODULE, 387 .open = debug_registers_open, 388 .read = debug_output, 389 .release = debug_close, 390 .llseek = default_llseek, 391 }; 392 393 static struct dentry *ehci_debug_root; 394 395 struct debug_buffer { 396 ssize_t (*fill_func)(struct debug_buffer *); /* fill method */ 397 struct usb_bus *bus; 398 struct mutex mutex; /* protect filling of buffer */ 399 size_t count; /* number of characters filled into buffer */ 400 char *output_buf; 401 size_t alloc_size; 402 }; 403 404 static inline char speed_char(u32 info1) 405 { 406 switch (info1 & (3 << 12)) { 407 case QH_FULL_SPEED: 408 return 'f'; 409 case QH_LOW_SPEED: 410 return 'l'; 411 case QH_HIGH_SPEED: 412 return 'h'; 413 default: 414 return '?'; 415 } 416 } 417 418 static inline char token_mark(struct ehci_hcd *ehci, __hc32 token) 419 { 420 __u32 v = hc32_to_cpu(ehci, token); 421 422 if (v & QTD_STS_ACTIVE) 423 return '*'; 424 if (v & QTD_STS_HALT) 425 return '-'; 426 if (!IS_SHORT_READ(v)) 427 return ' '; 428 /* tries to advance through hw_alt_next */ 429 return '/'; 430 } 431 432 static void qh_lines(struct ehci_hcd *ehci, struct ehci_qh *qh, 433 char **nextp, unsigned *sizep) 434 { 435 u32 scratch; 436 u32 hw_curr; 437 struct list_head *entry; 438 struct ehci_qtd *td; 439 unsigned temp; 440 unsigned size = *sizep; 441 char *next = *nextp; 442 char mark; 443 __le32 list_end = EHCI_LIST_END(ehci); 444 struct ehci_qh_hw *hw = qh->hw; 445 446 if (hw->hw_qtd_next == list_end) /* NEC does this */ 447 mark = '@'; 448 else 449 mark = token_mark(ehci, hw->hw_token); 450 if (mark == '/') { /* qh_alt_next controls qh advance? */ 451 if ((hw->hw_alt_next & QTD_MASK(ehci)) 452 == ehci->async->hw->hw_alt_next) 453 mark = '#'; /* blocked */ 454 else if (hw->hw_alt_next == list_end) 455 mark = '.'; /* use hw_qtd_next */ 456 /* else alt_next points to some other qtd */ 457 } 458 scratch = hc32_to_cpup(ehci, &hw->hw_info1); 459 hw_curr = (mark == '*') ? hc32_to_cpup(ehci, &hw->hw_current) : 0; 460 temp = scnprintf(next, size, 461 "qh/%p dev%d %cs ep%d %08x %08x (%08x%c %s nak%d)" 462 " [cur %08x next %08x buf[0] %08x]", 463 qh, scratch & 0x007f, 464 speed_char (scratch), 465 (scratch >> 8) & 0x000f, 466 scratch, hc32_to_cpup(ehci, &hw->hw_info2), 467 hc32_to_cpup(ehci, &hw->hw_token), mark, 468 (cpu_to_hc32(ehci, QTD_TOGGLE) & hw->hw_token) 469 ? "data1" : "data0", 470 (hc32_to_cpup(ehci, &hw->hw_alt_next) >> 1) & 0x0f, 471 hc32_to_cpup(ehci, &hw->hw_current), 472 hc32_to_cpup(ehci, &hw->hw_qtd_next), 473 hc32_to_cpup(ehci, &hw->hw_buf[0])); 474 size -= temp; 475 next += temp; 476 477 /* hc may be modifying the list as we read it ... */ 478 list_for_each(entry, &qh->qtd_list) { 479 char *type; 480 481 td = list_entry(entry, struct ehci_qtd, qtd_list); 482 scratch = hc32_to_cpup(ehci, &td->hw_token); 483 mark = ' '; 484 if (hw_curr == td->qtd_dma) { 485 mark = '*'; 486 } else if (hw->hw_qtd_next == cpu_to_hc32(ehci, td->qtd_dma)) { 487 mark = '+'; 488 } else if (QTD_LENGTH(scratch)) { 489 if (td->hw_alt_next == ehci->async->hw->hw_alt_next) 490 mark = '#'; 491 else if (td->hw_alt_next != list_end) 492 mark = '/'; 493 } 494 switch ((scratch >> 8) & 0x03) { 495 case 0: 496 type = "out"; 497 break; 498 case 1: 499 type = "in"; 500 break; 501 case 2: 502 type = "setup"; 503 break; 504 default: 505 type = "?"; 506 break; 507 } 508 temp = scnprintf(next, size, 509 "\n\t%p%c%s len=%d %08x urb %p" 510 " [td %08x buf[0] %08x]", 511 td, mark, type, 512 (scratch >> 16) & 0x7fff, 513 scratch, 514 td->urb, 515 (u32) td->qtd_dma, 516 hc32_to_cpup(ehci, &td->hw_buf[0])); 517 size -= temp; 518 next += temp; 519 if (temp == size) 520 goto done; 521 } 522 523 temp = scnprintf(next, size, "\n"); 524 size -= temp; 525 next += temp; 526 527 done: 528 *sizep = size; 529 *nextp = next; 530 } 531 532 static ssize_t fill_async_buffer(struct debug_buffer *buf) 533 { 534 struct usb_hcd *hcd; 535 struct ehci_hcd *ehci; 536 unsigned long flags; 537 unsigned temp, size; 538 char *next; 539 struct ehci_qh *qh; 540 541 hcd = bus_to_hcd(buf->bus); 542 ehci = hcd_to_ehci(hcd); 543 next = buf->output_buf; 544 size = buf->alloc_size; 545 546 *next = 0; 547 548 /* 549 * dumps a snapshot of the async schedule. 550 * usually empty except for long-term bulk reads, or head. 551 * one QH per line, and TDs we know about 552 */ 553 spin_lock_irqsave(&ehci->lock, flags); 554 for (qh = ehci->async->qh_next.qh; size > 0 && qh; qh = qh->qh_next.qh) 555 qh_lines(ehci, qh, &next, &size); 556 if (!list_empty(&ehci->async_unlink) && size > 0) { 557 temp = scnprintf(next, size, "\nunlink =\n"); 558 size -= temp; 559 next += temp; 560 561 list_for_each_entry(qh, &ehci->async_unlink, unlink_node) { 562 if (size <= 0) 563 break; 564 qh_lines(ehci, qh, &next, &size); 565 } 566 } 567 spin_unlock_irqrestore(&ehci->lock, flags); 568 569 return strlen(buf->output_buf); 570 } 571 572 static ssize_t fill_bandwidth_buffer(struct debug_buffer *buf) 573 { 574 struct ehci_hcd *ehci; 575 struct ehci_tt *tt; 576 struct ehci_per_sched *ps; 577 unsigned temp, size; 578 char *next; 579 unsigned i; 580 u8 *bw; 581 u16 *bf; 582 u8 budget[EHCI_BANDWIDTH_SIZE]; 583 584 ehci = hcd_to_ehci(bus_to_hcd(buf->bus)); 585 next = buf->output_buf; 586 size = buf->alloc_size; 587 588 *next = 0; 589 590 spin_lock_irq(&ehci->lock); 591 592 /* Dump the HS bandwidth table */ 593 temp = scnprintf(next, size, 594 "HS bandwidth allocation (us per microframe)\n"); 595 size -= temp; 596 next += temp; 597 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) { 598 bw = &ehci->bandwidth[i]; 599 temp = scnprintf(next, size, 600 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n", 601 i, bw[0], bw[1], bw[2], bw[3], 602 bw[4], bw[5], bw[6], bw[7]); 603 size -= temp; 604 next += temp; 605 } 606 607 /* Dump all the FS/LS tables */ 608 list_for_each_entry(tt, &ehci->tt_list, tt_list) { 609 temp = scnprintf(next, size, 610 "\nTT %s port %d FS/LS bandwidth allocation (us per frame)\n", 611 dev_name(&tt->usb_tt->hub->dev), 612 tt->tt_port + !!tt->usb_tt->multi); 613 size -= temp; 614 next += temp; 615 616 bf = tt->bandwidth; 617 temp = scnprintf(next, size, 618 " %5u%5u%5u%5u%5u%5u%5u%5u\n", 619 bf[0], bf[1], bf[2], bf[3], 620 bf[4], bf[5], bf[6], bf[7]); 621 size -= temp; 622 next += temp; 623 624 temp = scnprintf(next, size, 625 "FS/LS budget (us per microframe)\n"); 626 size -= temp; 627 next += temp; 628 compute_tt_budget(budget, tt); 629 for (i = 0; i < EHCI_BANDWIDTH_SIZE; i += 8) { 630 bw = &budget[i]; 631 temp = scnprintf(next, size, 632 "%2u: %4u%4u%4u%4u%4u%4u%4u%4u\n", 633 i, bw[0], bw[1], bw[2], bw[3], 634 bw[4], bw[5], bw[6], bw[7]); 635 size -= temp; 636 next += temp; 637 } 638 list_for_each_entry(ps, &tt->ps_list, ps_list) { 639 temp = scnprintf(next, size, 640 "%s ep %02x: %4u @ %2u.%u+%u mask %04x\n", 641 dev_name(&ps->udev->dev), 642 ps->ep->desc.bEndpointAddress, 643 ps->tt_usecs, 644 ps->bw_phase, ps->phase_uf, 645 ps->bw_period, ps->cs_mask); 646 size -= temp; 647 next += temp; 648 } 649 } 650 spin_unlock_irq(&ehci->lock); 651 652 return next - buf->output_buf; 653 } 654 655 static unsigned output_buf_tds_dir(char *buf, struct ehci_hcd *ehci, 656 struct ehci_qh_hw *hw, struct ehci_qh *qh, unsigned size) 657 { 658 u32 scratch = hc32_to_cpup(ehci, &hw->hw_info1); 659 struct ehci_qtd *qtd; 660 char *type = ""; 661 unsigned temp = 0; 662 663 /* count tds, get ep direction */ 664 list_for_each_entry(qtd, &qh->qtd_list, qtd_list) { 665 temp++; 666 switch ((hc32_to_cpu(ehci, qtd->hw_token) >> 8) & 0x03) { 667 case 0: 668 type = "out"; 669 continue; 670 case 1: 671 type = "in"; 672 continue; 673 } 674 } 675 676 return scnprintf(buf, size, " (%c%d ep%d%s [%d/%d] q%d p%d)", 677 speed_char(scratch), scratch & 0x007f, 678 (scratch >> 8) & 0x000f, type, qh->ps.usecs, 679 qh->ps.c_usecs, temp, 0x7ff & (scratch >> 16)); 680 } 681 682 #define DBG_SCHED_LIMIT 64 683 static ssize_t fill_periodic_buffer(struct debug_buffer *buf) 684 { 685 struct usb_hcd *hcd; 686 struct ehci_hcd *ehci; 687 unsigned long flags; 688 union ehci_shadow p, *seen; 689 unsigned temp, size, seen_count; 690 char *next; 691 unsigned i; 692 __hc32 tag; 693 694 seen = kmalloc_array(DBG_SCHED_LIMIT, sizeof(*seen), GFP_ATOMIC); 695 if (!seen) 696 return 0; 697 seen_count = 0; 698 699 hcd = bus_to_hcd(buf->bus); 700 ehci = hcd_to_ehci(hcd); 701 next = buf->output_buf; 702 size = buf->alloc_size; 703 704 temp = scnprintf(next, size, "size = %d\n", ehci->periodic_size); 705 size -= temp; 706 next += temp; 707 708 /* 709 * dump a snapshot of the periodic schedule. 710 * iso changes, interrupt usually doesn't. 711 */ 712 spin_lock_irqsave(&ehci->lock, flags); 713 for (i = 0; i < ehci->periodic_size; i++) { 714 p = ehci->pshadow[i]; 715 if (likely(!p.ptr)) 716 continue; 717 tag = Q_NEXT_TYPE(ehci, ehci->periodic[i]); 718 719 temp = scnprintf(next, size, "%4d: ", i); 720 size -= temp; 721 next += temp; 722 723 do { 724 struct ehci_qh_hw *hw; 725 726 switch (hc32_to_cpu(ehci, tag)) { 727 case Q_TYPE_QH: 728 hw = p.qh->hw; 729 temp = scnprintf(next, size, " qh%d-%04x/%p", 730 p.qh->ps.period, 731 hc32_to_cpup(ehci, 732 &hw->hw_info2) 733 /* uframe masks */ 734 & (QH_CMASK | QH_SMASK), 735 p.qh); 736 size -= temp; 737 next += temp; 738 /* don't repeat what follows this qh */ 739 for (temp = 0; temp < seen_count; temp++) { 740 if (seen[temp].ptr != p.ptr) 741 continue; 742 if (p.qh->qh_next.ptr) { 743 temp = scnprintf(next, size, 744 " ..."); 745 size -= temp; 746 next += temp; 747 } 748 break; 749 } 750 /* show more info the first time around */ 751 if (temp == seen_count) { 752 temp = output_buf_tds_dir(next, ehci, 753 hw, p.qh, size); 754 755 if (seen_count < DBG_SCHED_LIMIT) 756 seen[seen_count++].qh = p.qh; 757 } else { 758 temp = 0; 759 } 760 tag = Q_NEXT_TYPE(ehci, hw->hw_next); 761 p = p.qh->qh_next; 762 break; 763 case Q_TYPE_FSTN: 764 temp = scnprintf(next, size, 765 " fstn-%8x/%p", p.fstn->hw_prev, 766 p.fstn); 767 tag = Q_NEXT_TYPE(ehci, p.fstn->hw_next); 768 p = p.fstn->fstn_next; 769 break; 770 case Q_TYPE_ITD: 771 temp = scnprintf(next, size, 772 " itd/%p", p.itd); 773 tag = Q_NEXT_TYPE(ehci, p.itd->hw_next); 774 p = p.itd->itd_next; 775 break; 776 case Q_TYPE_SITD: 777 temp = scnprintf(next, size, 778 " sitd%d-%04x/%p", 779 p.sitd->stream->ps.period, 780 hc32_to_cpup(ehci, &p.sitd->hw_uframe) 781 & 0x0000ffff, 782 p.sitd); 783 tag = Q_NEXT_TYPE(ehci, p.sitd->hw_next); 784 p = p.sitd->sitd_next; 785 break; 786 } 787 size -= temp; 788 next += temp; 789 } while (p.ptr); 790 791 temp = scnprintf(next, size, "\n"); 792 size -= temp; 793 next += temp; 794 } 795 spin_unlock_irqrestore(&ehci->lock, flags); 796 kfree(seen); 797 798 return buf->alloc_size - size; 799 } 800 #undef DBG_SCHED_LIMIT 801 802 static const char *rh_state_string(struct ehci_hcd *ehci) 803 { 804 switch (ehci->rh_state) { 805 case EHCI_RH_HALTED: 806 return "halted"; 807 case EHCI_RH_SUSPENDED: 808 return "suspended"; 809 case EHCI_RH_RUNNING: 810 return "running"; 811 case EHCI_RH_STOPPING: 812 return "stopping"; 813 } 814 return "?"; 815 } 816 817 static ssize_t fill_registers_buffer(struct debug_buffer *buf) 818 { 819 struct usb_hcd *hcd; 820 struct ehci_hcd *ehci; 821 unsigned long flags; 822 unsigned temp, size, i; 823 char *next, scratch[80]; 824 static char fmt[] = "%*s\n"; 825 static char label[] = ""; 826 827 hcd = bus_to_hcd(buf->bus); 828 ehci = hcd_to_ehci(hcd); 829 next = buf->output_buf; 830 size = buf->alloc_size; 831 832 spin_lock_irqsave(&ehci->lock, flags); 833 834 if (!HCD_HW_ACCESSIBLE(hcd)) { 835 size = scnprintf(next, size, 836 "bus %s, device %s\n" 837 "%s\n" 838 "SUSPENDED (no register access)\n", 839 hcd->self.controller->bus->name, 840 dev_name(hcd->self.controller), 841 hcd->product_desc); 842 goto done; 843 } 844 845 /* Capability Registers */ 846 i = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase)); 847 temp = scnprintf(next, size, 848 "bus %s, device %s\n" 849 "%s\n" 850 "EHCI %x.%02x, rh state %s\n", 851 hcd->self.controller->bus->name, 852 dev_name(hcd->self.controller), 853 hcd->product_desc, 854 i >> 8, i & 0x0ff, rh_state_string(ehci)); 855 size -= temp; 856 next += temp; 857 858 #ifdef CONFIG_PCI 859 /* EHCI 0.96 and later may have "extended capabilities" */ 860 if (dev_is_pci(hcd->self.controller)) { 861 struct pci_dev *pdev; 862 u32 offset, cap, cap2; 863 unsigned count = 256 / 4; 864 865 pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller); 866 offset = HCC_EXT_CAPS(ehci_readl(ehci, 867 &ehci->caps->hcc_params)); 868 while (offset && count--) { 869 pci_read_config_dword(pdev, offset, &cap); 870 switch (cap & 0xff) { 871 case 1: 872 temp = scnprintf(next, size, 873 "ownership %08x%s%s\n", cap, 874 (cap & (1 << 24)) ? " linux" : "", 875 (cap & (1 << 16)) ? " firmware" : ""); 876 size -= temp; 877 next += temp; 878 879 offset += 4; 880 pci_read_config_dword(pdev, offset, &cap2); 881 temp = scnprintf(next, size, 882 "SMI sts/enable 0x%08x\n", cap2); 883 size -= temp; 884 next += temp; 885 break; 886 case 0: /* illegal reserved capability */ 887 cap = 0; 888 /* FALLTHROUGH */ 889 default: /* unknown */ 890 break; 891 } 892 temp = (cap >> 8) & 0xff; 893 } 894 } 895 #endif 896 897 /* FIXME interpret both types of params */ 898 i = ehci_readl(ehci, &ehci->caps->hcs_params); 899 temp = scnprintf(next, size, "structural params 0x%08x\n", i); 900 size -= temp; 901 next += temp; 902 903 i = ehci_readl(ehci, &ehci->caps->hcc_params); 904 temp = scnprintf(next, size, "capability params 0x%08x\n", i); 905 size -= temp; 906 next += temp; 907 908 /* Operational Registers */ 909 temp = dbg_status_buf(scratch, sizeof(scratch), label, 910 ehci_readl(ehci, &ehci->regs->status)); 911 temp = scnprintf(next, size, fmt, temp, scratch); 912 size -= temp; 913 next += temp; 914 915 temp = dbg_command_buf(scratch, sizeof(scratch), label, 916 ehci_readl(ehci, &ehci->regs->command)); 917 temp = scnprintf(next, size, fmt, temp, scratch); 918 size -= temp; 919 next += temp; 920 921 temp = dbg_intr_buf(scratch, sizeof(scratch), label, 922 ehci_readl(ehci, &ehci->regs->intr_enable)); 923 temp = scnprintf(next, size, fmt, temp, scratch); 924 size -= temp; 925 next += temp; 926 927 temp = scnprintf(next, size, "uframe %04x\n", 928 ehci_read_frame_index(ehci)); 929 size -= temp; 930 next += temp; 931 932 for (i = 1; i <= HCS_N_PORTS(ehci->hcs_params); i++) { 933 temp = dbg_port_buf(scratch, sizeof(scratch), label, i, 934 ehci_readl(ehci, 935 &ehci->regs->port_status[i - 1])); 936 temp = scnprintf(next, size, fmt, temp, scratch); 937 size -= temp; 938 next += temp; 939 if (i == HCS_DEBUG_PORT(ehci->hcs_params) && ehci->debug) { 940 temp = scnprintf(next, size, 941 " debug control %08x\n", 942 ehci_readl(ehci, 943 &ehci->debug->control)); 944 size -= temp; 945 next += temp; 946 } 947 } 948 949 if (!list_empty(&ehci->async_unlink)) { 950 temp = scnprintf(next, size, "async unlink qh %p\n", 951 list_first_entry(&ehci->async_unlink, 952 struct ehci_qh, unlink_node)); 953 size -= temp; 954 next += temp; 955 } 956 957 #ifdef EHCI_STATS 958 temp = scnprintf(next, size, 959 "irq normal %ld err %ld iaa %ld (lost %ld)\n", 960 ehci->stats.normal, ehci->stats.error, ehci->stats.iaa, 961 ehci->stats.lost_iaa); 962 size -= temp; 963 next += temp; 964 965 temp = scnprintf(next, size, "complete %ld unlink %ld\n", 966 ehci->stats.complete, ehci->stats.unlink); 967 size -= temp; 968 next += temp; 969 #endif 970 971 done: 972 spin_unlock_irqrestore(&ehci->lock, flags); 973 974 return buf->alloc_size - size; 975 } 976 977 static struct debug_buffer *alloc_buffer(struct usb_bus *bus, 978 ssize_t (*fill_func)(struct debug_buffer *)) 979 { 980 struct debug_buffer *buf; 981 982 buf = kzalloc(sizeof(*buf), GFP_KERNEL); 983 984 if (buf) { 985 buf->bus = bus; 986 buf->fill_func = fill_func; 987 mutex_init(&buf->mutex); 988 buf->alloc_size = PAGE_SIZE; 989 } 990 991 return buf; 992 } 993 994 static int fill_buffer(struct debug_buffer *buf) 995 { 996 int ret = 0; 997 998 if (!buf->output_buf) 999 buf->output_buf = vmalloc(buf->alloc_size); 1000 1001 if (!buf->output_buf) { 1002 ret = -ENOMEM; 1003 goto out; 1004 } 1005 1006 ret = buf->fill_func(buf); 1007 1008 if (ret >= 0) { 1009 buf->count = ret; 1010 ret = 0; 1011 } 1012 1013 out: 1014 return ret; 1015 } 1016 1017 static ssize_t debug_output(struct file *file, char __user *user_buf, 1018 size_t len, loff_t *offset) 1019 { 1020 struct debug_buffer *buf = file->private_data; 1021 int ret = 0; 1022 1023 mutex_lock(&buf->mutex); 1024 if (buf->count == 0) { 1025 ret = fill_buffer(buf); 1026 if (ret != 0) { 1027 mutex_unlock(&buf->mutex); 1028 goto out; 1029 } 1030 } 1031 mutex_unlock(&buf->mutex); 1032 1033 ret = simple_read_from_buffer(user_buf, len, offset, 1034 buf->output_buf, buf->count); 1035 1036 out: 1037 return ret; 1038 } 1039 1040 static int debug_close(struct inode *inode, struct file *file) 1041 { 1042 struct debug_buffer *buf = file->private_data; 1043 1044 if (buf) { 1045 vfree(buf->output_buf); 1046 kfree(buf); 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int debug_async_open(struct inode *inode, struct file *file) 1053 { 1054 file->private_data = alloc_buffer(inode->i_private, fill_async_buffer); 1055 1056 return file->private_data ? 0 : -ENOMEM; 1057 } 1058 1059 static int debug_bandwidth_open(struct inode *inode, struct file *file) 1060 { 1061 file->private_data = alloc_buffer(inode->i_private, 1062 fill_bandwidth_buffer); 1063 1064 return file->private_data ? 0 : -ENOMEM; 1065 } 1066 1067 static int debug_periodic_open(struct inode *inode, struct file *file) 1068 { 1069 struct debug_buffer *buf; 1070 1071 buf = alloc_buffer(inode->i_private, fill_periodic_buffer); 1072 if (!buf) 1073 return -ENOMEM; 1074 1075 buf->alloc_size = (sizeof(void *) == 4 ? 6 : 8) * PAGE_SIZE; 1076 file->private_data = buf; 1077 return 0; 1078 } 1079 1080 static int debug_registers_open(struct inode *inode, struct file *file) 1081 { 1082 file->private_data = alloc_buffer(inode->i_private, 1083 fill_registers_buffer); 1084 1085 return file->private_data ? 0 : -ENOMEM; 1086 } 1087 1088 static inline void create_debug_files(struct ehci_hcd *ehci) 1089 { 1090 struct usb_bus *bus = &ehci_to_hcd(ehci)->self; 1091 1092 ehci->debug_dir = debugfs_create_dir(bus->bus_name, ehci_debug_root); 1093 if (!ehci->debug_dir) 1094 return; 1095 1096 if (!debugfs_create_file("async", S_IRUGO, ehci->debug_dir, bus, 1097 &debug_async_fops)) 1098 goto file_error; 1099 1100 if (!debugfs_create_file("bandwidth", S_IRUGO, ehci->debug_dir, bus, 1101 &debug_bandwidth_fops)) 1102 goto file_error; 1103 1104 if (!debugfs_create_file("periodic", S_IRUGO, ehci->debug_dir, bus, 1105 &debug_periodic_fops)) 1106 goto file_error; 1107 1108 if (!debugfs_create_file("registers", S_IRUGO, ehci->debug_dir, bus, 1109 &debug_registers_fops)) 1110 goto file_error; 1111 1112 return; 1113 1114 file_error: 1115 debugfs_remove_recursive(ehci->debug_dir); 1116 } 1117 1118 static inline void remove_debug_files(struct ehci_hcd *ehci) 1119 { 1120 debugfs_remove_recursive(ehci->debug_dir); 1121 } 1122 1123 #endif /* CONFIG_DYNAMIC_DEBUG */ 1124