xref: /linux/drivers/usb/gadget/udc/atmel_usba_udc.c (revision e0bf6c5ca2d3281f231c5f0c9bf145e9513644de)
1 /*
2  * Driver for the Atmel USBA high speed USB device controller
3  *
4  * Copyright (C) 2005-2007 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/clk.h>
11 #include <linux/clk/at91_pmc.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/io.h>
16 #include <linux/slab.h>
17 #include <linux/device.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/list.h>
20 #include <linux/platform_device.h>
21 #include <linux/usb/ch9.h>
22 #include <linux/usb/gadget.h>
23 #include <linux/usb/atmel_usba_udc.h>
24 #include <linux/delay.h>
25 #include <linux/platform_data/atmel.h>
26 #include <linux/of.h>
27 #include <linux/of_gpio.h>
28 
29 #include <asm/gpio.h>
30 
31 #include "atmel_usba_udc.h"
32 
33 #ifdef CONFIG_USB_GADGET_DEBUG_FS
34 #include <linux/debugfs.h>
35 #include <linux/uaccess.h>
36 
37 static int queue_dbg_open(struct inode *inode, struct file *file)
38 {
39 	struct usba_ep *ep = inode->i_private;
40 	struct usba_request *req, *req_copy;
41 	struct list_head *queue_data;
42 
43 	queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
44 	if (!queue_data)
45 		return -ENOMEM;
46 	INIT_LIST_HEAD(queue_data);
47 
48 	spin_lock_irq(&ep->udc->lock);
49 	list_for_each_entry(req, &ep->queue, queue) {
50 		req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
51 		if (!req_copy)
52 			goto fail;
53 		list_add_tail(&req_copy->queue, queue_data);
54 	}
55 	spin_unlock_irq(&ep->udc->lock);
56 
57 	file->private_data = queue_data;
58 	return 0;
59 
60 fail:
61 	spin_unlock_irq(&ep->udc->lock);
62 	list_for_each_entry_safe(req, req_copy, queue_data, queue) {
63 		list_del(&req->queue);
64 		kfree(req);
65 	}
66 	kfree(queue_data);
67 	return -ENOMEM;
68 }
69 
70 /*
71  * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
72  *
73  * b: buffer address
74  * l: buffer length
75  * I/i: interrupt/no interrupt
76  * Z/z: zero/no zero
77  * S/s: short ok/short not ok
78  * s: status
79  * n: nr_packets
80  * F/f: submitted/not submitted to FIFO
81  * D/d: using/not using DMA
82  * L/l: last transaction/not last transaction
83  */
84 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
85 		size_t nbytes, loff_t *ppos)
86 {
87 	struct list_head *queue = file->private_data;
88 	struct usba_request *req, *tmp_req;
89 	size_t len, remaining, actual = 0;
90 	char tmpbuf[38];
91 
92 	if (!access_ok(VERIFY_WRITE, buf, nbytes))
93 		return -EFAULT;
94 
95 	mutex_lock(&file_inode(file)->i_mutex);
96 	list_for_each_entry_safe(req, tmp_req, queue, queue) {
97 		len = snprintf(tmpbuf, sizeof(tmpbuf),
98 				"%8p %08x %c%c%c %5d %c%c%c\n",
99 				req->req.buf, req->req.length,
100 				req->req.no_interrupt ? 'i' : 'I',
101 				req->req.zero ? 'Z' : 'z',
102 				req->req.short_not_ok ? 's' : 'S',
103 				req->req.status,
104 				req->submitted ? 'F' : 'f',
105 				req->using_dma ? 'D' : 'd',
106 				req->last_transaction ? 'L' : 'l');
107 		len = min(len, sizeof(tmpbuf));
108 		if (len > nbytes)
109 			break;
110 
111 		list_del(&req->queue);
112 		kfree(req);
113 
114 		remaining = __copy_to_user(buf, tmpbuf, len);
115 		actual += len - remaining;
116 		if (remaining)
117 			break;
118 
119 		nbytes -= len;
120 		buf += len;
121 	}
122 	mutex_unlock(&file_inode(file)->i_mutex);
123 
124 	return actual;
125 }
126 
127 static int queue_dbg_release(struct inode *inode, struct file *file)
128 {
129 	struct list_head *queue_data = file->private_data;
130 	struct usba_request *req, *tmp_req;
131 
132 	list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
133 		list_del(&req->queue);
134 		kfree(req);
135 	}
136 	kfree(queue_data);
137 	return 0;
138 }
139 
140 static int regs_dbg_open(struct inode *inode, struct file *file)
141 {
142 	struct usba_udc *udc;
143 	unsigned int i;
144 	u32 *data;
145 	int ret = -ENOMEM;
146 
147 	mutex_lock(&inode->i_mutex);
148 	udc = inode->i_private;
149 	data = kmalloc(inode->i_size, GFP_KERNEL);
150 	if (!data)
151 		goto out;
152 
153 	spin_lock_irq(&udc->lock);
154 	for (i = 0; i < inode->i_size / 4; i++)
155 		data[i] = __raw_readl(udc->regs + i * 4);
156 	spin_unlock_irq(&udc->lock);
157 
158 	file->private_data = data;
159 	ret = 0;
160 
161 out:
162 	mutex_unlock(&inode->i_mutex);
163 
164 	return ret;
165 }
166 
167 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
168 		size_t nbytes, loff_t *ppos)
169 {
170 	struct inode *inode = file_inode(file);
171 	int ret;
172 
173 	mutex_lock(&inode->i_mutex);
174 	ret = simple_read_from_buffer(buf, nbytes, ppos,
175 			file->private_data,
176 			file_inode(file)->i_size);
177 	mutex_unlock(&inode->i_mutex);
178 
179 	return ret;
180 }
181 
182 static int regs_dbg_release(struct inode *inode, struct file *file)
183 {
184 	kfree(file->private_data);
185 	return 0;
186 }
187 
188 const struct file_operations queue_dbg_fops = {
189 	.owner		= THIS_MODULE,
190 	.open		= queue_dbg_open,
191 	.llseek		= no_llseek,
192 	.read		= queue_dbg_read,
193 	.release	= queue_dbg_release,
194 };
195 
196 const struct file_operations regs_dbg_fops = {
197 	.owner		= THIS_MODULE,
198 	.open		= regs_dbg_open,
199 	.llseek		= generic_file_llseek,
200 	.read		= regs_dbg_read,
201 	.release	= regs_dbg_release,
202 };
203 
204 static void usba_ep_init_debugfs(struct usba_udc *udc,
205 		struct usba_ep *ep)
206 {
207 	struct dentry *ep_root;
208 
209 	ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
210 	if (!ep_root)
211 		goto err_root;
212 	ep->debugfs_dir = ep_root;
213 
214 	ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
215 						ep, &queue_dbg_fops);
216 	if (!ep->debugfs_queue)
217 		goto err_queue;
218 
219 	if (ep->can_dma) {
220 		ep->debugfs_dma_status
221 			= debugfs_create_u32("dma_status", 0400, ep_root,
222 					&ep->last_dma_status);
223 		if (!ep->debugfs_dma_status)
224 			goto err_dma_status;
225 	}
226 	if (ep_is_control(ep)) {
227 		ep->debugfs_state
228 			= debugfs_create_u32("state", 0400, ep_root,
229 					&ep->state);
230 		if (!ep->debugfs_state)
231 			goto err_state;
232 	}
233 
234 	return;
235 
236 err_state:
237 	if (ep->can_dma)
238 		debugfs_remove(ep->debugfs_dma_status);
239 err_dma_status:
240 	debugfs_remove(ep->debugfs_queue);
241 err_queue:
242 	debugfs_remove(ep_root);
243 err_root:
244 	dev_err(&ep->udc->pdev->dev,
245 		"failed to create debugfs directory for %s\n", ep->ep.name);
246 }
247 
248 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
249 {
250 	debugfs_remove(ep->debugfs_queue);
251 	debugfs_remove(ep->debugfs_dma_status);
252 	debugfs_remove(ep->debugfs_state);
253 	debugfs_remove(ep->debugfs_dir);
254 	ep->debugfs_dma_status = NULL;
255 	ep->debugfs_dir = NULL;
256 }
257 
258 static void usba_init_debugfs(struct usba_udc *udc)
259 {
260 	struct dentry *root, *regs;
261 	struct resource *regs_resource;
262 
263 	root = debugfs_create_dir(udc->gadget.name, NULL);
264 	if (IS_ERR(root) || !root)
265 		goto err_root;
266 	udc->debugfs_root = root;
267 
268 	regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
269 				CTRL_IOMEM_ID);
270 
271 	if (regs_resource) {
272 		regs = debugfs_create_file_size("regs", 0400, root, udc,
273 						&regs_dbg_fops,
274 						resource_size(regs_resource));
275 		if (!regs)
276 			goto err_regs;
277 		udc->debugfs_regs = regs;
278 	}
279 
280 	usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
281 
282 	return;
283 
284 err_regs:
285 	debugfs_remove(root);
286 err_root:
287 	udc->debugfs_root = NULL;
288 	dev_err(&udc->pdev->dev, "debugfs is not available\n");
289 }
290 
291 static void usba_cleanup_debugfs(struct usba_udc *udc)
292 {
293 	usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
294 	debugfs_remove(udc->debugfs_regs);
295 	debugfs_remove(udc->debugfs_root);
296 	udc->debugfs_regs = NULL;
297 	udc->debugfs_root = NULL;
298 }
299 #else
300 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
301 					 struct usba_ep *ep)
302 {
303 
304 }
305 
306 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
307 {
308 
309 }
310 
311 static inline void usba_init_debugfs(struct usba_udc *udc)
312 {
313 
314 }
315 
316 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
317 {
318 
319 }
320 #endif
321 
322 static inline u32 usba_int_enb_get(struct usba_udc *udc)
323 {
324 	return udc->int_enb_cache;
325 }
326 
327 static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
328 {
329 	usba_writel(udc, INT_ENB, val);
330 	udc->int_enb_cache = val;
331 }
332 
333 static int vbus_is_present(struct usba_udc *udc)
334 {
335 	if (gpio_is_valid(udc->vbus_pin))
336 		return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
337 
338 	/* No Vbus detection: Assume always present */
339 	return 1;
340 }
341 
342 static void toggle_bias(struct usba_udc *udc, int is_on)
343 {
344 	if (udc->errata && udc->errata->toggle_bias)
345 		udc->errata->toggle_bias(udc, is_on);
346 }
347 
348 static void generate_bias_pulse(struct usba_udc *udc)
349 {
350 	if (!udc->bias_pulse_needed)
351 		return;
352 
353 	if (udc->errata && udc->errata->pulse_bias)
354 		udc->errata->pulse_bias(udc);
355 
356 	udc->bias_pulse_needed = false;
357 }
358 
359 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
360 {
361 	unsigned int transaction_len;
362 
363 	transaction_len = req->req.length - req->req.actual;
364 	req->last_transaction = 1;
365 	if (transaction_len > ep->ep.maxpacket) {
366 		transaction_len = ep->ep.maxpacket;
367 		req->last_transaction = 0;
368 	} else if (transaction_len == ep->ep.maxpacket && req->req.zero)
369 		req->last_transaction = 0;
370 
371 	DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
372 		ep->ep.name, req, transaction_len,
373 		req->last_transaction ? ", done" : "");
374 
375 	memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
376 	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
377 	req->req.actual += transaction_len;
378 }
379 
380 static void submit_request(struct usba_ep *ep, struct usba_request *req)
381 {
382 	DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
383 		ep->ep.name, req, req->req.length);
384 
385 	req->req.actual = 0;
386 	req->submitted = 1;
387 
388 	if (req->using_dma) {
389 		if (req->req.length == 0) {
390 			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
391 			return;
392 		}
393 
394 		if (req->req.zero)
395 			usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
396 		else
397 			usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
398 
399 		usba_dma_writel(ep, ADDRESS, req->req.dma);
400 		usba_dma_writel(ep, CONTROL, req->ctrl);
401 	} else {
402 		next_fifo_transaction(ep, req);
403 		if (req->last_transaction) {
404 			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
405 			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
406 		} else {
407 			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
408 			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
409 		}
410 	}
411 }
412 
413 static void submit_next_request(struct usba_ep *ep)
414 {
415 	struct usba_request *req;
416 
417 	if (list_empty(&ep->queue)) {
418 		usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
419 		return;
420 	}
421 
422 	req = list_entry(ep->queue.next, struct usba_request, queue);
423 	if (!req->submitted)
424 		submit_request(ep, req);
425 }
426 
427 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
428 {
429 	ep->state = STATUS_STAGE_IN;
430 	usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
431 	usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
432 }
433 
434 static void receive_data(struct usba_ep *ep)
435 {
436 	struct usba_udc *udc = ep->udc;
437 	struct usba_request *req;
438 	unsigned long status;
439 	unsigned int bytecount, nr_busy;
440 	int is_complete = 0;
441 
442 	status = usba_ep_readl(ep, STA);
443 	nr_busy = USBA_BFEXT(BUSY_BANKS, status);
444 
445 	DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
446 
447 	while (nr_busy > 0) {
448 		if (list_empty(&ep->queue)) {
449 			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
450 			break;
451 		}
452 		req = list_entry(ep->queue.next,
453 				 struct usba_request, queue);
454 
455 		bytecount = USBA_BFEXT(BYTE_COUNT, status);
456 
457 		if (status & (1 << 31))
458 			is_complete = 1;
459 		if (req->req.actual + bytecount >= req->req.length) {
460 			is_complete = 1;
461 			bytecount = req->req.length - req->req.actual;
462 		}
463 
464 		memcpy_fromio(req->req.buf + req->req.actual,
465 				ep->fifo, bytecount);
466 		req->req.actual += bytecount;
467 
468 		usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
469 
470 		if (is_complete) {
471 			DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
472 			req->req.status = 0;
473 			list_del_init(&req->queue);
474 			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
475 			spin_unlock(&udc->lock);
476 			usb_gadget_giveback_request(&ep->ep, &req->req);
477 			spin_lock(&udc->lock);
478 		}
479 
480 		status = usba_ep_readl(ep, STA);
481 		nr_busy = USBA_BFEXT(BUSY_BANKS, status);
482 
483 		if (is_complete && ep_is_control(ep)) {
484 			send_status(udc, ep);
485 			break;
486 		}
487 	}
488 }
489 
490 static void
491 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
492 {
493 	struct usba_udc *udc = ep->udc;
494 
495 	WARN_ON(!list_empty(&req->queue));
496 
497 	if (req->req.status == -EINPROGRESS)
498 		req->req.status = status;
499 
500 	if (req->using_dma)
501 		usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
502 
503 	DBG(DBG_GADGET | DBG_REQ,
504 		"%s: req %p complete: status %d, actual %u\n",
505 		ep->ep.name, req, req->req.status, req->req.actual);
506 
507 	spin_unlock(&udc->lock);
508 	usb_gadget_giveback_request(&ep->ep, &req->req);
509 	spin_lock(&udc->lock);
510 }
511 
512 static void
513 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
514 {
515 	struct usba_request *req, *tmp_req;
516 
517 	list_for_each_entry_safe(req, tmp_req, list, queue) {
518 		list_del_init(&req->queue);
519 		request_complete(ep, req, status);
520 	}
521 }
522 
523 static int
524 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
525 {
526 	struct usba_ep *ep = to_usba_ep(_ep);
527 	struct usba_udc *udc = ep->udc;
528 	unsigned long flags, ept_cfg, maxpacket;
529 	unsigned int nr_trans;
530 
531 	DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
532 
533 	maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
534 
535 	if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
536 			|| ep->index == 0
537 			|| desc->bDescriptorType != USB_DT_ENDPOINT
538 			|| maxpacket == 0
539 			|| maxpacket > ep->fifo_size) {
540 		DBG(DBG_ERR, "ep_enable: Invalid argument");
541 		return -EINVAL;
542 	}
543 
544 	ep->is_isoc = 0;
545 	ep->is_in = 0;
546 
547 	if (maxpacket <= 8)
548 		ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
549 	else
550 		/* LSB is bit 1, not 0 */
551 		ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
552 
553 	DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
554 			ep->ep.name, ept_cfg, maxpacket);
555 
556 	if (usb_endpoint_dir_in(desc)) {
557 		ep->is_in = 1;
558 		ept_cfg |= USBA_EPT_DIR_IN;
559 	}
560 
561 	switch (usb_endpoint_type(desc)) {
562 	case USB_ENDPOINT_XFER_CONTROL:
563 		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
564 		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
565 		break;
566 	case USB_ENDPOINT_XFER_ISOC:
567 		if (!ep->can_isoc) {
568 			DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
569 					ep->ep.name);
570 			return -EINVAL;
571 		}
572 
573 		/*
574 		 * Bits 11:12 specify number of _additional_
575 		 * transactions per microframe.
576 		 */
577 		nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
578 		if (nr_trans > 3)
579 			return -EINVAL;
580 
581 		ep->is_isoc = 1;
582 		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
583 
584 		/*
585 		 * Do triple-buffering on high-bandwidth iso endpoints.
586 		 */
587 		if (nr_trans > 1 && ep->nr_banks == 3)
588 			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
589 		else
590 			ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
591 		ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
592 		break;
593 	case USB_ENDPOINT_XFER_BULK:
594 		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
595 		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
596 		break;
597 	case USB_ENDPOINT_XFER_INT:
598 		ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
599 		ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
600 		break;
601 	}
602 
603 	spin_lock_irqsave(&ep->udc->lock, flags);
604 
605 	ep->ep.desc = desc;
606 	ep->ep.maxpacket = maxpacket;
607 
608 	usba_ep_writel(ep, CFG, ept_cfg);
609 	usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
610 
611 	if (ep->can_dma) {
612 		u32 ctrl;
613 
614 		usba_int_enb_set(udc, usba_int_enb_get(udc) |
615 				      USBA_BF(EPT_INT, 1 << ep->index) |
616 				      USBA_BF(DMA_INT, 1 << ep->index));
617 		ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
618 		usba_ep_writel(ep, CTL_ENB, ctrl);
619 	} else {
620 		usba_int_enb_set(udc, usba_int_enb_get(udc) |
621 				      USBA_BF(EPT_INT, 1 << ep->index));
622 	}
623 
624 	spin_unlock_irqrestore(&udc->lock, flags);
625 
626 	DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
627 			(unsigned long)usba_ep_readl(ep, CFG));
628 	DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
629 			(unsigned long)usba_int_enb_get(udc));
630 
631 	return 0;
632 }
633 
634 static int usba_ep_disable(struct usb_ep *_ep)
635 {
636 	struct usba_ep *ep = to_usba_ep(_ep);
637 	struct usba_udc *udc = ep->udc;
638 	LIST_HEAD(req_list);
639 	unsigned long flags;
640 
641 	DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
642 
643 	spin_lock_irqsave(&udc->lock, flags);
644 
645 	if (!ep->ep.desc) {
646 		spin_unlock_irqrestore(&udc->lock, flags);
647 		/* REVISIT because this driver disables endpoints in
648 		 * reset_all_endpoints() before calling disconnect(),
649 		 * most gadget drivers would trigger this non-error ...
650 		 */
651 		if (udc->gadget.speed != USB_SPEED_UNKNOWN)
652 			DBG(DBG_ERR, "ep_disable: %s not enabled\n",
653 					ep->ep.name);
654 		return -EINVAL;
655 	}
656 	ep->ep.desc = NULL;
657 
658 	list_splice_init(&ep->queue, &req_list);
659 	if (ep->can_dma) {
660 		usba_dma_writel(ep, CONTROL, 0);
661 		usba_dma_writel(ep, ADDRESS, 0);
662 		usba_dma_readl(ep, STATUS);
663 	}
664 	usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
665 	usba_int_enb_set(udc, usba_int_enb_get(udc) &
666 			      ~USBA_BF(EPT_INT, 1 << ep->index));
667 
668 	request_complete_list(ep, &req_list, -ESHUTDOWN);
669 
670 	spin_unlock_irqrestore(&udc->lock, flags);
671 
672 	return 0;
673 }
674 
675 static struct usb_request *
676 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
677 {
678 	struct usba_request *req;
679 
680 	DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
681 
682 	req = kzalloc(sizeof(*req), gfp_flags);
683 	if (!req)
684 		return NULL;
685 
686 	INIT_LIST_HEAD(&req->queue);
687 
688 	return &req->req;
689 }
690 
691 static void
692 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
693 {
694 	struct usba_request *req = to_usba_req(_req);
695 
696 	DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
697 
698 	kfree(req);
699 }
700 
701 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
702 		struct usba_request *req, gfp_t gfp_flags)
703 {
704 	unsigned long flags;
705 	int ret;
706 
707 	DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
708 		ep->ep.name, req->req.length, req->req.dma,
709 		req->req.zero ? 'Z' : 'z',
710 		req->req.short_not_ok ? 'S' : 's',
711 		req->req.no_interrupt ? 'I' : 'i');
712 
713 	if (req->req.length > 0x10000) {
714 		/* Lengths from 0 to 65536 (inclusive) are supported */
715 		DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
716 		return -EINVAL;
717 	}
718 
719 	ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
720 	if (ret)
721 		return ret;
722 
723 	req->using_dma = 1;
724 	req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
725 			| USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
726 			| USBA_DMA_END_BUF_EN;
727 
728 	if (!ep->is_in)
729 		req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
730 
731 	/*
732 	 * Add this request to the queue and submit for DMA if
733 	 * possible. Check if we're still alive first -- we may have
734 	 * received a reset since last time we checked.
735 	 */
736 	ret = -ESHUTDOWN;
737 	spin_lock_irqsave(&udc->lock, flags);
738 	if (ep->ep.desc) {
739 		if (list_empty(&ep->queue))
740 			submit_request(ep, req);
741 
742 		list_add_tail(&req->queue, &ep->queue);
743 		ret = 0;
744 	}
745 	spin_unlock_irqrestore(&udc->lock, flags);
746 
747 	return ret;
748 }
749 
750 static int
751 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
752 {
753 	struct usba_request *req = to_usba_req(_req);
754 	struct usba_ep *ep = to_usba_ep(_ep);
755 	struct usba_udc *udc = ep->udc;
756 	unsigned long flags;
757 	int ret;
758 
759 	DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
760 			ep->ep.name, req, _req->length);
761 
762 	if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
763 	    !ep->ep.desc)
764 		return -ESHUTDOWN;
765 
766 	req->submitted = 0;
767 	req->using_dma = 0;
768 	req->last_transaction = 0;
769 
770 	_req->status = -EINPROGRESS;
771 	_req->actual = 0;
772 
773 	if (ep->can_dma)
774 		return queue_dma(udc, ep, req, gfp_flags);
775 
776 	/* May have received a reset since last time we checked */
777 	ret = -ESHUTDOWN;
778 	spin_lock_irqsave(&udc->lock, flags);
779 	if (ep->ep.desc) {
780 		list_add_tail(&req->queue, &ep->queue);
781 
782 		if ((!ep_is_control(ep) && ep->is_in) ||
783 			(ep_is_control(ep)
784 				&& (ep->state == DATA_STAGE_IN
785 					|| ep->state == STATUS_STAGE_IN)))
786 			usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
787 		else
788 			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
789 		ret = 0;
790 	}
791 	spin_unlock_irqrestore(&udc->lock, flags);
792 
793 	return ret;
794 }
795 
796 static void
797 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
798 {
799 	req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
800 }
801 
802 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
803 {
804 	unsigned int timeout;
805 	u32 status;
806 
807 	/*
808 	 * Stop the DMA controller. When writing both CH_EN
809 	 * and LINK to 0, the other bits are not affected.
810 	 */
811 	usba_dma_writel(ep, CONTROL, 0);
812 
813 	/* Wait for the FIFO to empty */
814 	for (timeout = 40; timeout; --timeout) {
815 		status = usba_dma_readl(ep, STATUS);
816 		if (!(status & USBA_DMA_CH_EN))
817 			break;
818 		udelay(1);
819 	}
820 
821 	if (pstatus)
822 		*pstatus = status;
823 
824 	if (timeout == 0) {
825 		dev_err(&ep->udc->pdev->dev,
826 			"%s: timed out waiting for DMA FIFO to empty\n",
827 			ep->ep.name);
828 		return -ETIMEDOUT;
829 	}
830 
831 	return 0;
832 }
833 
834 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
835 {
836 	struct usba_ep *ep = to_usba_ep(_ep);
837 	struct usba_udc *udc = ep->udc;
838 	struct usba_request *req;
839 	unsigned long flags;
840 	u32 status;
841 
842 	DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
843 			ep->ep.name, req);
844 
845 	spin_lock_irqsave(&udc->lock, flags);
846 
847 	list_for_each_entry(req, &ep->queue, queue) {
848 		if (&req->req == _req)
849 			break;
850 	}
851 
852 	if (&req->req != _req) {
853 		spin_unlock_irqrestore(&udc->lock, flags);
854 		return -EINVAL;
855 	}
856 
857 	if (req->using_dma) {
858 		/*
859 		 * If this request is currently being transferred,
860 		 * stop the DMA controller and reset the FIFO.
861 		 */
862 		if (ep->queue.next == &req->queue) {
863 			status = usba_dma_readl(ep, STATUS);
864 			if (status & USBA_DMA_CH_EN)
865 				stop_dma(ep, &status);
866 
867 #ifdef CONFIG_USB_GADGET_DEBUG_FS
868 			ep->last_dma_status = status;
869 #endif
870 
871 			usba_writel(udc, EPT_RST, 1 << ep->index);
872 
873 			usba_update_req(ep, req, status);
874 		}
875 	}
876 
877 	/*
878 	 * Errors should stop the queue from advancing until the
879 	 * completion function returns.
880 	 */
881 	list_del_init(&req->queue);
882 
883 	request_complete(ep, req, -ECONNRESET);
884 
885 	/* Process the next request if any */
886 	submit_next_request(ep);
887 	spin_unlock_irqrestore(&udc->lock, flags);
888 
889 	return 0;
890 }
891 
892 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
893 {
894 	struct usba_ep *ep = to_usba_ep(_ep);
895 	struct usba_udc *udc = ep->udc;
896 	unsigned long flags;
897 	int ret = 0;
898 
899 	DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
900 			value ? "set" : "clear");
901 
902 	if (!ep->ep.desc) {
903 		DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
904 				ep->ep.name);
905 		return -ENODEV;
906 	}
907 	if (ep->is_isoc) {
908 		DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
909 				ep->ep.name);
910 		return -ENOTTY;
911 	}
912 
913 	spin_lock_irqsave(&udc->lock, flags);
914 
915 	/*
916 	 * We can't halt IN endpoints while there are still data to be
917 	 * transferred
918 	 */
919 	if (!list_empty(&ep->queue)
920 			|| ((value && ep->is_in && (usba_ep_readl(ep, STA)
921 					& USBA_BF(BUSY_BANKS, -1L))))) {
922 		ret = -EAGAIN;
923 	} else {
924 		if (value)
925 			usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
926 		else
927 			usba_ep_writel(ep, CLR_STA,
928 					USBA_FORCE_STALL | USBA_TOGGLE_CLR);
929 		usba_ep_readl(ep, STA);
930 	}
931 
932 	spin_unlock_irqrestore(&udc->lock, flags);
933 
934 	return ret;
935 }
936 
937 static int usba_ep_fifo_status(struct usb_ep *_ep)
938 {
939 	struct usba_ep *ep = to_usba_ep(_ep);
940 
941 	return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
942 }
943 
944 static void usba_ep_fifo_flush(struct usb_ep *_ep)
945 {
946 	struct usba_ep *ep = to_usba_ep(_ep);
947 	struct usba_udc *udc = ep->udc;
948 
949 	usba_writel(udc, EPT_RST, 1 << ep->index);
950 }
951 
952 static const struct usb_ep_ops usba_ep_ops = {
953 	.enable		= usba_ep_enable,
954 	.disable	= usba_ep_disable,
955 	.alloc_request	= usba_ep_alloc_request,
956 	.free_request	= usba_ep_free_request,
957 	.queue		= usba_ep_queue,
958 	.dequeue	= usba_ep_dequeue,
959 	.set_halt	= usba_ep_set_halt,
960 	.fifo_status	= usba_ep_fifo_status,
961 	.fifo_flush	= usba_ep_fifo_flush,
962 };
963 
964 static int usba_udc_get_frame(struct usb_gadget *gadget)
965 {
966 	struct usba_udc *udc = to_usba_udc(gadget);
967 
968 	return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
969 }
970 
971 static int usba_udc_wakeup(struct usb_gadget *gadget)
972 {
973 	struct usba_udc *udc = to_usba_udc(gadget);
974 	unsigned long flags;
975 	u32 ctrl;
976 	int ret = -EINVAL;
977 
978 	spin_lock_irqsave(&udc->lock, flags);
979 	if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
980 		ctrl = usba_readl(udc, CTRL);
981 		usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
982 		ret = 0;
983 	}
984 	spin_unlock_irqrestore(&udc->lock, flags);
985 
986 	return ret;
987 }
988 
989 static int
990 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
991 {
992 	struct usba_udc *udc = to_usba_udc(gadget);
993 	unsigned long flags;
994 
995 	gadget->is_selfpowered = (is_selfpowered != 0);
996 	spin_lock_irqsave(&udc->lock, flags);
997 	if (is_selfpowered)
998 		udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
999 	else
1000 		udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1001 	spin_unlock_irqrestore(&udc->lock, flags);
1002 
1003 	return 0;
1004 }
1005 
1006 static int atmel_usba_start(struct usb_gadget *gadget,
1007 		struct usb_gadget_driver *driver);
1008 static int atmel_usba_stop(struct usb_gadget *gadget);
1009 
1010 static const struct usb_gadget_ops usba_udc_ops = {
1011 	.get_frame		= usba_udc_get_frame,
1012 	.wakeup			= usba_udc_wakeup,
1013 	.set_selfpowered	= usba_udc_set_selfpowered,
1014 	.udc_start		= atmel_usba_start,
1015 	.udc_stop		= atmel_usba_stop,
1016 };
1017 
1018 static struct usb_endpoint_descriptor usba_ep0_desc = {
1019 	.bLength = USB_DT_ENDPOINT_SIZE,
1020 	.bDescriptorType = USB_DT_ENDPOINT,
1021 	.bEndpointAddress = 0,
1022 	.bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1023 	.wMaxPacketSize = cpu_to_le16(64),
1024 	/* FIXME: I have no idea what to put here */
1025 	.bInterval = 1,
1026 };
1027 
1028 static struct usb_gadget usba_gadget_template = {
1029 	.ops		= &usba_udc_ops,
1030 	.max_speed	= USB_SPEED_HIGH,
1031 	.name		= "atmel_usba_udc",
1032 };
1033 
1034 /*
1035  * Called with interrupts disabled and udc->lock held.
1036  */
1037 static void reset_all_endpoints(struct usba_udc *udc)
1038 {
1039 	struct usba_ep *ep;
1040 	struct usba_request *req, *tmp_req;
1041 
1042 	usba_writel(udc, EPT_RST, ~0UL);
1043 
1044 	ep = to_usba_ep(udc->gadget.ep0);
1045 	list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1046 		list_del_init(&req->queue);
1047 		request_complete(ep, req, -ECONNRESET);
1048 	}
1049 
1050 	/* NOTE:  normally, the next call to the gadget driver is in
1051 	 * charge of disabling endpoints... usually disconnect().
1052 	 * The exception would be entering a high speed test mode.
1053 	 *
1054 	 * FIXME remove this code ... and retest thoroughly.
1055 	 */
1056 	list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
1057 		if (ep->ep.desc) {
1058 			spin_unlock(&udc->lock);
1059 			usba_ep_disable(&ep->ep);
1060 			spin_lock(&udc->lock);
1061 		}
1062 	}
1063 }
1064 
1065 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1066 {
1067 	struct usba_ep *ep;
1068 
1069 	if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1070 		return to_usba_ep(udc->gadget.ep0);
1071 
1072 	list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1073 		u8 bEndpointAddress;
1074 
1075 		if (!ep->ep.desc)
1076 			continue;
1077 		bEndpointAddress = ep->ep.desc->bEndpointAddress;
1078 		if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1079 			continue;
1080 		if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1081 				== (wIndex & USB_ENDPOINT_NUMBER_MASK))
1082 			return ep;
1083 	}
1084 
1085 	return NULL;
1086 }
1087 
1088 /* Called with interrupts disabled and udc->lock held */
1089 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1090 {
1091 	usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1092 	ep->state = WAIT_FOR_SETUP;
1093 }
1094 
1095 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1096 {
1097 	if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1098 		return 1;
1099 	return 0;
1100 }
1101 
1102 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1103 {
1104 	u32 regval;
1105 
1106 	DBG(DBG_BUS, "setting address %u...\n", addr);
1107 	regval = usba_readl(udc, CTRL);
1108 	regval = USBA_BFINS(DEV_ADDR, addr, regval);
1109 	usba_writel(udc, CTRL, regval);
1110 }
1111 
1112 static int do_test_mode(struct usba_udc *udc)
1113 {
1114 	static const char test_packet_buffer[] = {
1115 		/* JKJKJKJK * 9 */
1116 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1117 		/* JJKKJJKK * 8 */
1118 		0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1119 		/* JJKKJJKK * 8 */
1120 		0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1121 		/* JJJJJJJKKKKKKK * 8 */
1122 		0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1123 		0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1124 		/* JJJJJJJK * 8 */
1125 		0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1126 		/* {JKKKKKKK * 10}, JK */
1127 		0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1128 	};
1129 	struct usba_ep *ep;
1130 	struct device *dev = &udc->pdev->dev;
1131 	int test_mode;
1132 
1133 	test_mode = udc->test_mode;
1134 
1135 	/* Start from a clean slate */
1136 	reset_all_endpoints(udc);
1137 
1138 	switch (test_mode) {
1139 	case 0x0100:
1140 		/* Test_J */
1141 		usba_writel(udc, TST, USBA_TST_J_MODE);
1142 		dev_info(dev, "Entering Test_J mode...\n");
1143 		break;
1144 	case 0x0200:
1145 		/* Test_K */
1146 		usba_writel(udc, TST, USBA_TST_K_MODE);
1147 		dev_info(dev, "Entering Test_K mode...\n");
1148 		break;
1149 	case 0x0300:
1150 		/*
1151 		 * Test_SE0_NAK: Force high-speed mode and set up ep0
1152 		 * for Bulk IN transfers
1153 		 */
1154 		ep = &udc->usba_ep[0];
1155 		usba_writel(udc, TST,
1156 				USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1157 		usba_ep_writel(ep, CFG,
1158 				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1159 				| USBA_EPT_DIR_IN
1160 				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1161 				| USBA_BF(BK_NUMBER, 1));
1162 		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1163 			set_protocol_stall(udc, ep);
1164 			dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1165 		} else {
1166 			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1167 			dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1168 		}
1169 		break;
1170 	case 0x0400:
1171 		/* Test_Packet */
1172 		ep = &udc->usba_ep[0];
1173 		usba_ep_writel(ep, CFG,
1174 				USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1175 				| USBA_EPT_DIR_IN
1176 				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1177 				| USBA_BF(BK_NUMBER, 1));
1178 		if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1179 			set_protocol_stall(udc, ep);
1180 			dev_err(dev, "Test_Packet: ep0 not mapped\n");
1181 		} else {
1182 			usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1183 			usba_writel(udc, TST, USBA_TST_PKT_MODE);
1184 			memcpy_toio(ep->fifo, test_packet_buffer,
1185 					sizeof(test_packet_buffer));
1186 			usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1187 			dev_info(dev, "Entering Test_Packet mode...\n");
1188 		}
1189 		break;
1190 	default:
1191 		dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1192 		return -EINVAL;
1193 	}
1194 
1195 	return 0;
1196 }
1197 
1198 /* Avoid overly long expressions */
1199 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1200 {
1201 	if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1202 		return true;
1203 	return false;
1204 }
1205 
1206 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1207 {
1208 	if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1209 		return true;
1210 	return false;
1211 }
1212 
1213 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1214 {
1215 	if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1216 		return true;
1217 	return false;
1218 }
1219 
1220 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1221 		struct usb_ctrlrequest *crq)
1222 {
1223 	int retval = 0;
1224 
1225 	switch (crq->bRequest) {
1226 	case USB_REQ_GET_STATUS: {
1227 		u16 status;
1228 
1229 		if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1230 			status = cpu_to_le16(udc->devstatus);
1231 		} else if (crq->bRequestType
1232 				== (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1233 			status = cpu_to_le16(0);
1234 		} else if (crq->bRequestType
1235 				== (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1236 			struct usba_ep *target;
1237 
1238 			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1239 			if (!target)
1240 				goto stall;
1241 
1242 			status = 0;
1243 			if (is_stalled(udc, target))
1244 				status |= cpu_to_le16(1);
1245 		} else
1246 			goto delegate;
1247 
1248 		/* Write directly to the FIFO. No queueing is done. */
1249 		if (crq->wLength != cpu_to_le16(sizeof(status)))
1250 			goto stall;
1251 		ep->state = DATA_STAGE_IN;
1252 		__raw_writew(status, ep->fifo);
1253 		usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1254 		break;
1255 	}
1256 
1257 	case USB_REQ_CLEAR_FEATURE: {
1258 		if (crq->bRequestType == USB_RECIP_DEVICE) {
1259 			if (feature_is_dev_remote_wakeup(crq))
1260 				udc->devstatus
1261 					&= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1262 			else
1263 				/* Can't CLEAR_FEATURE TEST_MODE */
1264 				goto stall;
1265 		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1266 			struct usba_ep *target;
1267 
1268 			if (crq->wLength != cpu_to_le16(0)
1269 					|| !feature_is_ep_halt(crq))
1270 				goto stall;
1271 			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1272 			if (!target)
1273 				goto stall;
1274 
1275 			usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1276 			if (target->index != 0)
1277 				usba_ep_writel(target, CLR_STA,
1278 						USBA_TOGGLE_CLR);
1279 		} else {
1280 			goto delegate;
1281 		}
1282 
1283 		send_status(udc, ep);
1284 		break;
1285 	}
1286 
1287 	case USB_REQ_SET_FEATURE: {
1288 		if (crq->bRequestType == USB_RECIP_DEVICE) {
1289 			if (feature_is_dev_test_mode(crq)) {
1290 				send_status(udc, ep);
1291 				ep->state = STATUS_STAGE_TEST;
1292 				udc->test_mode = le16_to_cpu(crq->wIndex);
1293 				return 0;
1294 			} else if (feature_is_dev_remote_wakeup(crq)) {
1295 				udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1296 			} else {
1297 				goto stall;
1298 			}
1299 		} else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1300 			struct usba_ep *target;
1301 
1302 			if (crq->wLength != cpu_to_le16(0)
1303 					|| !feature_is_ep_halt(crq))
1304 				goto stall;
1305 
1306 			target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1307 			if (!target)
1308 				goto stall;
1309 
1310 			usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1311 		} else
1312 			goto delegate;
1313 
1314 		send_status(udc, ep);
1315 		break;
1316 	}
1317 
1318 	case USB_REQ_SET_ADDRESS:
1319 		if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1320 			goto delegate;
1321 
1322 		set_address(udc, le16_to_cpu(crq->wValue));
1323 		send_status(udc, ep);
1324 		ep->state = STATUS_STAGE_ADDR;
1325 		break;
1326 
1327 	default:
1328 delegate:
1329 		spin_unlock(&udc->lock);
1330 		retval = udc->driver->setup(&udc->gadget, crq);
1331 		spin_lock(&udc->lock);
1332 	}
1333 
1334 	return retval;
1335 
1336 stall:
1337 	pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1338 		"halting endpoint...\n",
1339 		ep->ep.name, crq->bRequestType, crq->bRequest,
1340 		le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1341 		le16_to_cpu(crq->wLength));
1342 	set_protocol_stall(udc, ep);
1343 	return -1;
1344 }
1345 
1346 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1347 {
1348 	struct usba_request *req;
1349 	u32 epstatus;
1350 	u32 epctrl;
1351 
1352 restart:
1353 	epstatus = usba_ep_readl(ep, STA);
1354 	epctrl = usba_ep_readl(ep, CTL);
1355 
1356 	DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1357 			ep->ep.name, ep->state, epstatus, epctrl);
1358 
1359 	req = NULL;
1360 	if (!list_empty(&ep->queue))
1361 		req = list_entry(ep->queue.next,
1362 				 struct usba_request, queue);
1363 
1364 	if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1365 		if (req->submitted)
1366 			next_fifo_transaction(ep, req);
1367 		else
1368 			submit_request(ep, req);
1369 
1370 		if (req->last_transaction) {
1371 			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1372 			usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1373 		}
1374 		goto restart;
1375 	}
1376 	if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1377 		usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1378 
1379 		switch (ep->state) {
1380 		case DATA_STAGE_IN:
1381 			usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1382 			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1383 			ep->state = STATUS_STAGE_OUT;
1384 			break;
1385 		case STATUS_STAGE_ADDR:
1386 			/* Activate our new address */
1387 			usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1388 						| USBA_FADDR_EN));
1389 			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1390 			ep->state = WAIT_FOR_SETUP;
1391 			break;
1392 		case STATUS_STAGE_IN:
1393 			if (req) {
1394 				list_del_init(&req->queue);
1395 				request_complete(ep, req, 0);
1396 				submit_next_request(ep);
1397 			}
1398 			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1399 			ep->state = WAIT_FOR_SETUP;
1400 			break;
1401 		case STATUS_STAGE_TEST:
1402 			usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1403 			ep->state = WAIT_FOR_SETUP;
1404 			if (do_test_mode(udc))
1405 				set_protocol_stall(udc, ep);
1406 			break;
1407 		default:
1408 			pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1409 				"halting endpoint...\n",
1410 				ep->ep.name, ep->state);
1411 			set_protocol_stall(udc, ep);
1412 			break;
1413 		}
1414 
1415 		goto restart;
1416 	}
1417 	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1418 		switch (ep->state) {
1419 		case STATUS_STAGE_OUT:
1420 			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1421 			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1422 
1423 			if (req) {
1424 				list_del_init(&req->queue);
1425 				request_complete(ep, req, 0);
1426 			}
1427 			ep->state = WAIT_FOR_SETUP;
1428 			break;
1429 
1430 		case DATA_STAGE_OUT:
1431 			receive_data(ep);
1432 			break;
1433 
1434 		default:
1435 			usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1436 			usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1437 			pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1438 				"halting endpoint...\n",
1439 				ep->ep.name, ep->state);
1440 			set_protocol_stall(udc, ep);
1441 			break;
1442 		}
1443 
1444 		goto restart;
1445 	}
1446 	if (epstatus & USBA_RX_SETUP) {
1447 		union {
1448 			struct usb_ctrlrequest crq;
1449 			unsigned long data[2];
1450 		} crq;
1451 		unsigned int pkt_len;
1452 		int ret;
1453 
1454 		if (ep->state != WAIT_FOR_SETUP) {
1455 			/*
1456 			 * Didn't expect a SETUP packet at this
1457 			 * point. Clean up any pending requests (which
1458 			 * may be successful).
1459 			 */
1460 			int status = -EPROTO;
1461 
1462 			/*
1463 			 * RXRDY and TXCOMP are dropped when SETUP
1464 			 * packets arrive.  Just pretend we received
1465 			 * the status packet.
1466 			 */
1467 			if (ep->state == STATUS_STAGE_OUT
1468 					|| ep->state == STATUS_STAGE_IN) {
1469 				usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1470 				status = 0;
1471 			}
1472 
1473 			if (req) {
1474 				list_del_init(&req->queue);
1475 				request_complete(ep, req, status);
1476 			}
1477 		}
1478 
1479 		pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1480 		DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1481 		if (pkt_len != sizeof(crq)) {
1482 			pr_warning("udc: Invalid packet length %u "
1483 				"(expected %zu)\n", pkt_len, sizeof(crq));
1484 			set_protocol_stall(udc, ep);
1485 			return;
1486 		}
1487 
1488 		DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1489 		memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1490 
1491 		/* Free up one bank in the FIFO so that we can
1492 		 * generate or receive a reply right away. */
1493 		usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1494 
1495 		/* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1496 			ep->state, crq.crq.bRequestType,
1497 			crq.crq.bRequest); */
1498 
1499 		if (crq.crq.bRequestType & USB_DIR_IN) {
1500 			/*
1501 			 * The USB 2.0 spec states that "if wLength is
1502 			 * zero, there is no data transfer phase."
1503 			 * However, testusb #14 seems to actually
1504 			 * expect a data phase even if wLength = 0...
1505 			 */
1506 			ep->state = DATA_STAGE_IN;
1507 		} else {
1508 			if (crq.crq.wLength != cpu_to_le16(0))
1509 				ep->state = DATA_STAGE_OUT;
1510 			else
1511 				ep->state = STATUS_STAGE_IN;
1512 		}
1513 
1514 		ret = -1;
1515 		if (ep->index == 0)
1516 			ret = handle_ep0_setup(udc, ep, &crq.crq);
1517 		else {
1518 			spin_unlock(&udc->lock);
1519 			ret = udc->driver->setup(&udc->gadget, &crq.crq);
1520 			spin_lock(&udc->lock);
1521 		}
1522 
1523 		DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1524 			crq.crq.bRequestType, crq.crq.bRequest,
1525 			le16_to_cpu(crq.crq.wLength), ep->state, ret);
1526 
1527 		if (ret < 0) {
1528 			/* Let the host know that we failed */
1529 			set_protocol_stall(udc, ep);
1530 		}
1531 	}
1532 }
1533 
1534 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1535 {
1536 	struct usba_request *req;
1537 	u32 epstatus;
1538 	u32 epctrl;
1539 
1540 	epstatus = usba_ep_readl(ep, STA);
1541 	epctrl = usba_ep_readl(ep, CTL);
1542 
1543 	DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1544 
1545 	while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1546 		DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1547 
1548 		if (list_empty(&ep->queue)) {
1549 			dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1550 			usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1551 			return;
1552 		}
1553 
1554 		req = list_entry(ep->queue.next, struct usba_request, queue);
1555 
1556 		if (req->using_dma) {
1557 			/* Send a zero-length packet */
1558 			usba_ep_writel(ep, SET_STA,
1559 					USBA_TX_PK_RDY);
1560 			usba_ep_writel(ep, CTL_DIS,
1561 					USBA_TX_PK_RDY);
1562 			list_del_init(&req->queue);
1563 			submit_next_request(ep);
1564 			request_complete(ep, req, 0);
1565 		} else {
1566 			if (req->submitted)
1567 				next_fifo_transaction(ep, req);
1568 			else
1569 				submit_request(ep, req);
1570 
1571 			if (req->last_transaction) {
1572 				list_del_init(&req->queue);
1573 				submit_next_request(ep);
1574 				request_complete(ep, req, 0);
1575 			}
1576 		}
1577 
1578 		epstatus = usba_ep_readl(ep, STA);
1579 		epctrl = usba_ep_readl(ep, CTL);
1580 	}
1581 	if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1582 		DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1583 		receive_data(ep);
1584 	}
1585 }
1586 
1587 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1588 {
1589 	struct usba_request *req;
1590 	u32 status, control, pending;
1591 
1592 	status = usba_dma_readl(ep, STATUS);
1593 	control = usba_dma_readl(ep, CONTROL);
1594 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1595 	ep->last_dma_status = status;
1596 #endif
1597 	pending = status & control;
1598 	DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1599 
1600 	if (status & USBA_DMA_CH_EN) {
1601 		dev_err(&udc->pdev->dev,
1602 			"DMA_CH_EN is set after transfer is finished!\n");
1603 		dev_err(&udc->pdev->dev,
1604 			"status=%#08x, pending=%#08x, control=%#08x\n",
1605 			status, pending, control);
1606 
1607 		/*
1608 		 * try to pretend nothing happened. We might have to
1609 		 * do something here...
1610 		 */
1611 	}
1612 
1613 	if (list_empty(&ep->queue))
1614 		/* Might happen if a reset comes along at the right moment */
1615 		return;
1616 
1617 	if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1618 		req = list_entry(ep->queue.next, struct usba_request, queue);
1619 		usba_update_req(ep, req, status);
1620 
1621 		list_del_init(&req->queue);
1622 		submit_next_request(ep);
1623 		request_complete(ep, req, 0);
1624 	}
1625 }
1626 
1627 static irqreturn_t usba_udc_irq(int irq, void *devid)
1628 {
1629 	struct usba_udc *udc = devid;
1630 	u32 status, int_enb;
1631 	u32 dma_status;
1632 	u32 ep_status;
1633 
1634 	spin_lock(&udc->lock);
1635 
1636 	int_enb = usba_int_enb_get(udc);
1637 	status = usba_readl(udc, INT_STA) & int_enb;
1638 	DBG(DBG_INT, "irq, status=%#08x\n", status);
1639 
1640 	if (status & USBA_DET_SUSPEND) {
1641 		toggle_bias(udc, 0);
1642 		usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1643 		usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
1644 		udc->bias_pulse_needed = true;
1645 		DBG(DBG_BUS, "Suspend detected\n");
1646 		if (udc->gadget.speed != USB_SPEED_UNKNOWN
1647 				&& udc->driver && udc->driver->suspend) {
1648 			spin_unlock(&udc->lock);
1649 			udc->driver->suspend(&udc->gadget);
1650 			spin_lock(&udc->lock);
1651 		}
1652 	}
1653 
1654 	if (status & USBA_WAKE_UP) {
1655 		toggle_bias(udc, 1);
1656 		usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1657 		usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
1658 		DBG(DBG_BUS, "Wake Up CPU detected\n");
1659 	}
1660 
1661 	if (status & USBA_END_OF_RESUME) {
1662 		usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1663 		generate_bias_pulse(udc);
1664 		DBG(DBG_BUS, "Resume detected\n");
1665 		if (udc->gadget.speed != USB_SPEED_UNKNOWN
1666 				&& udc->driver && udc->driver->resume) {
1667 			spin_unlock(&udc->lock);
1668 			udc->driver->resume(&udc->gadget);
1669 			spin_lock(&udc->lock);
1670 		}
1671 	}
1672 
1673 	dma_status = USBA_BFEXT(DMA_INT, status);
1674 	if (dma_status) {
1675 		int i;
1676 
1677 		for (i = 1; i <= USBA_NR_DMAS; i++)
1678 			if (dma_status & (1 << i))
1679 				usba_dma_irq(udc, &udc->usba_ep[i]);
1680 	}
1681 
1682 	ep_status = USBA_BFEXT(EPT_INT, status);
1683 	if (ep_status) {
1684 		int i;
1685 
1686 		for (i = 0; i < udc->num_ep; i++)
1687 			if (ep_status & (1 << i)) {
1688 				if (ep_is_control(&udc->usba_ep[i]))
1689 					usba_control_irq(udc, &udc->usba_ep[i]);
1690 				else
1691 					usba_ep_irq(udc, &udc->usba_ep[i]);
1692 			}
1693 	}
1694 
1695 	if (status & USBA_END_OF_RESET) {
1696 		struct usba_ep *ep0;
1697 
1698 		usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1699 		generate_bias_pulse(udc);
1700 		reset_all_endpoints(udc);
1701 
1702 		if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
1703 			udc->gadget.speed = USB_SPEED_UNKNOWN;
1704 			spin_unlock(&udc->lock);
1705 			usb_gadget_udc_reset(&udc->gadget, udc->driver);
1706 			spin_lock(&udc->lock);
1707 		}
1708 
1709 		if (status & USBA_HIGH_SPEED)
1710 			udc->gadget.speed = USB_SPEED_HIGH;
1711 		else
1712 			udc->gadget.speed = USB_SPEED_FULL;
1713 		DBG(DBG_BUS, "%s bus reset detected\n",
1714 		    usb_speed_string(udc->gadget.speed));
1715 
1716 		ep0 = &udc->usba_ep[0];
1717 		ep0->ep.desc = &usba_ep0_desc;
1718 		ep0->state = WAIT_FOR_SETUP;
1719 		usba_ep_writel(ep0, CFG,
1720 				(USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1721 				| USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1722 				| USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1723 		usba_ep_writel(ep0, CTL_ENB,
1724 				USBA_EPT_ENABLE | USBA_RX_SETUP);
1725 		usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1726 				      USBA_DET_SUSPEND | USBA_END_OF_RESUME);
1727 
1728 		/*
1729 		 * Unclear why we hit this irregularly, e.g. in usbtest,
1730 		 * but it's clearly harmless...
1731 		 */
1732 		if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1733 			dev_dbg(&udc->pdev->dev,
1734 				 "ODD: EP0 configuration is invalid!\n");
1735 	}
1736 
1737 	spin_unlock(&udc->lock);
1738 
1739 	return IRQ_HANDLED;
1740 }
1741 
1742 static irqreturn_t usba_vbus_irq(int irq, void *devid)
1743 {
1744 	struct usba_udc *udc = devid;
1745 	int vbus;
1746 
1747 	/* debounce */
1748 	udelay(10);
1749 
1750 	spin_lock(&udc->lock);
1751 
1752 	/* May happen if Vbus pin toggles during probe() */
1753 	if (!udc->driver)
1754 		goto out;
1755 
1756 	vbus = vbus_is_present(udc);
1757 	if (vbus != udc->vbus_prev) {
1758 		if (vbus) {
1759 			toggle_bias(udc, 1);
1760 			usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1761 			usba_int_enb_set(udc, USBA_END_OF_RESET);
1762 		} else {
1763 			udc->gadget.speed = USB_SPEED_UNKNOWN;
1764 			reset_all_endpoints(udc);
1765 			toggle_bias(udc, 0);
1766 			usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1767 			if (udc->driver->disconnect) {
1768 				spin_unlock(&udc->lock);
1769 				udc->driver->disconnect(&udc->gadget);
1770 				spin_lock(&udc->lock);
1771 			}
1772 		}
1773 		udc->vbus_prev = vbus;
1774 	}
1775 
1776 out:
1777 	spin_unlock(&udc->lock);
1778 
1779 	return IRQ_HANDLED;
1780 }
1781 
1782 static int atmel_usba_start(struct usb_gadget *gadget,
1783 		struct usb_gadget_driver *driver)
1784 {
1785 	int ret;
1786 	struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1787 	unsigned long flags;
1788 
1789 	spin_lock_irqsave(&udc->lock, flags);
1790 
1791 	udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1792 	udc->driver = driver;
1793 	spin_unlock_irqrestore(&udc->lock, flags);
1794 
1795 	ret = clk_prepare_enable(udc->pclk);
1796 	if (ret)
1797 		return ret;
1798 	ret = clk_prepare_enable(udc->hclk);
1799 	if (ret) {
1800 		clk_disable_unprepare(udc->pclk);
1801 		return ret;
1802 	}
1803 
1804 	udc->vbus_prev = 0;
1805 	if (gpio_is_valid(udc->vbus_pin))
1806 		enable_irq(gpio_to_irq(udc->vbus_pin));
1807 
1808 	/* If Vbus is present, enable the controller and wait for reset */
1809 	spin_lock_irqsave(&udc->lock, flags);
1810 	if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1811 		toggle_bias(udc, 1);
1812 		usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1813 		usba_int_enb_set(udc, USBA_END_OF_RESET);
1814 	}
1815 	spin_unlock_irqrestore(&udc->lock, flags);
1816 
1817 	return 0;
1818 }
1819 
1820 static int atmel_usba_stop(struct usb_gadget *gadget)
1821 {
1822 	struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
1823 	unsigned long flags;
1824 
1825 	if (gpio_is_valid(udc->vbus_pin))
1826 		disable_irq(gpio_to_irq(udc->vbus_pin));
1827 
1828 	spin_lock_irqsave(&udc->lock, flags);
1829 	udc->gadget.speed = USB_SPEED_UNKNOWN;
1830 	reset_all_endpoints(udc);
1831 	spin_unlock_irqrestore(&udc->lock, flags);
1832 
1833 	/* This will also disable the DP pullup */
1834 	toggle_bias(udc, 0);
1835 	usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1836 
1837 	clk_disable_unprepare(udc->hclk);
1838 	clk_disable_unprepare(udc->pclk);
1839 
1840 	udc->driver = NULL;
1841 
1842 	return 0;
1843 }
1844 
1845 #ifdef CONFIG_OF
1846 static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
1847 {
1848 	unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
1849 
1850 	if (is_on)
1851 		at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
1852 	else
1853 		at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
1854 }
1855 
1856 static void at91sam9g45_pulse_bias(struct usba_udc *udc)
1857 {
1858 	unsigned int uckr = at91_pmc_read(AT91_CKGR_UCKR);
1859 
1860 	at91_pmc_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
1861 	at91_pmc_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
1862 }
1863 
1864 static const struct usba_udc_errata at91sam9rl_errata = {
1865 	.toggle_bias = at91sam9rl_toggle_bias,
1866 };
1867 
1868 static const struct usba_udc_errata at91sam9g45_errata = {
1869 	.pulse_bias = at91sam9g45_pulse_bias,
1870 };
1871 
1872 static const struct of_device_id atmel_udc_dt_ids[] = {
1873 	{ .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
1874 	{ .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
1875 	{ .compatible = "atmel,sama5d3-udc" },
1876 	{ /* sentinel */ }
1877 };
1878 
1879 MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
1880 
1881 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1882 						    struct usba_udc *udc)
1883 {
1884 	u32 val;
1885 	const char *name;
1886 	enum of_gpio_flags flags;
1887 	struct device_node *np = pdev->dev.of_node;
1888 	const struct of_device_id *match;
1889 	struct device_node *pp;
1890 	int i, ret;
1891 	struct usba_ep *eps, *ep;
1892 
1893 	match = of_match_node(atmel_udc_dt_ids, np);
1894 	if (!match)
1895 		return ERR_PTR(-EINVAL);
1896 
1897 	udc->errata = match->data;
1898 
1899 	udc->num_ep = 0;
1900 
1901 	udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
1902 						&flags);
1903 	udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
1904 
1905 	pp = NULL;
1906 	while ((pp = of_get_next_child(np, pp)))
1907 		udc->num_ep++;
1908 
1909 	eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
1910 			   GFP_KERNEL);
1911 	if (!eps)
1912 		return ERR_PTR(-ENOMEM);
1913 
1914 	udc->gadget.ep0 = &eps[0].ep;
1915 
1916 	INIT_LIST_HEAD(&eps[0].ep.ep_list);
1917 
1918 	pp = NULL;
1919 	i = 0;
1920 	while ((pp = of_get_next_child(np, pp))) {
1921 		ep = &eps[i];
1922 
1923 		ret = of_property_read_u32(pp, "reg", &val);
1924 		if (ret) {
1925 			dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
1926 			goto err;
1927 		}
1928 		ep->index = val;
1929 
1930 		ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
1931 		if (ret) {
1932 			dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
1933 			goto err;
1934 		}
1935 		ep->fifo_size = val;
1936 
1937 		ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
1938 		if (ret) {
1939 			dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
1940 			goto err;
1941 		}
1942 		ep->nr_banks = val;
1943 
1944 		ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
1945 		ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
1946 
1947 		ret = of_property_read_string(pp, "name", &name);
1948 		ep->ep.name = name;
1949 
1950 		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1951 		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1952 		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1953 		ep->ep.ops = &usba_ep_ops;
1954 		usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
1955 		ep->udc = udc;
1956 		INIT_LIST_HEAD(&ep->queue);
1957 
1958 		if (i)
1959 			list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1960 
1961 		i++;
1962 	}
1963 
1964 	if (i == 0) {
1965 		dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
1966 		ret = -EINVAL;
1967 		goto err;
1968 	}
1969 
1970 	return eps;
1971 err:
1972 	return ERR_PTR(ret);
1973 }
1974 #else
1975 static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1976 						    struct usba_udc *udc)
1977 {
1978 	return ERR_PTR(-ENOSYS);
1979 }
1980 #endif
1981 
1982 static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
1983 						 struct usba_udc *udc)
1984 {
1985 	struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
1986 	struct usba_ep *eps;
1987 	int i;
1988 
1989 	if (!pdata)
1990 		return ERR_PTR(-ENXIO);
1991 
1992 	eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
1993 			   GFP_KERNEL);
1994 	if (!eps)
1995 		return ERR_PTR(-ENOMEM);
1996 
1997 	udc->gadget.ep0 = &eps[0].ep;
1998 
1999 	udc->vbus_pin = pdata->vbus_pin;
2000 	udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2001 	udc->num_ep = pdata->num_ep;
2002 
2003 	INIT_LIST_HEAD(&eps[0].ep.ep_list);
2004 
2005 	for (i = 0; i < pdata->num_ep; i++) {
2006 		struct usba_ep *ep = &eps[i];
2007 
2008 		ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2009 		ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2010 		ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2011 		ep->ep.ops = &usba_ep_ops;
2012 		ep->ep.name = pdata->ep[i].name;
2013 		ep->fifo_size = pdata->ep[i].fifo_size;
2014 		usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
2015 		ep->udc = udc;
2016 		INIT_LIST_HEAD(&ep->queue);
2017 		ep->nr_banks = pdata->ep[i].nr_banks;
2018 		ep->index = pdata->ep[i].index;
2019 		ep->can_dma = pdata->ep[i].can_dma;
2020 		ep->can_isoc = pdata->ep[i].can_isoc;
2021 
2022 		if (i)
2023 			list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2024 	}
2025 
2026 	return eps;
2027 }
2028 
2029 static int usba_udc_probe(struct platform_device *pdev)
2030 {
2031 	struct resource *regs, *fifo;
2032 	struct clk *pclk, *hclk;
2033 	struct usba_udc *udc;
2034 	int irq, ret, i;
2035 
2036 	udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2037 	if (!udc)
2038 		return -ENOMEM;
2039 
2040 	udc->gadget = usba_gadget_template;
2041 	INIT_LIST_HEAD(&udc->gadget.ep_list);
2042 
2043 	regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2044 	fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
2045 	if (!regs || !fifo)
2046 		return -ENXIO;
2047 
2048 	irq = platform_get_irq(pdev, 0);
2049 	if (irq < 0)
2050 		return irq;
2051 
2052 	pclk = devm_clk_get(&pdev->dev, "pclk");
2053 	if (IS_ERR(pclk))
2054 		return PTR_ERR(pclk);
2055 	hclk = devm_clk_get(&pdev->dev, "hclk");
2056 	if (IS_ERR(hclk))
2057 		return PTR_ERR(hclk);
2058 
2059 	spin_lock_init(&udc->lock);
2060 	udc->pdev = pdev;
2061 	udc->pclk = pclk;
2062 	udc->hclk = hclk;
2063 	udc->vbus_pin = -ENODEV;
2064 
2065 	ret = -ENOMEM;
2066 	udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
2067 	if (!udc->regs) {
2068 		dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
2069 		return ret;
2070 	}
2071 	dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
2072 		 (unsigned long)regs->start, udc->regs);
2073 	udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
2074 	if (!udc->fifo) {
2075 		dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
2076 		return ret;
2077 	}
2078 	dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
2079 		 (unsigned long)fifo->start, udc->fifo);
2080 
2081 	platform_set_drvdata(pdev, udc);
2082 
2083 	/* Make sure we start from a clean slate */
2084 	ret = clk_prepare_enable(pclk);
2085 	if (ret) {
2086 		dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
2087 		return ret;
2088 	}
2089 
2090 	usba_writel(udc, CTRL, USBA_DISABLE_MASK);
2091 	clk_disable_unprepare(pclk);
2092 
2093 	if (pdev->dev.of_node)
2094 		udc->usba_ep = atmel_udc_of_init(pdev, udc);
2095 	else
2096 		udc->usba_ep = usba_udc_pdata(pdev, udc);
2097 
2098 	toggle_bias(udc, 0);
2099 
2100 	if (IS_ERR(udc->usba_ep))
2101 		return PTR_ERR(udc->usba_ep);
2102 
2103 	ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2104 				"atmel_usba_udc", udc);
2105 	if (ret) {
2106 		dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2107 			irq, ret);
2108 		return ret;
2109 	}
2110 	udc->irq = irq;
2111 
2112 	if (gpio_is_valid(udc->vbus_pin)) {
2113 		if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
2114 			ret = devm_request_irq(&pdev->dev,
2115 					gpio_to_irq(udc->vbus_pin),
2116 					usba_vbus_irq, 0,
2117 					"atmel_usba_udc", udc);
2118 			if (ret) {
2119 				udc->vbus_pin = -ENODEV;
2120 				dev_warn(&udc->pdev->dev,
2121 					 "failed to request vbus irq; "
2122 					 "assuming always on\n");
2123 			} else {
2124 				disable_irq(gpio_to_irq(udc->vbus_pin));
2125 			}
2126 		} else {
2127 			/* gpio_request fail so use -EINVAL for gpio_is_valid */
2128 			udc->vbus_pin = -EINVAL;
2129 		}
2130 	}
2131 
2132 	ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2133 	if (ret)
2134 		return ret;
2135 
2136 	usba_init_debugfs(udc);
2137 	for (i = 1; i < udc->num_ep; i++)
2138 		usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
2139 
2140 	return 0;
2141 }
2142 
2143 static int __exit usba_udc_remove(struct platform_device *pdev)
2144 {
2145 	struct usba_udc *udc;
2146 	int i;
2147 
2148 	udc = platform_get_drvdata(pdev);
2149 
2150 	usb_del_gadget_udc(&udc->gadget);
2151 
2152 	for (i = 1; i < udc->num_ep; i++)
2153 		usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
2154 	usba_cleanup_debugfs(udc);
2155 
2156 	return 0;
2157 }
2158 
2159 static struct platform_driver udc_driver = {
2160 	.remove		= __exit_p(usba_udc_remove),
2161 	.driver		= {
2162 		.name		= "atmel_usba_udc",
2163 		.of_match_table	= of_match_ptr(atmel_udc_dt_ids),
2164 	},
2165 };
2166 
2167 module_platform_driver_probe(udc_driver, usba_udc_probe);
2168 
2169 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2170 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2171 MODULE_LICENSE("GPL");
2172 MODULE_ALIAS("platform:atmel_usba_udc");
2173