xref: /linux/drivers/usb/early/ehci-dbgp.c (revision e58e871becec2d3b04ed91c0c16fe8deac9c9dfa)
1 /*
2  * Standalone EHCI usb debug driver
3  *
4  * Originally written by:
5  *  Eric W. Biederman" <ebiederm@xmission.com> and
6  *  Yinghai Lu <yhlu.kernel@gmail.com>
7  *
8  * Changes for early/late printk and HW errata:
9  *  Jason Wessel <jason.wessel@windriver.com>
10  *  Copyright (C) 2009 Wind River Systems, Inc.
11  *
12  */
13 
14 #include <linux/console.h>
15 #include <linux/errno.h>
16 #include <linux/init.h>
17 #include <linux/pci_regs.h>
18 #include <linux/pci_ids.h>
19 #include <linux/usb/ch9.h>
20 #include <linux/usb/ehci_def.h>
21 #include <linux/delay.h>
22 #include <linux/serial_core.h>
23 #include <linux/kgdb.h>
24 #include <linux/kthread.h>
25 #include <asm/io.h>
26 #include <asm/pci-direct.h>
27 #include <asm/fixmap.h>
28 
29 /* The code here is intended to talk directly to the EHCI debug port
30  * and does not require that you have any kind of USB host controller
31  * drivers or USB device drivers compiled into the kernel.
32  *
33  * If you make a change to anything in here, the following test cases
34  * need to pass where a USB debug device works in the following
35  * configurations.
36  *
37  * 1. boot args:  earlyprintk=dbgp
38  *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
39  *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
40  * 2. boot args: earlyprintk=dbgp,keep
41  *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
42  *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
43  * 3. boot args: earlyprintk=dbgp console=ttyUSB0
44  *     o kernel has CONFIG_USB_EHCI_HCD=y and
45  *       CONFIG_USB_SERIAL_DEBUG=y
46  * 4. boot args: earlyprintk=vga,dbgp
47  *     o kernel compiled with # CONFIG_USB_EHCI_HCD is not set
48  *     o kernel compiled with CONFIG_USB_EHCI_HCD=y
49  *
50  * For the 4th configuration you can turn on or off the DBGP_DEBUG
51  * such that you can debug the dbgp device's driver code.
52  */
53 
54 static int dbgp_phys_port = 1;
55 
56 static struct ehci_caps __iomem *ehci_caps;
57 static struct ehci_regs __iomem *ehci_regs;
58 static struct ehci_dbg_port __iomem *ehci_debug;
59 static int dbgp_not_safe; /* Cannot use debug device during ehci reset */
60 static unsigned int dbgp_endpoint_out;
61 static unsigned int dbgp_endpoint_in;
62 
63 struct ehci_dev {
64 	u32 bus;
65 	u32 slot;
66 	u32 func;
67 };
68 
69 static struct ehci_dev ehci_dev;
70 
71 #define USB_DEBUG_DEVNUM 127
72 
73 #ifdef DBGP_DEBUG
74 #define dbgp_printk printk
75 static void dbgp_ehci_status(char *str)
76 {
77 	if (!ehci_debug)
78 		return;
79 	dbgp_printk("dbgp: %s\n", str);
80 	dbgp_printk("  Debug control: %08x", readl(&ehci_debug->control));
81 	dbgp_printk("  ehci cmd     : %08x", readl(&ehci_regs->command));
82 	dbgp_printk("  ehci conf flg: %08x\n",
83 		    readl(&ehci_regs->configured_flag));
84 	dbgp_printk("  ehci status  : %08x", readl(&ehci_regs->status));
85 	dbgp_printk("  ehci portsc  : %08x\n",
86 		    readl(&ehci_regs->port_status[dbgp_phys_port - 1]));
87 }
88 #else
89 static inline void dbgp_ehci_status(char *str) { }
90 static inline void dbgp_printk(const char *fmt, ...) { }
91 #endif
92 
93 static inline u32 dbgp_len_update(u32 x, u32 len)
94 {
95 	return (x & ~0x0f) | (len & 0x0f);
96 }
97 
98 #ifdef CONFIG_KGDB
99 static struct kgdb_io kgdbdbgp_io_ops;
100 #define dbgp_kgdb_mode (dbg_io_ops == &kgdbdbgp_io_ops)
101 #else
102 #define dbgp_kgdb_mode (0)
103 #endif
104 
105 /* Local version of HC_LENGTH macro as ehci struct is not available here */
106 #define EARLY_HC_LENGTH(p)	(0x00ff & (p)) /* bits 7 : 0 */
107 
108 /*
109  * USB Packet IDs (PIDs)
110  */
111 
112 /* token */
113 #define USB_PID_OUT		0xe1
114 #define USB_PID_IN		0x69
115 #define USB_PID_SOF		0xa5
116 #define USB_PID_SETUP		0x2d
117 /* handshake */
118 #define USB_PID_ACK		0xd2
119 #define USB_PID_NAK		0x5a
120 #define USB_PID_STALL		0x1e
121 #define USB_PID_NYET		0x96
122 /* data */
123 #define USB_PID_DATA0		0xc3
124 #define USB_PID_DATA1		0x4b
125 #define USB_PID_DATA2		0x87
126 #define USB_PID_MDATA		0x0f
127 /* Special */
128 #define USB_PID_PREAMBLE	0x3c
129 #define USB_PID_ERR		0x3c
130 #define USB_PID_SPLIT		0x78
131 #define USB_PID_PING		0xb4
132 #define USB_PID_UNDEF_0		0xf0
133 
134 #define USB_PID_DATA_TOGGLE	0x88
135 #define DBGP_CLAIM (DBGP_OWNER | DBGP_ENABLED | DBGP_INUSE)
136 
137 #define PCI_CAP_ID_EHCI_DEBUG	0xa
138 
139 #define HUB_ROOT_RESET_TIME	50	/* times are in msec */
140 #define HUB_SHORT_RESET_TIME	10
141 #define HUB_LONG_RESET_TIME	200
142 #define HUB_RESET_TIMEOUT	500
143 
144 #define DBGP_MAX_PACKET		8
145 #define DBGP_TIMEOUT		(250 * 1000)
146 #define DBGP_LOOPS		1000
147 
148 static inline u32 dbgp_pid_write_update(u32 x, u32 tok)
149 {
150 	static int data0 = USB_PID_DATA1;
151 	data0 ^= USB_PID_DATA_TOGGLE;
152 	return (x & 0xffff0000) | (data0 << 8) | (tok & 0xff);
153 }
154 
155 static inline u32 dbgp_pid_read_update(u32 x, u32 tok)
156 {
157 	return (x & 0xffff0000) | (USB_PID_DATA0 << 8) | (tok & 0xff);
158 }
159 
160 static int dbgp_wait_until_complete(void)
161 {
162 	u32 ctrl;
163 	int loop = DBGP_TIMEOUT;
164 
165 	do {
166 		ctrl = readl(&ehci_debug->control);
167 		/* Stop when the transaction is finished */
168 		if (ctrl & DBGP_DONE)
169 			break;
170 		udelay(1);
171 	} while (--loop > 0);
172 
173 	if (!loop)
174 		return -DBGP_TIMEOUT;
175 
176 	/*
177 	 * Now that we have observed the completed transaction,
178 	 * clear the done bit.
179 	 */
180 	writel(ctrl | DBGP_DONE, &ehci_debug->control);
181 	return (ctrl & DBGP_ERROR) ? -DBGP_ERRCODE(ctrl) : DBGP_LEN(ctrl);
182 }
183 
184 static inline void dbgp_mdelay(int ms)
185 {
186 	int i;
187 
188 	while (ms--) {
189 		for (i = 0; i < 1000; i++)
190 			outb(0x1, 0x80);
191 	}
192 }
193 
194 static void dbgp_breath(void)
195 {
196 	/* Sleep to give the debug port a chance to breathe */
197 }
198 
199 static int dbgp_wait_until_done(unsigned ctrl, int loop)
200 {
201 	u32 pids, lpid;
202 	int ret;
203 
204 retry:
205 	writel(ctrl | DBGP_GO, &ehci_debug->control);
206 	ret = dbgp_wait_until_complete();
207 	pids = readl(&ehci_debug->pids);
208 	lpid = DBGP_PID_GET(pids);
209 
210 	if (ret < 0) {
211 		/* A -DBGP_TIMEOUT failure here means the device has
212 		 * failed, perhaps because it was unplugged, in which
213 		 * case we do not want to hang the system so the dbgp
214 		 * will be marked as unsafe to use.  EHCI reset is the
215 		 * only way to recover if you unplug the dbgp device.
216 		 */
217 		if (ret == -DBGP_TIMEOUT && !dbgp_not_safe)
218 			dbgp_not_safe = 1;
219 		if (ret == -DBGP_ERR_BAD && --loop > 0)
220 			goto retry;
221 		return ret;
222 	}
223 
224 	/*
225 	 * If the port is getting full or it has dropped data
226 	 * start pacing ourselves, not necessary but it's friendly.
227 	 */
228 	if ((lpid == USB_PID_NAK) || (lpid == USB_PID_NYET))
229 		dbgp_breath();
230 
231 	/* If I get a NACK reissue the transmission */
232 	if (lpid == USB_PID_NAK) {
233 		if (--loop > 0)
234 			goto retry;
235 	}
236 
237 	return ret;
238 }
239 
240 static inline void dbgp_set_data(const void *buf, int size)
241 {
242 	const unsigned char *bytes = buf;
243 	u32 lo, hi;
244 	int i;
245 
246 	lo = hi = 0;
247 	for (i = 0; i < 4 && i < size; i++)
248 		lo |= bytes[i] << (8*i);
249 	for (; i < 8 && i < size; i++)
250 		hi |= bytes[i] << (8*(i - 4));
251 	writel(lo, &ehci_debug->data03);
252 	writel(hi, &ehci_debug->data47);
253 }
254 
255 static inline void dbgp_get_data(void *buf, int size)
256 {
257 	unsigned char *bytes = buf;
258 	u32 lo, hi;
259 	int i;
260 
261 	lo = readl(&ehci_debug->data03);
262 	hi = readl(&ehci_debug->data47);
263 	for (i = 0; i < 4 && i < size; i++)
264 		bytes[i] = (lo >> (8*i)) & 0xff;
265 	for (; i < 8 && i < size; i++)
266 		bytes[i] = (hi >> (8*(i - 4))) & 0xff;
267 }
268 
269 static int dbgp_bulk_write(unsigned devnum, unsigned endpoint,
270 			 const char *bytes, int size)
271 {
272 	int ret;
273 	u32 addr;
274 	u32 pids, ctrl;
275 
276 	if (size > DBGP_MAX_PACKET)
277 		return -1;
278 
279 	addr = DBGP_EPADDR(devnum, endpoint);
280 
281 	pids = readl(&ehci_debug->pids);
282 	pids = dbgp_pid_write_update(pids, USB_PID_OUT);
283 
284 	ctrl = readl(&ehci_debug->control);
285 	ctrl = dbgp_len_update(ctrl, size);
286 	ctrl |= DBGP_OUT;
287 	ctrl |= DBGP_GO;
288 
289 	dbgp_set_data(bytes, size);
290 	writel(addr, &ehci_debug->address);
291 	writel(pids, &ehci_debug->pids);
292 	ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
293 
294 	return ret;
295 }
296 
297 static int dbgp_bulk_read(unsigned devnum, unsigned endpoint, void *data,
298 			  int size, int loops)
299 {
300 	u32 pids, addr, ctrl;
301 	int ret;
302 
303 	if (size > DBGP_MAX_PACKET)
304 		return -1;
305 
306 	addr = DBGP_EPADDR(devnum, endpoint);
307 
308 	pids = readl(&ehci_debug->pids);
309 	pids = dbgp_pid_read_update(pids, USB_PID_IN);
310 
311 	ctrl = readl(&ehci_debug->control);
312 	ctrl = dbgp_len_update(ctrl, size);
313 	ctrl &= ~DBGP_OUT;
314 	ctrl |= DBGP_GO;
315 
316 	writel(addr, &ehci_debug->address);
317 	writel(pids, &ehci_debug->pids);
318 	ret = dbgp_wait_until_done(ctrl, loops);
319 	if (ret < 0)
320 		return ret;
321 
322 	if (size > ret)
323 		size = ret;
324 	dbgp_get_data(data, size);
325 	return ret;
326 }
327 
328 static int dbgp_control_msg(unsigned devnum, int requesttype,
329 	int request, int value, int index, void *data, int size)
330 {
331 	u32 pids, addr, ctrl;
332 	struct usb_ctrlrequest req;
333 	int read;
334 	int ret;
335 
336 	read = (requesttype & USB_DIR_IN) != 0;
337 	if (size > (read ? DBGP_MAX_PACKET : 0))
338 		return -1;
339 
340 	/* Compute the control message */
341 	req.bRequestType = requesttype;
342 	req.bRequest = request;
343 	req.wValue = cpu_to_le16(value);
344 	req.wIndex = cpu_to_le16(index);
345 	req.wLength = cpu_to_le16(size);
346 
347 	pids = DBGP_PID_SET(USB_PID_DATA0, USB_PID_SETUP);
348 	addr = DBGP_EPADDR(devnum, 0);
349 
350 	ctrl = readl(&ehci_debug->control);
351 	ctrl = dbgp_len_update(ctrl, sizeof(req));
352 	ctrl |= DBGP_OUT;
353 	ctrl |= DBGP_GO;
354 
355 	/* Send the setup message */
356 	dbgp_set_data(&req, sizeof(req));
357 	writel(addr, &ehci_debug->address);
358 	writel(pids, &ehci_debug->pids);
359 	ret = dbgp_wait_until_done(ctrl, DBGP_LOOPS);
360 	if (ret < 0)
361 		return ret;
362 
363 	/* Read the result */
364 	return dbgp_bulk_read(devnum, 0, data, size, DBGP_LOOPS);
365 }
366 
367 /* Find a PCI capability */
368 static u32 __init find_cap(u32 num, u32 slot, u32 func, int cap)
369 {
370 	u8 pos;
371 	int bytes;
372 
373 	if (!(read_pci_config_16(num, slot, func, PCI_STATUS) &
374 		PCI_STATUS_CAP_LIST))
375 		return 0;
376 
377 	pos = read_pci_config_byte(num, slot, func, PCI_CAPABILITY_LIST);
378 	for (bytes = 0; bytes < 48 && pos >= 0x40; bytes++) {
379 		u8 id;
380 
381 		pos &= ~3;
382 		id = read_pci_config_byte(num, slot, func, pos+PCI_CAP_LIST_ID);
383 		if (id == 0xff)
384 			break;
385 		if (id == cap)
386 			return pos;
387 
388 		pos = read_pci_config_byte(num, slot, func,
389 						 pos+PCI_CAP_LIST_NEXT);
390 	}
391 	return 0;
392 }
393 
394 static u32 __init __find_dbgp(u32 bus, u32 slot, u32 func)
395 {
396 	u32 class;
397 
398 	class = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
399 	if ((class >> 8) != PCI_CLASS_SERIAL_USB_EHCI)
400 		return 0;
401 
402 	return find_cap(bus, slot, func, PCI_CAP_ID_EHCI_DEBUG);
403 }
404 
405 static u32 __init find_dbgp(int ehci_num, u32 *rbus, u32 *rslot, u32 *rfunc)
406 {
407 	u32 bus, slot, func;
408 
409 	for (bus = 0; bus < 256; bus++) {
410 		for (slot = 0; slot < 32; slot++) {
411 			for (func = 0; func < 8; func++) {
412 				unsigned cap;
413 
414 				cap = __find_dbgp(bus, slot, func);
415 
416 				if (!cap)
417 					continue;
418 				if (ehci_num-- != 0)
419 					continue;
420 				*rbus = bus;
421 				*rslot = slot;
422 				*rfunc = func;
423 				return cap;
424 			}
425 		}
426 	}
427 	return 0;
428 }
429 
430 static int dbgp_ehci_startup(void)
431 {
432 	u32 ctrl, cmd, status;
433 	int loop;
434 
435 	/* Claim ownership, but do not enable yet */
436 	ctrl = readl(&ehci_debug->control);
437 	ctrl |= DBGP_OWNER;
438 	ctrl &= ~(DBGP_ENABLED | DBGP_INUSE);
439 	writel(ctrl, &ehci_debug->control);
440 	udelay(1);
441 
442 	dbgp_ehci_status("EHCI startup");
443 	/* Start the ehci running */
444 	cmd = readl(&ehci_regs->command);
445 	cmd &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | CMD_ASE | CMD_RESET);
446 	cmd |= CMD_RUN;
447 	writel(cmd, &ehci_regs->command);
448 
449 	/* Ensure everything is routed to the EHCI */
450 	writel(FLAG_CF, &ehci_regs->configured_flag);
451 
452 	/* Wait until the controller is no longer halted */
453 	loop = 1000;
454 	do {
455 		status = readl(&ehci_regs->status);
456 		if (!(status & STS_HALT))
457 			break;
458 		udelay(1);
459 	} while (--loop > 0);
460 
461 	if (!loop) {
462 		dbgp_printk("ehci can not be started\n");
463 		return -ENODEV;
464 	}
465 	dbgp_printk("ehci started\n");
466 	return 0;
467 }
468 
469 static int dbgp_ehci_controller_reset(void)
470 {
471 	int loop = 250 * 1000;
472 	u32 cmd;
473 
474 	/* Reset the EHCI controller */
475 	cmd = readl(&ehci_regs->command);
476 	cmd |= CMD_RESET;
477 	writel(cmd, &ehci_regs->command);
478 	do {
479 		cmd = readl(&ehci_regs->command);
480 	} while ((cmd & CMD_RESET) && (--loop > 0));
481 
482 	if (!loop) {
483 		dbgp_printk("can not reset ehci\n");
484 		return -1;
485 	}
486 	dbgp_ehci_status("ehci reset done");
487 	return 0;
488 }
489 static int ehci_wait_for_port(int port);
490 /* Return 0 on success
491  * Return -ENODEV for any general failure
492  * Return -EIO if wait for port fails
493  */
494 static int _dbgp_external_startup(void)
495 {
496 	int devnum;
497 	struct usb_debug_descriptor dbgp_desc;
498 	int ret;
499 	u32 ctrl, portsc, cmd;
500 	int dbg_port = dbgp_phys_port;
501 	int tries = 3;
502 	int reset_port_tries = 1;
503 	int try_hard_once = 1;
504 
505 try_port_reset_again:
506 	ret = dbgp_ehci_startup();
507 	if (ret)
508 		return ret;
509 
510 	/* Wait for a device to show up in the debug port */
511 	ret = ehci_wait_for_port(dbg_port);
512 	if (ret < 0) {
513 		portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
514 		if (!(portsc & PORT_CONNECT) && try_hard_once) {
515 			/* Last ditch effort to try to force enable
516 			 * the debug device by using the packet test
517 			 * ehci command to try and wake it up. */
518 			try_hard_once = 0;
519 			cmd = readl(&ehci_regs->command);
520 			cmd &= ~CMD_RUN;
521 			writel(cmd, &ehci_regs->command);
522 			portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
523 			portsc |= PORT_TEST_PKT;
524 			writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
525 			dbgp_ehci_status("Trying to force debug port online");
526 			mdelay(50);
527 			dbgp_ehci_controller_reset();
528 			goto try_port_reset_again;
529 		} else if (reset_port_tries--) {
530 			goto try_port_reset_again;
531 		}
532 		dbgp_printk("No device found in debug port\n");
533 		return -EIO;
534 	}
535 	dbgp_ehci_status("wait for port done");
536 
537 	/* Enable the debug port */
538 	ctrl = readl(&ehci_debug->control);
539 	ctrl |= DBGP_CLAIM;
540 	writel(ctrl, &ehci_debug->control);
541 	ctrl = readl(&ehci_debug->control);
542 	if ((ctrl & DBGP_CLAIM) != DBGP_CLAIM) {
543 		dbgp_printk("No device in debug port\n");
544 		writel(ctrl & ~DBGP_CLAIM, &ehci_debug->control);
545 		return -ENODEV;
546 	}
547 	dbgp_ehci_status("debug ported enabled");
548 
549 	/* Completely transfer the debug device to the debug controller */
550 	portsc = readl(&ehci_regs->port_status[dbg_port - 1]);
551 	portsc &= ~PORT_PE;
552 	writel(portsc, &ehci_regs->port_status[dbg_port - 1]);
553 
554 	dbgp_mdelay(100);
555 
556 try_again:
557 	/* Find the debug device and make it device number 127 */
558 	for (devnum = 0; devnum <= 127; devnum++) {
559 		ret = dbgp_control_msg(devnum,
560 			USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
561 			USB_REQ_GET_DESCRIPTOR, (USB_DT_DEBUG << 8), 0,
562 			&dbgp_desc, sizeof(dbgp_desc));
563 		if (ret > 0)
564 			break;
565 	}
566 	if (devnum > 127) {
567 		dbgp_printk("Could not find attached debug device\n");
568 		goto err;
569 	}
570 	dbgp_endpoint_out = dbgp_desc.bDebugOutEndpoint;
571 	dbgp_endpoint_in = dbgp_desc.bDebugInEndpoint;
572 
573 	/* Move the device to 127 if it isn't already there */
574 	if (devnum != USB_DEBUG_DEVNUM) {
575 		ret = dbgp_control_msg(devnum,
576 			USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
577 			USB_REQ_SET_ADDRESS, USB_DEBUG_DEVNUM, 0, NULL, 0);
578 		if (ret < 0) {
579 			dbgp_printk("Could not move attached device to %d\n",
580 				USB_DEBUG_DEVNUM);
581 			goto err;
582 		}
583 		dbgp_printk("debug device renamed to 127\n");
584 	}
585 
586 	/* Enable the debug interface */
587 	ret = dbgp_control_msg(USB_DEBUG_DEVNUM,
588 		USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE,
589 		USB_REQ_SET_FEATURE, USB_DEVICE_DEBUG_MODE, 0, NULL, 0);
590 	if (ret < 0) {
591 		dbgp_printk(" Could not enable the debug device\n");
592 		goto err;
593 	}
594 	dbgp_printk("debug interface enabled\n");
595 	/* Perform a small write to get the even/odd data state in sync
596 	 */
597 	ret = dbgp_bulk_write(USB_DEBUG_DEVNUM, dbgp_endpoint_out, " ", 1);
598 	if (ret < 0) {
599 		dbgp_printk("dbgp_bulk_write failed: %d\n", ret);
600 		goto err;
601 	}
602 	dbgp_printk("small write done\n");
603 	dbgp_not_safe = 0;
604 
605 	return 0;
606 err:
607 	if (tries--)
608 		goto try_again;
609 	return -ENODEV;
610 }
611 
612 static int ehci_reset_port(int port)
613 {
614 	u32 portsc;
615 	u32 delay_time, delay;
616 	int loop;
617 
618 	dbgp_ehci_status("reset port");
619 	/* Reset the usb debug port */
620 	portsc = readl(&ehci_regs->port_status[port - 1]);
621 	portsc &= ~PORT_PE;
622 	portsc |= PORT_RESET;
623 	writel(portsc, &ehci_regs->port_status[port - 1]);
624 
625 	delay = HUB_ROOT_RESET_TIME;
626 	for (delay_time = 0; delay_time < HUB_RESET_TIMEOUT;
627 	     delay_time += delay) {
628 		dbgp_mdelay(delay);
629 		portsc = readl(&ehci_regs->port_status[port - 1]);
630 		if (!(portsc & PORT_RESET))
631 			break;
632 	}
633 		if (portsc & PORT_RESET) {
634 			/* force reset to complete */
635 			loop = 100 * 1000;
636 			writel(portsc & ~(PORT_RWC_BITS | PORT_RESET),
637 				&ehci_regs->port_status[port - 1]);
638 			do {
639 				udelay(1);
640 				portsc = readl(&ehci_regs->port_status[port-1]);
641 			} while ((portsc & PORT_RESET) && (--loop > 0));
642 		}
643 
644 		/* Device went away? */
645 		if (!(portsc & PORT_CONNECT))
646 			return -ENOTCONN;
647 
648 		/* bomb out completely if something weird happened */
649 		if ((portsc & PORT_CSC))
650 			return -EINVAL;
651 
652 		/* If we've finished resetting, then break out of the loop */
653 		if (!(portsc & PORT_RESET) && (portsc & PORT_PE))
654 			return 0;
655 	return -EBUSY;
656 }
657 
658 static int ehci_wait_for_port(int port)
659 {
660 	u32 status;
661 	int ret, reps;
662 
663 	for (reps = 0; reps < 300; reps++) {
664 		status = readl(&ehci_regs->status);
665 		if (status & STS_PCD)
666 			break;
667 		dbgp_mdelay(1);
668 	}
669 	ret = ehci_reset_port(port);
670 	if (ret == 0)
671 		return 0;
672 	return -ENOTCONN;
673 }
674 
675 typedef void (*set_debug_port_t)(int port);
676 
677 static void __init default_set_debug_port(int port)
678 {
679 }
680 
681 static set_debug_port_t __initdata set_debug_port = default_set_debug_port;
682 
683 static void __init nvidia_set_debug_port(int port)
684 {
685 	u32 dword;
686 	dword = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
687 				 0x74);
688 	dword &= ~(0x0f<<12);
689 	dword |= ((port & 0x0f)<<12);
690 	write_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func, 0x74,
691 				 dword);
692 	dbgp_printk("set debug port to %d\n", port);
693 }
694 
695 static void __init detect_set_debug_port(void)
696 {
697 	u32 vendorid;
698 
699 	vendorid = read_pci_config(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
700 		 0x00);
701 
702 	if ((vendorid & 0xffff) == 0x10de) {
703 		dbgp_printk("using nvidia set_debug_port\n");
704 		set_debug_port = nvidia_set_debug_port;
705 	}
706 }
707 
708 /* The code in early_ehci_bios_handoff() is derived from the usb pci
709  * quirk initialization, but altered so as to use the early PCI
710  * routines. */
711 #define EHCI_USBLEGSUP_BIOS	(1 << 16)	/* BIOS semaphore */
712 #define EHCI_USBLEGCTLSTS	4		/* legacy control/status */
713 static void __init early_ehci_bios_handoff(void)
714 {
715 	u32 hcc_params = readl(&ehci_caps->hcc_params);
716 	int offset = (hcc_params >> 8) & 0xff;
717 	u32 cap;
718 	int msec;
719 
720 	if (!offset)
721 		return;
722 
723 	cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
724 			      ehci_dev.func, offset);
725 	dbgp_printk("dbgp: ehci BIOS state %08x\n", cap);
726 
727 	if ((cap & 0xff) == 1 && (cap & EHCI_USBLEGSUP_BIOS)) {
728 		dbgp_printk("dbgp: BIOS handoff\n");
729 		write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
730 				      ehci_dev.func, offset + 3, 1);
731 	}
732 
733 	/* if boot firmware now owns EHCI, spin till it hands it over. */
734 	msec = 1000;
735 	while ((cap & EHCI_USBLEGSUP_BIOS) && (msec > 0)) {
736 		mdelay(10);
737 		msec -= 10;
738 		cap = read_pci_config(ehci_dev.bus, ehci_dev.slot,
739 				      ehci_dev.func, offset);
740 	}
741 
742 	if (cap & EHCI_USBLEGSUP_BIOS) {
743 		/* well, possibly buggy BIOS... try to shut it down,
744 		 * and hope nothing goes too wrong */
745 		dbgp_printk("dbgp: BIOS handoff failed: %08x\n", cap);
746 		write_pci_config_byte(ehci_dev.bus, ehci_dev.slot,
747 				      ehci_dev.func, offset + 2, 0);
748 	}
749 
750 	/* just in case, always disable EHCI SMIs */
751 	write_pci_config_byte(ehci_dev.bus, ehci_dev.slot, ehci_dev.func,
752 			      offset + EHCI_USBLEGCTLSTS, 0);
753 }
754 
755 static int __init ehci_setup(void)
756 {
757 	u32 ctrl, portsc, hcs_params;
758 	u32 debug_port, new_debug_port = 0, n_ports;
759 	int ret, i;
760 	int port_map_tried;
761 	int playtimes = 3;
762 
763 	early_ehci_bios_handoff();
764 
765 try_next_time:
766 	port_map_tried = 0;
767 
768 try_next_port:
769 
770 	hcs_params = readl(&ehci_caps->hcs_params);
771 	debug_port = HCS_DEBUG_PORT(hcs_params);
772 	dbgp_phys_port = debug_port;
773 	n_ports    = HCS_N_PORTS(hcs_params);
774 
775 	dbgp_printk("debug_port: %d\n", debug_port);
776 	dbgp_printk("n_ports:    %d\n", n_ports);
777 	dbgp_ehci_status("");
778 
779 	for (i = 1; i <= n_ports; i++) {
780 		portsc = readl(&ehci_regs->port_status[i-1]);
781 		dbgp_printk("portstatus%d: %08x\n", i, portsc);
782 	}
783 
784 	if (port_map_tried && (new_debug_port != debug_port)) {
785 		if (--playtimes) {
786 			set_debug_port(new_debug_port);
787 			goto try_next_time;
788 		}
789 		return -1;
790 	}
791 
792 	/* Only reset the controller if it is not already in the
793 	 * configured state */
794 	if (!(readl(&ehci_regs->configured_flag) & FLAG_CF)) {
795 		if (dbgp_ehci_controller_reset() != 0)
796 			return -1;
797 	} else {
798 		dbgp_ehci_status("ehci skip - already configured");
799 	}
800 
801 	ret = _dbgp_external_startup();
802 	if (ret == -EIO)
803 		goto next_debug_port;
804 
805 	if (ret < 0) {
806 		/* Things didn't work so remove my claim */
807 		ctrl = readl(&ehci_debug->control);
808 		ctrl &= ~(DBGP_CLAIM | DBGP_OUT);
809 		writel(ctrl, &ehci_debug->control);
810 		return -1;
811 	}
812 	return 0;
813 
814 next_debug_port:
815 	port_map_tried |= (1<<(debug_port - 1));
816 	new_debug_port = ((debug_port-1+1)%n_ports) + 1;
817 	if (port_map_tried != ((1<<n_ports) - 1)) {
818 		set_debug_port(new_debug_port);
819 		goto try_next_port;
820 	}
821 	if (--playtimes) {
822 		set_debug_port(new_debug_port);
823 		goto try_next_time;
824 	}
825 
826 	return -1;
827 }
828 
829 int __init early_dbgp_init(char *s)
830 {
831 	u32 debug_port, bar, offset;
832 	u32 bus, slot, func, cap;
833 	void __iomem *ehci_bar;
834 	u32 dbgp_num;
835 	u32 bar_val;
836 	char *e;
837 	int ret;
838 	u8 byte;
839 
840 	if (!early_pci_allowed())
841 		return -1;
842 
843 	dbgp_num = 0;
844 	if (*s)
845 		dbgp_num = simple_strtoul(s, &e, 10);
846 	dbgp_printk("dbgp_num: %d\n", dbgp_num);
847 
848 	cap = find_dbgp(dbgp_num, &bus, &slot, &func);
849 	if (!cap)
850 		return -1;
851 
852 	dbgp_printk("Found EHCI debug port on %02x:%02x.%1x\n", bus, slot,
853 			 func);
854 
855 	debug_port = read_pci_config(bus, slot, func, cap);
856 	bar = (debug_port >> 29) & 0x7;
857 	bar = (bar * 4) + 0xc;
858 	offset = (debug_port >> 16) & 0xfff;
859 	dbgp_printk("bar: %02x offset: %03x\n", bar, offset);
860 	if (bar != PCI_BASE_ADDRESS_0) {
861 		dbgp_printk("only debug ports on bar 1 handled.\n");
862 
863 		return -1;
864 	}
865 
866 	bar_val = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
867 	dbgp_printk("bar_val: %02x offset: %03x\n", bar_val, offset);
868 	if (bar_val & ~PCI_BASE_ADDRESS_MEM_MASK) {
869 		dbgp_printk("only simple 32bit mmio bars supported\n");
870 
871 		return -1;
872 	}
873 
874 	/* double check if the mem space is enabled */
875 	byte = read_pci_config_byte(bus, slot, func, 0x04);
876 	if (!(byte & 0x2)) {
877 		byte  |= 0x02;
878 		write_pci_config_byte(bus, slot, func, 0x04, byte);
879 		dbgp_printk("mmio for ehci enabled\n");
880 	}
881 
882 	/*
883 	 * FIXME I don't have the bar size so just guess PAGE_SIZE is more
884 	 * than enough.  1K is the biggest I have seen.
885 	 */
886 	set_fixmap_nocache(FIX_DBGP_BASE, bar_val & PAGE_MASK);
887 	ehci_bar = (void __iomem *)__fix_to_virt(FIX_DBGP_BASE);
888 	ehci_bar += bar_val & ~PAGE_MASK;
889 	dbgp_printk("ehci_bar: %p\n", ehci_bar);
890 
891 	ehci_caps  = ehci_bar;
892 	ehci_regs  = ehci_bar + EARLY_HC_LENGTH(readl(&ehci_caps->hc_capbase));
893 	ehci_debug = ehci_bar + offset;
894 	ehci_dev.bus = bus;
895 	ehci_dev.slot = slot;
896 	ehci_dev.func = func;
897 
898 	detect_set_debug_port();
899 
900 	ret = ehci_setup();
901 	if (ret < 0) {
902 		dbgp_printk("ehci_setup failed\n");
903 		ehci_debug = NULL;
904 
905 		return -1;
906 	}
907 	dbgp_ehci_status("early_init_complete");
908 
909 	return 0;
910 }
911 
912 static void early_dbgp_write(struct console *con, const char *str, u32 n)
913 {
914 	int chunk, ret;
915 	char buf[DBGP_MAX_PACKET];
916 	int use_cr = 0;
917 	u32 cmd, ctrl;
918 	int reset_run = 0;
919 
920 	if (!ehci_debug || dbgp_not_safe)
921 		return;
922 
923 	cmd = readl(&ehci_regs->command);
924 	if (unlikely(!(cmd & CMD_RUN))) {
925 		/* If the ehci controller is not in the run state do extended
926 		 * checks to see if the acpi or some other initialization also
927 		 * reset the ehci debug port */
928 		ctrl = readl(&ehci_debug->control);
929 		if (!(ctrl & DBGP_ENABLED)) {
930 			dbgp_not_safe = 1;
931 			_dbgp_external_startup();
932 		} else {
933 			cmd |= CMD_RUN;
934 			writel(cmd, &ehci_regs->command);
935 			reset_run = 1;
936 		}
937 	}
938 	while (n > 0) {
939 		for (chunk = 0; chunk < DBGP_MAX_PACKET && n > 0;
940 		     str++, chunk++, n--) {
941 			if (!use_cr && *str == '\n') {
942 				use_cr = 1;
943 				buf[chunk] = '\r';
944 				str--;
945 				n++;
946 				continue;
947 			}
948 			if (use_cr)
949 				use_cr = 0;
950 			buf[chunk] = *str;
951 		}
952 		if (chunk > 0) {
953 			ret = dbgp_bulk_write(USB_DEBUG_DEVNUM,
954 				      dbgp_endpoint_out, buf, chunk);
955 		}
956 	}
957 	if (unlikely(reset_run)) {
958 		cmd = readl(&ehci_regs->command);
959 		cmd &= ~CMD_RUN;
960 		writel(cmd, &ehci_regs->command);
961 	}
962 }
963 
964 struct console early_dbgp_console = {
965 	.name =		"earlydbg",
966 	.write =	early_dbgp_write,
967 	.flags =	CON_PRINTBUFFER,
968 	.index =	-1,
969 };
970 
971 #if IS_ENABLED(CONFIG_USB)
972 int dbgp_reset_prep(struct usb_hcd *hcd)
973 {
974 	int ret = xen_dbgp_reset_prep(hcd);
975 	u32 ctrl;
976 
977 	if (ret)
978 		return ret;
979 
980 	dbgp_not_safe = 1;
981 	if (!ehci_debug)
982 		return 0;
983 
984 	if ((early_dbgp_console.index != -1 &&
985 	     !(early_dbgp_console.flags & CON_BOOT)) ||
986 	    dbgp_kgdb_mode)
987 		return 1;
988 	/* This means the console is not initialized, or should get
989 	 * shutdown so as to allow for reuse of the usb device, which
990 	 * means it is time to shutdown the usb debug port. */
991 	ctrl = readl(&ehci_debug->control);
992 	if (ctrl & DBGP_ENABLED) {
993 		ctrl &= ~(DBGP_CLAIM);
994 		writel(ctrl, &ehci_debug->control);
995 	}
996 	return 0;
997 }
998 EXPORT_SYMBOL_GPL(dbgp_reset_prep);
999 
1000 int dbgp_external_startup(struct usb_hcd *hcd)
1001 {
1002 	return xen_dbgp_external_startup(hcd) ?: _dbgp_external_startup();
1003 }
1004 EXPORT_SYMBOL_GPL(dbgp_external_startup);
1005 #endif /* USB */
1006 
1007 #ifdef CONFIG_KGDB
1008 
1009 static char kgdbdbgp_buf[DBGP_MAX_PACKET];
1010 static int kgdbdbgp_buf_sz;
1011 static int kgdbdbgp_buf_idx;
1012 static int kgdbdbgp_loop_cnt = DBGP_LOOPS;
1013 
1014 static int kgdbdbgp_read_char(void)
1015 {
1016 	int ret;
1017 
1018 	if (kgdbdbgp_buf_idx < kgdbdbgp_buf_sz) {
1019 		char ch = kgdbdbgp_buf[kgdbdbgp_buf_idx++];
1020 		return ch;
1021 	}
1022 
1023 	ret = dbgp_bulk_read(USB_DEBUG_DEVNUM, dbgp_endpoint_in,
1024 			     &kgdbdbgp_buf, DBGP_MAX_PACKET,
1025 			     kgdbdbgp_loop_cnt);
1026 	if (ret <= 0)
1027 		return NO_POLL_CHAR;
1028 	kgdbdbgp_buf_sz = ret;
1029 	kgdbdbgp_buf_idx = 1;
1030 	return kgdbdbgp_buf[0];
1031 }
1032 
1033 static void kgdbdbgp_write_char(u8 chr)
1034 {
1035 	early_dbgp_write(NULL, &chr, 1);
1036 }
1037 
1038 static struct kgdb_io kgdbdbgp_io_ops = {
1039 	.name = "kgdbdbgp",
1040 	.read_char = kgdbdbgp_read_char,
1041 	.write_char = kgdbdbgp_write_char,
1042 };
1043 
1044 static int kgdbdbgp_wait_time;
1045 
1046 static int __init kgdbdbgp_parse_config(char *str)
1047 {
1048 	char *ptr;
1049 
1050 	if (!ehci_debug) {
1051 		if (early_dbgp_init(str))
1052 			return -1;
1053 	}
1054 	ptr = strchr(str, ',');
1055 	if (ptr) {
1056 		ptr++;
1057 		kgdbdbgp_wait_time = simple_strtoul(ptr, &ptr, 10);
1058 	}
1059 	kgdb_register_io_module(&kgdbdbgp_io_ops);
1060 	kgdbdbgp_io_ops.is_console = early_dbgp_console.index != -1;
1061 
1062 	return 0;
1063 }
1064 early_param("kgdbdbgp", kgdbdbgp_parse_config);
1065 
1066 static int kgdbdbgp_reader_thread(void *ptr)
1067 {
1068 	int ret;
1069 
1070 	while (readl(&ehci_debug->control) & DBGP_ENABLED) {
1071 		kgdbdbgp_loop_cnt = 1;
1072 		ret = kgdbdbgp_read_char();
1073 		kgdbdbgp_loop_cnt = DBGP_LOOPS;
1074 		if (ret != NO_POLL_CHAR) {
1075 			if (ret == 0x3 || ret == '$') {
1076 				if (ret == '$')
1077 					kgdbdbgp_buf_idx--;
1078 				kgdb_breakpoint();
1079 			}
1080 			continue;
1081 		}
1082 		schedule_timeout_interruptible(kgdbdbgp_wait_time * HZ);
1083 	}
1084 	return 0;
1085 }
1086 
1087 static int __init kgdbdbgp_start_thread(void)
1088 {
1089 	if (dbgp_kgdb_mode && kgdbdbgp_wait_time)
1090 		kthread_run(kgdbdbgp_reader_thread, NULL, "%s", "dbgp");
1091 
1092 	return 0;
1093 }
1094 device_initcall(kgdbdbgp_start_thread);
1095 #endif /* CONFIG_KGDB */
1096