1 /** 2 * dwc3-pci.c - PCI Specific glue layer 3 * 4 * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com 5 * 6 * Authors: Felipe Balbi <balbi@ti.com>, 7 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 8 * 9 * This program is free software: you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 of 11 * the License as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 */ 18 19 #include <linux/kernel.h> 20 #include <linux/module.h> 21 #include <linux/slab.h> 22 #include <linux/pci.h> 23 #include <linux/platform_device.h> 24 #include <linux/gpio/consumer.h> 25 #include <linux/acpi.h> 26 27 #include "platform_data.h" 28 29 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 0xabcd 30 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI 0xabce 31 #define PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31 0xabcf 32 #define PCI_DEVICE_ID_INTEL_BYT 0x0f37 33 #define PCI_DEVICE_ID_INTEL_MRFLD 0x119e 34 #define PCI_DEVICE_ID_INTEL_BSW 0x22b7 35 #define PCI_DEVICE_ID_INTEL_SPTLP 0x9d30 36 #define PCI_DEVICE_ID_INTEL_SPTH 0xa130 37 #define PCI_DEVICE_ID_INTEL_BXT 0x0aaa 38 #define PCI_DEVICE_ID_INTEL_BXT_M 0x1aaa 39 #define PCI_DEVICE_ID_INTEL_APL 0x5aaa 40 41 static const struct acpi_gpio_params reset_gpios = { 0, 0, false }; 42 static const struct acpi_gpio_params cs_gpios = { 1, 0, false }; 43 44 static const struct acpi_gpio_mapping acpi_dwc3_byt_gpios[] = { 45 { "reset-gpios", &reset_gpios, 1 }, 46 { "cs-gpios", &cs_gpios, 1 }, 47 { }, 48 }; 49 50 static int dwc3_pci_quirks(struct pci_dev *pdev) 51 { 52 if (pdev->vendor == PCI_VENDOR_ID_AMD && 53 pdev->device == PCI_DEVICE_ID_AMD_NL_USB) { 54 struct dwc3_platform_data pdata; 55 56 memset(&pdata, 0, sizeof(pdata)); 57 58 pdata.has_lpm_erratum = true; 59 pdata.lpm_nyet_threshold = 0xf; 60 61 pdata.u2exit_lfps_quirk = true; 62 pdata.u2ss_inp3_quirk = true; 63 pdata.req_p1p2p3_quirk = true; 64 pdata.del_p1p2p3_quirk = true; 65 pdata.del_phy_power_chg_quirk = true; 66 pdata.lfps_filter_quirk = true; 67 pdata.rx_detect_poll_quirk = true; 68 69 pdata.tx_de_emphasis_quirk = true; 70 pdata.tx_de_emphasis = 1; 71 72 /* 73 * FIXME these quirks should be removed when AMD NL 74 * taps out 75 */ 76 pdata.disable_scramble_quirk = true; 77 pdata.dis_u3_susphy_quirk = true; 78 pdata.dis_u2_susphy_quirk = true; 79 80 return platform_device_add_data(pci_get_drvdata(pdev), &pdata, 81 sizeof(pdata)); 82 } 83 84 if (pdev->vendor == PCI_VENDOR_ID_INTEL && 85 pdev->device == PCI_DEVICE_ID_INTEL_BYT) { 86 struct gpio_desc *gpio; 87 88 acpi_dev_add_driver_gpios(ACPI_COMPANION(&pdev->dev), 89 acpi_dwc3_byt_gpios); 90 91 /* 92 * These GPIOs will turn on the USB2 PHY. Note that we have to 93 * put the gpio descriptors again here because the phy driver 94 * might want to grab them, too. 95 */ 96 gpio = gpiod_get_optional(&pdev->dev, "cs", GPIOD_OUT_LOW); 97 if (IS_ERR(gpio)) 98 return PTR_ERR(gpio); 99 100 gpiod_set_value_cansleep(gpio, 1); 101 gpiod_put(gpio); 102 103 gpio = gpiod_get_optional(&pdev->dev, "reset", GPIOD_OUT_LOW); 104 if (IS_ERR(gpio)) 105 return PTR_ERR(gpio); 106 107 if (gpio) { 108 gpiod_set_value_cansleep(gpio, 1); 109 gpiod_put(gpio); 110 usleep_range(10000, 11000); 111 } 112 } 113 114 if (pdev->vendor == PCI_VENDOR_ID_SYNOPSYS && 115 (pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3 || 116 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI || 117 pdev->device == PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31)) { 118 119 struct dwc3_platform_data pdata; 120 121 memset(&pdata, 0, sizeof(pdata)); 122 pdata.usb3_lpm_capable = true; 123 pdata.has_lpm_erratum = true; 124 pdata.dis_enblslpm_quirk = true; 125 126 return platform_device_add_data(pci_get_drvdata(pdev), &pdata, 127 sizeof(pdata)); 128 } 129 130 return 0; 131 } 132 133 static int dwc3_pci_probe(struct pci_dev *pci, 134 const struct pci_device_id *id) 135 { 136 struct resource res[2]; 137 struct platform_device *dwc3; 138 int ret; 139 struct device *dev = &pci->dev; 140 141 ret = pcim_enable_device(pci); 142 if (ret) { 143 dev_err(dev, "failed to enable pci device\n"); 144 return -ENODEV; 145 } 146 147 pci_set_master(pci); 148 149 dwc3 = platform_device_alloc("dwc3", PLATFORM_DEVID_AUTO); 150 if (!dwc3) { 151 dev_err(dev, "couldn't allocate dwc3 device\n"); 152 return -ENOMEM; 153 } 154 155 memset(res, 0x00, sizeof(struct resource) * ARRAY_SIZE(res)); 156 157 res[0].start = pci_resource_start(pci, 0); 158 res[0].end = pci_resource_end(pci, 0); 159 res[0].name = "dwc_usb3"; 160 res[0].flags = IORESOURCE_MEM; 161 162 res[1].start = pci->irq; 163 res[1].name = "dwc_usb3"; 164 res[1].flags = IORESOURCE_IRQ; 165 166 ret = platform_device_add_resources(dwc3, res, ARRAY_SIZE(res)); 167 if (ret) { 168 dev_err(dev, "couldn't add resources to dwc3 device\n"); 169 return ret; 170 } 171 172 pci_set_drvdata(pci, dwc3); 173 ret = dwc3_pci_quirks(pci); 174 if (ret) 175 goto err; 176 177 dwc3->dev.parent = dev; 178 ACPI_COMPANION_SET(&dwc3->dev, ACPI_COMPANION(dev)); 179 180 ret = platform_device_add(dwc3); 181 if (ret) { 182 dev_err(dev, "failed to register dwc3 device\n"); 183 goto err; 184 } 185 186 return 0; 187 err: 188 platform_device_put(dwc3); 189 return ret; 190 } 191 192 static void dwc3_pci_remove(struct pci_dev *pci) 193 { 194 acpi_dev_remove_driver_gpios(ACPI_COMPANION(&pci->dev)); 195 platform_device_unregister(pci_get_drvdata(pci)); 196 } 197 198 static const struct pci_device_id dwc3_pci_id_table[] = { 199 { 200 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 201 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3), 202 }, 203 { 204 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 205 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB3_AXI), 206 }, 207 { 208 PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 209 PCI_DEVICE_ID_SYNOPSYS_HAPSUSB31), 210 }, 211 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BSW), }, 212 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BYT), }, 213 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_MRFLD), }, 214 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTLP), }, 215 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_SPTH), }, 216 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT), }, 217 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_BXT_M), }, 218 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_APL), }, 219 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_NL_USB), }, 220 { } /* Terminating Entry */ 221 }; 222 MODULE_DEVICE_TABLE(pci, dwc3_pci_id_table); 223 224 static struct pci_driver dwc3_pci_driver = { 225 .name = "dwc3-pci", 226 .id_table = dwc3_pci_id_table, 227 .probe = dwc3_pci_probe, 228 .remove = dwc3_pci_remove, 229 }; 230 231 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 232 MODULE_LICENSE("GPL v2"); 233 MODULE_DESCRIPTION("DesignWare USB3 PCI Glue Layer"); 234 235 module_pci_driver(dwc3_pci_driver); 236