1 // SPDX-License-Identifier: GPL-2.0 2 /** 3 * dwc3-of-simple.c - OF glue layer for simple integrations 4 * 5 * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com 6 * 7 * Author: Felipe Balbi <balbi@ti.com> 8 * 9 * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov 10 * <iivanov@mm-sol.com> and the original patch adding support for Xilinx' SoC 11 * by Subbaraya Sundeep Bhatta <subbaraya.sundeep.bhatta@xilinx.com> 12 */ 13 14 #include <linux/module.h> 15 #include <linux/kernel.h> 16 #include <linux/slab.h> 17 #include <linux/platform_device.h> 18 #include <linux/dma-mapping.h> 19 #include <linux/clk.h> 20 #include <linux/of.h> 21 #include <linux/of_platform.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/reset.h> 24 25 struct dwc3_of_simple { 26 struct device *dev; 27 struct clk **clks; 28 int num_clocks; 29 struct reset_control *resets; 30 bool pulse_resets; 31 bool need_reset; 32 }; 33 34 static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count) 35 { 36 struct device *dev = simple->dev; 37 struct device_node *np = dev->of_node; 38 int i; 39 40 simple->num_clocks = count; 41 42 if (!count) 43 return 0; 44 45 simple->clks = devm_kcalloc(dev, simple->num_clocks, 46 sizeof(struct clk *), GFP_KERNEL); 47 if (!simple->clks) 48 return -ENOMEM; 49 50 for (i = 0; i < simple->num_clocks; i++) { 51 struct clk *clk; 52 int ret; 53 54 clk = of_clk_get(np, i); 55 if (IS_ERR(clk)) { 56 while (--i >= 0) { 57 clk_disable_unprepare(simple->clks[i]); 58 clk_put(simple->clks[i]); 59 } 60 return PTR_ERR(clk); 61 } 62 63 ret = clk_prepare_enable(clk); 64 if (ret < 0) { 65 while (--i >= 0) { 66 clk_disable_unprepare(simple->clks[i]); 67 clk_put(simple->clks[i]); 68 } 69 clk_put(clk); 70 71 return ret; 72 } 73 74 simple->clks[i] = clk; 75 } 76 77 return 0; 78 } 79 80 static int dwc3_of_simple_probe(struct platform_device *pdev) 81 { 82 struct dwc3_of_simple *simple; 83 struct device *dev = &pdev->dev; 84 struct device_node *np = dev->of_node; 85 86 int ret; 87 int i; 88 bool shared_resets = false; 89 90 simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL); 91 if (!simple) 92 return -ENOMEM; 93 94 platform_set_drvdata(pdev, simple); 95 simple->dev = dev; 96 97 /* 98 * Some controllers need to toggle the usb3-otg reset before trying to 99 * initialize the PHY, otherwise the PHY times out. 100 */ 101 if (of_device_is_compatible(np, "rockchip,rk3399-dwc3")) 102 simple->need_reset = true; 103 104 if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") || 105 of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) { 106 shared_resets = true; 107 simple->pulse_resets = true; 108 } 109 110 simple->resets = of_reset_control_array_get(np, shared_resets, true, 111 true); 112 if (IS_ERR(simple->resets)) { 113 ret = PTR_ERR(simple->resets); 114 dev_err(dev, "failed to get device resets, err=%d\n", ret); 115 return ret; 116 } 117 118 if (simple->pulse_resets) { 119 ret = reset_control_reset(simple->resets); 120 if (ret) 121 goto err_resetc_put; 122 } else { 123 ret = reset_control_deassert(simple->resets); 124 if (ret) 125 goto err_resetc_put; 126 } 127 128 ret = dwc3_of_simple_clk_init(simple, of_count_phandle_with_args(np, 129 "clocks", "#clock-cells")); 130 if (ret) 131 goto err_resetc_assert; 132 133 ret = of_platform_populate(np, NULL, NULL, dev); 134 if (ret) { 135 for (i = 0; i < simple->num_clocks; i++) { 136 clk_disable_unprepare(simple->clks[i]); 137 clk_put(simple->clks[i]); 138 } 139 140 goto err_resetc_assert; 141 } 142 143 pm_runtime_set_active(dev); 144 pm_runtime_enable(dev); 145 pm_runtime_get_sync(dev); 146 147 return 0; 148 149 err_resetc_assert: 150 if (!simple->pulse_resets) 151 reset_control_assert(simple->resets); 152 153 err_resetc_put: 154 reset_control_put(simple->resets); 155 return ret; 156 } 157 158 static int dwc3_of_simple_remove(struct platform_device *pdev) 159 { 160 struct dwc3_of_simple *simple = platform_get_drvdata(pdev); 161 struct device *dev = &pdev->dev; 162 int i; 163 164 of_platform_depopulate(dev); 165 166 for (i = 0; i < simple->num_clocks; i++) { 167 clk_disable_unprepare(simple->clks[i]); 168 clk_put(simple->clks[i]); 169 } 170 simple->num_clocks = 0; 171 172 if (!simple->pulse_resets) 173 reset_control_assert(simple->resets); 174 175 reset_control_put(simple->resets); 176 177 pm_runtime_disable(dev); 178 pm_runtime_put_noidle(dev); 179 pm_runtime_set_suspended(dev); 180 181 return 0; 182 } 183 184 static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev) 185 { 186 struct dwc3_of_simple *simple = dev_get_drvdata(dev); 187 int i; 188 189 for (i = 0; i < simple->num_clocks; i++) 190 clk_disable(simple->clks[i]); 191 192 return 0; 193 } 194 195 static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev) 196 { 197 struct dwc3_of_simple *simple = dev_get_drvdata(dev); 198 int ret; 199 int i; 200 201 for (i = 0; i < simple->num_clocks; i++) { 202 ret = clk_enable(simple->clks[i]); 203 if (ret < 0) { 204 while (--i >= 0) 205 clk_disable(simple->clks[i]); 206 return ret; 207 } 208 } 209 210 return 0; 211 } 212 213 static int __maybe_unused dwc3_of_simple_suspend(struct device *dev) 214 { 215 struct dwc3_of_simple *simple = dev_get_drvdata(dev); 216 217 if (simple->need_reset) 218 reset_control_assert(simple->resets); 219 220 return 0; 221 } 222 223 static int __maybe_unused dwc3_of_simple_resume(struct device *dev) 224 { 225 struct dwc3_of_simple *simple = dev_get_drvdata(dev); 226 227 if (simple->need_reset) 228 reset_control_deassert(simple->resets); 229 230 return 0; 231 } 232 233 static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = { 234 SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume) 235 SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend, 236 dwc3_of_simple_runtime_resume, NULL) 237 }; 238 239 static const struct of_device_id of_dwc3_simple_match[] = { 240 { .compatible = "rockchip,rk3399-dwc3" }, 241 { .compatible = "xlnx,zynqmp-dwc3" }, 242 { .compatible = "cavium,octeon-7130-usb-uctl" }, 243 { .compatible = "sprd,sc9860-dwc3" }, 244 { .compatible = "amlogic,meson-axg-dwc3" }, 245 { .compatible = "amlogic,meson-gxl-dwc3" }, 246 { .compatible = "allwinner,sun50i-h6-dwc3" }, 247 { /* Sentinel */ } 248 }; 249 MODULE_DEVICE_TABLE(of, of_dwc3_simple_match); 250 251 static struct platform_driver dwc3_of_simple_driver = { 252 .probe = dwc3_of_simple_probe, 253 .remove = dwc3_of_simple_remove, 254 .driver = { 255 .name = "dwc3-of-simple", 256 .of_match_table = of_dwc3_simple_match, 257 .pm = &dwc3_of_simple_dev_pm_ops, 258 }, 259 }; 260 261 module_platform_driver(dwc3_of_simple_driver); 262 MODULE_LICENSE("GPL v2"); 263 MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer"); 264 MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>"); 265