1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * debugfs.c - DesignWare USB3 DRD Controller DebugFS file 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/ptrace.h> 14 #include <linux/types.h> 15 #include <linux/spinlock.h> 16 #include <linux/debugfs.h> 17 #include <linux/seq_file.h> 18 #include <linux/delay.h> 19 #include <linux/uaccess.h> 20 21 #include <linux/usb/ch9.h> 22 23 #include "core.h" 24 #include "gadget.h" 25 #include "io.h" 26 #include "debug.h" 27 28 #define DWC3_LSP_MUX_UNSELECTED 0xfffff 29 30 #define dump_register(nm) \ 31 { \ 32 .name = __stringify(nm), \ 33 .offset = DWC3_ ##nm, \ 34 } 35 36 #define dump_ep_register_set(n) \ 37 { \ 38 .name = "DEPCMDPAR2("__stringify(n)")", \ 39 .offset = DWC3_DEP_BASE(n) + \ 40 DWC3_DEPCMDPAR2, \ 41 }, \ 42 { \ 43 .name = "DEPCMDPAR1("__stringify(n)")", \ 44 .offset = DWC3_DEP_BASE(n) + \ 45 DWC3_DEPCMDPAR1, \ 46 }, \ 47 { \ 48 .name = "DEPCMDPAR0("__stringify(n)")", \ 49 .offset = DWC3_DEP_BASE(n) + \ 50 DWC3_DEPCMDPAR0, \ 51 }, \ 52 { \ 53 .name = "DEPCMD("__stringify(n)")", \ 54 .offset = DWC3_DEP_BASE(n) + \ 55 DWC3_DEPCMD, \ 56 } 57 58 59 static const struct debugfs_reg32 dwc3_regs[] = { 60 dump_register(GSBUSCFG0), 61 dump_register(GSBUSCFG1), 62 dump_register(GTXTHRCFG), 63 dump_register(GRXTHRCFG), 64 dump_register(GCTL), 65 dump_register(GEVTEN), 66 dump_register(GSTS), 67 dump_register(GUCTL1), 68 dump_register(GSNPSID), 69 dump_register(GGPIO), 70 dump_register(GUID), 71 dump_register(GUCTL), 72 dump_register(GBUSERRADDR0), 73 dump_register(GBUSERRADDR1), 74 dump_register(GPRTBIMAP0), 75 dump_register(GPRTBIMAP1), 76 dump_register(GHWPARAMS0), 77 dump_register(GHWPARAMS1), 78 dump_register(GHWPARAMS2), 79 dump_register(GHWPARAMS3), 80 dump_register(GHWPARAMS4), 81 dump_register(GHWPARAMS5), 82 dump_register(GHWPARAMS6), 83 dump_register(GHWPARAMS7), 84 dump_register(GDBGFIFOSPACE), 85 dump_register(GDBGLTSSM), 86 dump_register(GDBGBMU), 87 dump_register(GPRTBIMAP_HS0), 88 dump_register(GPRTBIMAP_HS1), 89 dump_register(GPRTBIMAP_FS0), 90 dump_register(GPRTBIMAP_FS1), 91 dump_register(GUCTL2), 92 dump_register(VER_NUMBER), 93 dump_register(VER_TYPE), 94 95 dump_register(GUSB2PHYCFG(0)), 96 dump_register(GUSB2PHYCFG(1)), 97 dump_register(GUSB2PHYCFG(2)), 98 dump_register(GUSB2PHYCFG(3)), 99 dump_register(GUSB2PHYCFG(4)), 100 dump_register(GUSB2PHYCFG(5)), 101 dump_register(GUSB2PHYCFG(6)), 102 dump_register(GUSB2PHYCFG(7)), 103 dump_register(GUSB2PHYCFG(8)), 104 dump_register(GUSB2PHYCFG(9)), 105 dump_register(GUSB2PHYCFG(10)), 106 dump_register(GUSB2PHYCFG(11)), 107 dump_register(GUSB2PHYCFG(12)), 108 dump_register(GUSB2PHYCFG(13)), 109 dump_register(GUSB2PHYCFG(14)), 110 dump_register(GUSB2PHYCFG(15)), 111 112 dump_register(GUSB2I2CCTL(0)), 113 dump_register(GUSB2I2CCTL(1)), 114 dump_register(GUSB2I2CCTL(2)), 115 dump_register(GUSB2I2CCTL(3)), 116 dump_register(GUSB2I2CCTL(4)), 117 dump_register(GUSB2I2CCTL(5)), 118 dump_register(GUSB2I2CCTL(6)), 119 dump_register(GUSB2I2CCTL(7)), 120 dump_register(GUSB2I2CCTL(8)), 121 dump_register(GUSB2I2CCTL(9)), 122 dump_register(GUSB2I2CCTL(10)), 123 dump_register(GUSB2I2CCTL(11)), 124 dump_register(GUSB2I2CCTL(12)), 125 dump_register(GUSB2I2CCTL(13)), 126 dump_register(GUSB2I2CCTL(14)), 127 dump_register(GUSB2I2CCTL(15)), 128 129 dump_register(GUSB2PHYACC(0)), 130 dump_register(GUSB2PHYACC(1)), 131 dump_register(GUSB2PHYACC(2)), 132 dump_register(GUSB2PHYACC(3)), 133 dump_register(GUSB2PHYACC(4)), 134 dump_register(GUSB2PHYACC(5)), 135 dump_register(GUSB2PHYACC(6)), 136 dump_register(GUSB2PHYACC(7)), 137 dump_register(GUSB2PHYACC(8)), 138 dump_register(GUSB2PHYACC(9)), 139 dump_register(GUSB2PHYACC(10)), 140 dump_register(GUSB2PHYACC(11)), 141 dump_register(GUSB2PHYACC(12)), 142 dump_register(GUSB2PHYACC(13)), 143 dump_register(GUSB2PHYACC(14)), 144 dump_register(GUSB2PHYACC(15)), 145 146 dump_register(GUSB3PIPECTL(0)), 147 dump_register(GUSB3PIPECTL(1)), 148 dump_register(GUSB3PIPECTL(2)), 149 dump_register(GUSB3PIPECTL(3)), 150 dump_register(GUSB3PIPECTL(4)), 151 dump_register(GUSB3PIPECTL(5)), 152 dump_register(GUSB3PIPECTL(6)), 153 dump_register(GUSB3PIPECTL(7)), 154 dump_register(GUSB3PIPECTL(8)), 155 dump_register(GUSB3PIPECTL(9)), 156 dump_register(GUSB3PIPECTL(10)), 157 dump_register(GUSB3PIPECTL(11)), 158 dump_register(GUSB3PIPECTL(12)), 159 dump_register(GUSB3PIPECTL(13)), 160 dump_register(GUSB3PIPECTL(14)), 161 dump_register(GUSB3PIPECTL(15)), 162 163 dump_register(GTXFIFOSIZ(0)), 164 dump_register(GTXFIFOSIZ(1)), 165 dump_register(GTXFIFOSIZ(2)), 166 dump_register(GTXFIFOSIZ(3)), 167 dump_register(GTXFIFOSIZ(4)), 168 dump_register(GTXFIFOSIZ(5)), 169 dump_register(GTXFIFOSIZ(6)), 170 dump_register(GTXFIFOSIZ(7)), 171 dump_register(GTXFIFOSIZ(8)), 172 dump_register(GTXFIFOSIZ(9)), 173 dump_register(GTXFIFOSIZ(10)), 174 dump_register(GTXFIFOSIZ(11)), 175 dump_register(GTXFIFOSIZ(12)), 176 dump_register(GTXFIFOSIZ(13)), 177 dump_register(GTXFIFOSIZ(14)), 178 dump_register(GTXFIFOSIZ(15)), 179 dump_register(GTXFIFOSIZ(16)), 180 dump_register(GTXFIFOSIZ(17)), 181 dump_register(GTXFIFOSIZ(18)), 182 dump_register(GTXFIFOSIZ(19)), 183 dump_register(GTXFIFOSIZ(20)), 184 dump_register(GTXFIFOSIZ(21)), 185 dump_register(GTXFIFOSIZ(22)), 186 dump_register(GTXFIFOSIZ(23)), 187 dump_register(GTXFIFOSIZ(24)), 188 dump_register(GTXFIFOSIZ(25)), 189 dump_register(GTXFIFOSIZ(26)), 190 dump_register(GTXFIFOSIZ(27)), 191 dump_register(GTXFIFOSIZ(28)), 192 dump_register(GTXFIFOSIZ(29)), 193 dump_register(GTXFIFOSIZ(30)), 194 dump_register(GTXFIFOSIZ(31)), 195 196 dump_register(GRXFIFOSIZ(0)), 197 dump_register(GRXFIFOSIZ(1)), 198 dump_register(GRXFIFOSIZ(2)), 199 dump_register(GRXFIFOSIZ(3)), 200 dump_register(GRXFIFOSIZ(4)), 201 dump_register(GRXFIFOSIZ(5)), 202 dump_register(GRXFIFOSIZ(6)), 203 dump_register(GRXFIFOSIZ(7)), 204 dump_register(GRXFIFOSIZ(8)), 205 dump_register(GRXFIFOSIZ(9)), 206 dump_register(GRXFIFOSIZ(10)), 207 dump_register(GRXFIFOSIZ(11)), 208 dump_register(GRXFIFOSIZ(12)), 209 dump_register(GRXFIFOSIZ(13)), 210 dump_register(GRXFIFOSIZ(14)), 211 dump_register(GRXFIFOSIZ(15)), 212 dump_register(GRXFIFOSIZ(16)), 213 dump_register(GRXFIFOSIZ(17)), 214 dump_register(GRXFIFOSIZ(18)), 215 dump_register(GRXFIFOSIZ(19)), 216 dump_register(GRXFIFOSIZ(20)), 217 dump_register(GRXFIFOSIZ(21)), 218 dump_register(GRXFIFOSIZ(22)), 219 dump_register(GRXFIFOSIZ(23)), 220 dump_register(GRXFIFOSIZ(24)), 221 dump_register(GRXFIFOSIZ(25)), 222 dump_register(GRXFIFOSIZ(26)), 223 dump_register(GRXFIFOSIZ(27)), 224 dump_register(GRXFIFOSIZ(28)), 225 dump_register(GRXFIFOSIZ(29)), 226 dump_register(GRXFIFOSIZ(30)), 227 dump_register(GRXFIFOSIZ(31)), 228 229 dump_register(GEVNTADRLO(0)), 230 dump_register(GEVNTADRHI(0)), 231 dump_register(GEVNTSIZ(0)), 232 dump_register(GEVNTCOUNT(0)), 233 234 dump_register(GHWPARAMS8), 235 dump_register(GUCTL3), 236 dump_register(GFLADJ), 237 dump_register(DCFG), 238 dump_register(DCTL), 239 dump_register(DEVTEN), 240 dump_register(DSTS), 241 dump_register(DGCMDPAR), 242 dump_register(DGCMD), 243 dump_register(DALEPENA), 244 245 dump_ep_register_set(0), 246 dump_ep_register_set(1), 247 dump_ep_register_set(2), 248 dump_ep_register_set(3), 249 dump_ep_register_set(4), 250 dump_ep_register_set(5), 251 dump_ep_register_set(6), 252 dump_ep_register_set(7), 253 dump_ep_register_set(8), 254 dump_ep_register_set(9), 255 dump_ep_register_set(10), 256 dump_ep_register_set(11), 257 dump_ep_register_set(12), 258 dump_ep_register_set(13), 259 dump_ep_register_set(14), 260 dump_ep_register_set(15), 261 dump_ep_register_set(16), 262 dump_ep_register_set(17), 263 dump_ep_register_set(18), 264 dump_ep_register_set(19), 265 dump_ep_register_set(20), 266 dump_ep_register_set(21), 267 dump_ep_register_set(22), 268 dump_ep_register_set(23), 269 dump_ep_register_set(24), 270 dump_ep_register_set(25), 271 dump_ep_register_set(26), 272 dump_ep_register_set(27), 273 dump_ep_register_set(28), 274 dump_ep_register_set(29), 275 dump_ep_register_set(30), 276 dump_ep_register_set(31), 277 278 dump_register(OCFG), 279 dump_register(OCTL), 280 dump_register(OEVT), 281 dump_register(OEVTEN), 282 dump_register(OSTS), 283 }; 284 285 static void dwc3_host_lsp(struct seq_file *s) 286 { 287 struct dwc3 *dwc = s->private; 288 bool dbc_enabled; 289 u32 sel; 290 u32 reg; 291 u32 val; 292 293 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC); 294 295 sel = dwc->dbg_lsp_select; 296 if (sel == DWC3_LSP_MUX_UNSELECTED) { 297 seq_puts(s, "Write LSP selection to print for host\n"); 298 return; 299 } 300 301 reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel); 302 303 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 304 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 305 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val); 306 307 if (dbc_enabled && sel < 256) { 308 reg |= DWC3_GDBGLSPMUX_ENDBC; 309 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 310 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 311 seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val); 312 } 313 } 314 315 static void dwc3_gadget_lsp(struct seq_file *s) 316 { 317 struct dwc3 *dwc = s->private; 318 int i; 319 u32 reg; 320 321 for (i = 0; i < 16; i++) { 322 reg = DWC3_GDBGLSPMUX_DEVSELECT(i); 323 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 324 reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 325 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg); 326 } 327 } 328 329 static int dwc3_lsp_show(struct seq_file *s, void *unused) 330 { 331 struct dwc3 *dwc = s->private; 332 unsigned int current_mode; 333 unsigned long flags; 334 u32 reg; 335 336 spin_lock_irqsave(&dwc->lock, flags); 337 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 338 current_mode = DWC3_GSTS_CURMOD(reg); 339 340 switch (current_mode) { 341 case DWC3_GSTS_CURMOD_HOST: 342 dwc3_host_lsp(s); 343 break; 344 case DWC3_GSTS_CURMOD_DEVICE: 345 dwc3_gadget_lsp(s); 346 break; 347 default: 348 seq_puts(s, "Mode is unknown, no LSP register printed\n"); 349 break; 350 } 351 spin_unlock_irqrestore(&dwc->lock, flags); 352 353 return 0; 354 } 355 356 static int dwc3_lsp_open(struct inode *inode, struct file *file) 357 { 358 return single_open(file, dwc3_lsp_show, inode->i_private); 359 } 360 361 static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf, 362 size_t count, loff_t *ppos) 363 { 364 struct seq_file *s = file->private_data; 365 struct dwc3 *dwc = s->private; 366 unsigned long flags; 367 char buf[32] = { 0 }; 368 u32 sel; 369 int ret; 370 371 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 372 return -EFAULT; 373 374 ret = kstrtouint(buf, 0, &sel); 375 if (ret) 376 return ret; 377 378 spin_lock_irqsave(&dwc->lock, flags); 379 dwc->dbg_lsp_select = sel; 380 spin_unlock_irqrestore(&dwc->lock, flags); 381 382 return count; 383 } 384 385 static const struct file_operations dwc3_lsp_fops = { 386 .open = dwc3_lsp_open, 387 .write = dwc3_lsp_write, 388 .read = seq_read, 389 .llseek = seq_lseek, 390 .release = single_release, 391 }; 392 393 static int dwc3_mode_show(struct seq_file *s, void *unused) 394 { 395 struct dwc3 *dwc = s->private; 396 unsigned long flags; 397 u32 reg; 398 399 spin_lock_irqsave(&dwc->lock, flags); 400 reg = dwc3_readl(dwc->regs, DWC3_GCTL); 401 spin_unlock_irqrestore(&dwc->lock, flags); 402 403 switch (DWC3_GCTL_PRTCAP(reg)) { 404 case DWC3_GCTL_PRTCAP_HOST: 405 seq_puts(s, "host\n"); 406 break; 407 case DWC3_GCTL_PRTCAP_DEVICE: 408 seq_puts(s, "device\n"); 409 break; 410 case DWC3_GCTL_PRTCAP_OTG: 411 seq_puts(s, "otg\n"); 412 break; 413 default: 414 seq_printf(s, "UNKNOWN %08x\n", DWC3_GCTL_PRTCAP(reg)); 415 } 416 417 return 0; 418 } 419 420 static int dwc3_mode_open(struct inode *inode, struct file *file) 421 { 422 return single_open(file, dwc3_mode_show, inode->i_private); 423 } 424 425 static ssize_t dwc3_mode_write(struct file *file, 426 const char __user *ubuf, size_t count, loff_t *ppos) 427 { 428 struct seq_file *s = file->private_data; 429 struct dwc3 *dwc = s->private; 430 u32 mode = 0; 431 char buf[32]; 432 433 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 434 return -EFAULT; 435 436 if (dwc->dr_mode != USB_DR_MODE_OTG) 437 return count; 438 439 if (!strncmp(buf, "host", 4)) 440 mode = DWC3_GCTL_PRTCAP_HOST; 441 442 if (!strncmp(buf, "device", 6)) 443 mode = DWC3_GCTL_PRTCAP_DEVICE; 444 445 if (!strncmp(buf, "otg", 3)) 446 mode = DWC3_GCTL_PRTCAP_OTG; 447 448 dwc3_set_mode(dwc, mode); 449 450 return count; 451 } 452 453 static const struct file_operations dwc3_mode_fops = { 454 .open = dwc3_mode_open, 455 .write = dwc3_mode_write, 456 .read = seq_read, 457 .llseek = seq_lseek, 458 .release = single_release, 459 }; 460 461 static int dwc3_testmode_show(struct seq_file *s, void *unused) 462 { 463 struct dwc3 *dwc = s->private; 464 unsigned long flags; 465 u32 reg; 466 467 spin_lock_irqsave(&dwc->lock, flags); 468 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 469 reg &= DWC3_DCTL_TSTCTRL_MASK; 470 reg >>= 1; 471 spin_unlock_irqrestore(&dwc->lock, flags); 472 473 switch (reg) { 474 case 0: 475 seq_puts(s, "no test\n"); 476 break; 477 case USB_TEST_J: 478 seq_puts(s, "test_j\n"); 479 break; 480 case USB_TEST_K: 481 seq_puts(s, "test_k\n"); 482 break; 483 case USB_TEST_SE0_NAK: 484 seq_puts(s, "test_se0_nak\n"); 485 break; 486 case USB_TEST_PACKET: 487 seq_puts(s, "test_packet\n"); 488 break; 489 case USB_TEST_FORCE_ENABLE: 490 seq_puts(s, "test_force_enable\n"); 491 break; 492 default: 493 seq_printf(s, "UNKNOWN %d\n", reg); 494 } 495 496 return 0; 497 } 498 499 static int dwc3_testmode_open(struct inode *inode, struct file *file) 500 { 501 return single_open(file, dwc3_testmode_show, inode->i_private); 502 } 503 504 static ssize_t dwc3_testmode_write(struct file *file, 505 const char __user *ubuf, size_t count, loff_t *ppos) 506 { 507 struct seq_file *s = file->private_data; 508 struct dwc3 *dwc = s->private; 509 unsigned long flags; 510 u32 testmode = 0; 511 char buf[32]; 512 513 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 514 return -EFAULT; 515 516 if (!strncmp(buf, "test_j", 6)) 517 testmode = USB_TEST_J; 518 else if (!strncmp(buf, "test_k", 6)) 519 testmode = USB_TEST_K; 520 else if (!strncmp(buf, "test_se0_nak", 12)) 521 testmode = USB_TEST_SE0_NAK; 522 else if (!strncmp(buf, "test_packet", 11)) 523 testmode = USB_TEST_PACKET; 524 else if (!strncmp(buf, "test_force_enable", 17)) 525 testmode = USB_TEST_FORCE_ENABLE; 526 else 527 testmode = 0; 528 529 spin_lock_irqsave(&dwc->lock, flags); 530 dwc3_gadget_set_test_mode(dwc, testmode); 531 spin_unlock_irqrestore(&dwc->lock, flags); 532 533 return count; 534 } 535 536 static const struct file_operations dwc3_testmode_fops = { 537 .open = dwc3_testmode_open, 538 .write = dwc3_testmode_write, 539 .read = seq_read, 540 .llseek = seq_lseek, 541 .release = single_release, 542 }; 543 544 static int dwc3_link_state_show(struct seq_file *s, void *unused) 545 { 546 struct dwc3 *dwc = s->private; 547 unsigned long flags; 548 enum dwc3_link_state state; 549 u32 reg; 550 u8 speed; 551 552 spin_lock_irqsave(&dwc->lock, flags); 553 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 554 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 555 seq_puts(s, "Not available\n"); 556 spin_unlock_irqrestore(&dwc->lock, flags); 557 return 0; 558 } 559 560 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 561 state = DWC3_DSTS_USBLNKST(reg); 562 speed = reg & DWC3_DSTS_CONNECTSPD; 563 564 seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ? 565 dwc3_gadget_link_string(state) : 566 dwc3_gadget_hs_link_string(state)); 567 spin_unlock_irqrestore(&dwc->lock, flags); 568 569 return 0; 570 } 571 572 static int dwc3_link_state_open(struct inode *inode, struct file *file) 573 { 574 return single_open(file, dwc3_link_state_show, inode->i_private); 575 } 576 577 static ssize_t dwc3_link_state_write(struct file *file, 578 const char __user *ubuf, size_t count, loff_t *ppos) 579 { 580 struct seq_file *s = file->private_data; 581 struct dwc3 *dwc = s->private; 582 unsigned long flags; 583 enum dwc3_link_state state = 0; 584 char buf[32]; 585 u32 reg; 586 u8 speed; 587 588 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 589 return -EFAULT; 590 591 if (!strncmp(buf, "SS.Disabled", 11)) 592 state = DWC3_LINK_STATE_SS_DIS; 593 else if (!strncmp(buf, "Rx.Detect", 9)) 594 state = DWC3_LINK_STATE_RX_DET; 595 else if (!strncmp(buf, "SS.Inactive", 11)) 596 state = DWC3_LINK_STATE_SS_INACT; 597 else if (!strncmp(buf, "Recovery", 8)) 598 state = DWC3_LINK_STATE_RECOV; 599 else if (!strncmp(buf, "Compliance", 10)) 600 state = DWC3_LINK_STATE_CMPLY; 601 else if (!strncmp(buf, "Loopback", 8)) 602 state = DWC3_LINK_STATE_LPBK; 603 else 604 return -EINVAL; 605 606 spin_lock_irqsave(&dwc->lock, flags); 607 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 608 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 609 spin_unlock_irqrestore(&dwc->lock, flags); 610 return -EINVAL; 611 } 612 613 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 614 speed = reg & DWC3_DSTS_CONNECTSPD; 615 616 if (speed < DWC3_DSTS_SUPERSPEED && 617 state != DWC3_LINK_STATE_RECOV) { 618 spin_unlock_irqrestore(&dwc->lock, flags); 619 return -EINVAL; 620 } 621 622 dwc3_gadget_set_link_state(dwc, state); 623 spin_unlock_irqrestore(&dwc->lock, flags); 624 625 return count; 626 } 627 628 static const struct file_operations dwc3_link_state_fops = { 629 .open = dwc3_link_state_open, 630 .write = dwc3_link_state_write, 631 .read = seq_read, 632 .llseek = seq_lseek, 633 .release = single_release, 634 }; 635 636 struct dwc3_ep_file_map { 637 const char name[25]; 638 const struct file_operations *const fops; 639 }; 640 641 static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused) 642 { 643 struct dwc3_ep *dep = s->private; 644 struct dwc3 *dwc = dep->dwc; 645 unsigned long flags; 646 u32 mdwidth; 647 u32 val; 648 649 spin_lock_irqsave(&dwc->lock, flags); 650 val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); 651 652 /* Convert to bytes */ 653 mdwidth = dwc3_mdwidth(dwc); 654 655 val *= mdwidth; 656 val >>= 3; 657 seq_printf(s, "%u\n", val); 658 spin_unlock_irqrestore(&dwc->lock, flags); 659 660 return 0; 661 } 662 663 static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused) 664 { 665 struct dwc3_ep *dep = s->private; 666 struct dwc3 *dwc = dep->dwc; 667 unsigned long flags; 668 u32 mdwidth; 669 u32 val; 670 671 spin_lock_irqsave(&dwc->lock, flags); 672 val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); 673 674 /* Convert to bytes */ 675 mdwidth = dwc3_mdwidth(dwc); 676 677 val *= mdwidth; 678 val >>= 3; 679 seq_printf(s, "%u\n", val); 680 spin_unlock_irqrestore(&dwc->lock, flags); 681 682 return 0; 683 } 684 685 static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused) 686 { 687 struct dwc3_ep *dep = s->private; 688 struct dwc3 *dwc = dep->dwc; 689 unsigned long flags; 690 u32 val; 691 692 spin_lock_irqsave(&dwc->lock, flags); 693 val = dwc3_core_fifo_space(dep, DWC3_TXREQQ); 694 seq_printf(s, "%u\n", val); 695 spin_unlock_irqrestore(&dwc->lock, flags); 696 697 return 0; 698 } 699 700 static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused) 701 { 702 struct dwc3_ep *dep = s->private; 703 struct dwc3 *dwc = dep->dwc; 704 unsigned long flags; 705 u32 val; 706 707 spin_lock_irqsave(&dwc->lock, flags); 708 val = dwc3_core_fifo_space(dep, DWC3_RXREQQ); 709 seq_printf(s, "%u\n", val); 710 spin_unlock_irqrestore(&dwc->lock, flags); 711 712 return 0; 713 } 714 715 static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused) 716 { 717 struct dwc3_ep *dep = s->private; 718 struct dwc3 *dwc = dep->dwc; 719 unsigned long flags; 720 u32 val; 721 722 spin_lock_irqsave(&dwc->lock, flags); 723 val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ); 724 seq_printf(s, "%u\n", val); 725 spin_unlock_irqrestore(&dwc->lock, flags); 726 727 return 0; 728 } 729 730 static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused) 731 { 732 struct dwc3_ep *dep = s->private; 733 struct dwc3 *dwc = dep->dwc; 734 unsigned long flags; 735 u32 val; 736 737 spin_lock_irqsave(&dwc->lock, flags); 738 val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ); 739 seq_printf(s, "%u\n", val); 740 spin_unlock_irqrestore(&dwc->lock, flags); 741 742 return 0; 743 } 744 745 static int dwc3_event_queue_show(struct seq_file *s, void *unused) 746 { 747 struct dwc3_ep *dep = s->private; 748 struct dwc3 *dwc = dep->dwc; 749 unsigned long flags; 750 u32 val; 751 752 spin_lock_irqsave(&dwc->lock, flags); 753 val = dwc3_core_fifo_space(dep, DWC3_EVENTQ); 754 seq_printf(s, "%u\n", val); 755 spin_unlock_irqrestore(&dwc->lock, flags); 756 757 return 0; 758 } 759 760 static int dwc3_transfer_type_show(struct seq_file *s, void *unused) 761 { 762 struct dwc3_ep *dep = s->private; 763 struct dwc3 *dwc = dep->dwc; 764 unsigned long flags; 765 766 spin_lock_irqsave(&dwc->lock, flags); 767 if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) { 768 seq_puts(s, "--\n"); 769 goto out; 770 } 771 772 switch (usb_endpoint_type(dep->endpoint.desc)) { 773 case USB_ENDPOINT_XFER_CONTROL: 774 seq_puts(s, "control\n"); 775 break; 776 case USB_ENDPOINT_XFER_ISOC: 777 seq_puts(s, "isochronous\n"); 778 break; 779 case USB_ENDPOINT_XFER_BULK: 780 seq_puts(s, "bulk\n"); 781 break; 782 case USB_ENDPOINT_XFER_INT: 783 seq_puts(s, "interrupt\n"); 784 break; 785 default: 786 seq_puts(s, "--\n"); 787 } 788 789 out: 790 spin_unlock_irqrestore(&dwc->lock, flags); 791 792 return 0; 793 } 794 795 static int dwc3_trb_ring_show(struct seq_file *s, void *unused) 796 { 797 struct dwc3_ep *dep = s->private; 798 struct dwc3 *dwc = dep->dwc; 799 unsigned long flags; 800 int i; 801 802 spin_lock_irqsave(&dwc->lock, flags); 803 if (dep->number <= 1) { 804 seq_puts(s, "--\n"); 805 goto out; 806 } 807 808 seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n"); 809 810 for (i = 0; i < DWC3_TRB_NUM; i++) { 811 struct dwc3_trb *trb = &dep->trb_pool[i]; 812 unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl); 813 814 seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d %c%c\n", 815 trb->bph, trb->bpl, trb->size, 816 dwc3_trb_type_string(type), 817 !!(trb->ctrl & DWC3_TRB_CTRL_IOC), 818 !!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI), 819 !!(trb->ctrl & DWC3_TRB_CTRL_CSP), 820 !!(trb->ctrl & DWC3_TRB_CTRL_CHN), 821 !!(trb->ctrl & DWC3_TRB_CTRL_LST), 822 !!(trb->ctrl & DWC3_TRB_CTRL_HWO), 823 dep->trb_enqueue == i ? 'E' : ' ', 824 dep->trb_dequeue == i ? 'D' : ' '); 825 } 826 827 out: 828 spin_unlock_irqrestore(&dwc->lock, flags); 829 830 return 0; 831 } 832 833 static int dwc3_ep_info_register_show(struct seq_file *s, void *unused) 834 { 835 struct dwc3_ep *dep = s->private; 836 struct dwc3 *dwc = dep->dwc; 837 unsigned long flags; 838 u64 ep_info; 839 u32 lower_32_bits; 840 u32 upper_32_bits; 841 u32 reg; 842 843 spin_lock_irqsave(&dwc->lock, flags); 844 reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); 845 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 846 847 lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0); 848 upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1); 849 850 ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; 851 seq_printf(s, "0x%016llx\n", ep_info); 852 spin_unlock_irqrestore(&dwc->lock, flags); 853 854 return 0; 855 } 856 857 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size); 858 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size); 859 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue); 860 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue); 861 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue); 862 DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue); 863 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue); 864 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type); 865 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring); 866 DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register); 867 868 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = { 869 { "tx_fifo_size", &dwc3_tx_fifo_size_fops, }, 870 { "rx_fifo_size", &dwc3_rx_fifo_size_fops, }, 871 { "tx_request_queue", &dwc3_tx_request_queue_fops, }, 872 { "rx_request_queue", &dwc3_rx_request_queue_fops, }, 873 { "rx_info_queue", &dwc3_rx_info_queue_fops, }, 874 { "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, }, 875 { "event_queue", &dwc3_event_queue_fops, }, 876 { "transfer_type", &dwc3_transfer_type_fops, }, 877 { "trb_ring", &dwc3_trb_ring_fops, }, 878 { "GDBGEPINFO", &dwc3_ep_info_register_fops, }, 879 }; 880 881 void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep) 882 { 883 struct dentry *dir; 884 int i; 885 886 dir = debugfs_create_dir(dep->name, dep->dwc->debug_root); 887 for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) { 888 const struct file_operations *fops = dwc3_ep_file_map[i].fops; 889 const char *name = dwc3_ep_file_map[i].name; 890 891 debugfs_create_file(name, 0444, dir, dep, fops); 892 } 893 } 894 895 void dwc3_debugfs_remove_endpoint_dir(struct dwc3_ep *dep) 896 { 897 debugfs_lookup_and_remove(dep->name, dep->dwc->debug_root); 898 } 899 900 void dwc3_debugfs_init(struct dwc3 *dwc) 901 { 902 struct dentry *root; 903 904 dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL); 905 if (!dwc->regset) 906 return; 907 908 dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED; 909 910 dwc->regset->regs = dwc3_regs; 911 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); 912 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; 913 914 root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root); 915 dwc->debug_root = root; 916 debugfs_create_regset32("regdump", 0444, root, dwc->regset); 917 debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops); 918 919 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) 920 debugfs_create_file("mode", 0644, root, dwc, 921 &dwc3_mode_fops); 922 923 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) || 924 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 925 debugfs_create_file("testmode", 0644, root, dwc, 926 &dwc3_testmode_fops); 927 debugfs_create_file("link_state", 0644, root, dwc, 928 &dwc3_link_state_fops); 929 } 930 } 931 932 void dwc3_debugfs_exit(struct dwc3 *dwc) 933 { 934 debugfs_lookup_and_remove(dev_name(dwc->dev), usb_debug_root); 935 kfree(dwc->regset); 936 } 937