1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * debugfs.c - DesignWare USB3 DRD Controller DebugFS file 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/ptrace.h> 14 #include <linux/types.h> 15 #include <linux/spinlock.h> 16 #include <linux/debugfs.h> 17 #include <linux/seq_file.h> 18 #include <linux/delay.h> 19 #include <linux/uaccess.h> 20 21 #include <linux/usb/ch9.h> 22 23 #include "core.h" 24 #include "gadget.h" 25 #include "io.h" 26 #include "debug.h" 27 28 #define DWC3_LSP_MUX_UNSELECTED 0xfffff 29 30 #define dump_register(nm) \ 31 { \ 32 .name = __stringify(nm), \ 33 .offset = DWC3_ ##nm, \ 34 } 35 36 #define dump_ep_register_set(n) \ 37 { \ 38 .name = "DEPCMDPAR2("__stringify(n)")", \ 39 .offset = DWC3_DEP_BASE(n) + \ 40 DWC3_DEPCMDPAR2, \ 41 }, \ 42 { \ 43 .name = "DEPCMDPAR1("__stringify(n)")", \ 44 .offset = DWC3_DEP_BASE(n) + \ 45 DWC3_DEPCMDPAR1, \ 46 }, \ 47 { \ 48 .name = "DEPCMDPAR0("__stringify(n)")", \ 49 .offset = DWC3_DEP_BASE(n) + \ 50 DWC3_DEPCMDPAR0, \ 51 }, \ 52 { \ 53 .name = "DEPCMD("__stringify(n)")", \ 54 .offset = DWC3_DEP_BASE(n) + \ 55 DWC3_DEPCMD, \ 56 } 57 58 59 static const struct debugfs_reg32 dwc3_regs[] = { 60 dump_register(GSBUSCFG0), 61 dump_register(GSBUSCFG1), 62 dump_register(GTXTHRCFG), 63 dump_register(GRXTHRCFG), 64 dump_register(GCTL), 65 dump_register(GEVTEN), 66 dump_register(GSTS), 67 dump_register(GUCTL1), 68 dump_register(GSNPSID), 69 dump_register(GGPIO), 70 dump_register(GUID), 71 dump_register(GUCTL), 72 dump_register(GBUSERRADDR0), 73 dump_register(GBUSERRADDR1), 74 dump_register(GPRTBIMAP0), 75 dump_register(GPRTBIMAP1), 76 dump_register(GHWPARAMS0), 77 dump_register(GHWPARAMS1), 78 dump_register(GHWPARAMS2), 79 dump_register(GHWPARAMS3), 80 dump_register(GHWPARAMS4), 81 dump_register(GHWPARAMS5), 82 dump_register(GHWPARAMS6), 83 dump_register(GHWPARAMS7), 84 dump_register(GDBGFIFOSPACE), 85 dump_register(GDBGLTSSM), 86 dump_register(GDBGBMU), 87 dump_register(GPRTBIMAP_HS0), 88 dump_register(GPRTBIMAP_HS1), 89 dump_register(GPRTBIMAP_FS0), 90 dump_register(GPRTBIMAP_FS1), 91 dump_register(GUCTL2), 92 dump_register(VER_NUMBER), 93 dump_register(VER_TYPE), 94 95 dump_register(GUSB2PHYCFG(0)), 96 dump_register(GUSB2PHYCFG(1)), 97 dump_register(GUSB2PHYCFG(2)), 98 dump_register(GUSB2PHYCFG(3)), 99 dump_register(GUSB2PHYCFG(4)), 100 dump_register(GUSB2PHYCFG(5)), 101 dump_register(GUSB2PHYCFG(6)), 102 dump_register(GUSB2PHYCFG(7)), 103 dump_register(GUSB2PHYCFG(8)), 104 dump_register(GUSB2PHYCFG(9)), 105 dump_register(GUSB2PHYCFG(10)), 106 dump_register(GUSB2PHYCFG(11)), 107 dump_register(GUSB2PHYCFG(12)), 108 dump_register(GUSB2PHYCFG(13)), 109 dump_register(GUSB2PHYCFG(14)), 110 dump_register(GUSB2PHYCFG(15)), 111 112 dump_register(GUSB2I2CCTL(0)), 113 dump_register(GUSB2I2CCTL(1)), 114 dump_register(GUSB2I2CCTL(2)), 115 dump_register(GUSB2I2CCTL(3)), 116 dump_register(GUSB2I2CCTL(4)), 117 dump_register(GUSB2I2CCTL(5)), 118 dump_register(GUSB2I2CCTL(6)), 119 dump_register(GUSB2I2CCTL(7)), 120 dump_register(GUSB2I2CCTL(8)), 121 dump_register(GUSB2I2CCTL(9)), 122 dump_register(GUSB2I2CCTL(10)), 123 dump_register(GUSB2I2CCTL(11)), 124 dump_register(GUSB2I2CCTL(12)), 125 dump_register(GUSB2I2CCTL(13)), 126 dump_register(GUSB2I2CCTL(14)), 127 dump_register(GUSB2I2CCTL(15)), 128 129 dump_register(GUSB2PHYACC(0)), 130 dump_register(GUSB2PHYACC(1)), 131 dump_register(GUSB2PHYACC(2)), 132 dump_register(GUSB2PHYACC(3)), 133 dump_register(GUSB2PHYACC(4)), 134 dump_register(GUSB2PHYACC(5)), 135 dump_register(GUSB2PHYACC(6)), 136 dump_register(GUSB2PHYACC(7)), 137 dump_register(GUSB2PHYACC(8)), 138 dump_register(GUSB2PHYACC(9)), 139 dump_register(GUSB2PHYACC(10)), 140 dump_register(GUSB2PHYACC(11)), 141 dump_register(GUSB2PHYACC(12)), 142 dump_register(GUSB2PHYACC(13)), 143 dump_register(GUSB2PHYACC(14)), 144 dump_register(GUSB2PHYACC(15)), 145 146 dump_register(GUSB3PIPECTL(0)), 147 dump_register(GUSB3PIPECTL(1)), 148 dump_register(GUSB3PIPECTL(2)), 149 dump_register(GUSB3PIPECTL(3)), 150 dump_register(GUSB3PIPECTL(4)), 151 dump_register(GUSB3PIPECTL(5)), 152 dump_register(GUSB3PIPECTL(6)), 153 dump_register(GUSB3PIPECTL(7)), 154 dump_register(GUSB3PIPECTL(8)), 155 dump_register(GUSB3PIPECTL(9)), 156 dump_register(GUSB3PIPECTL(10)), 157 dump_register(GUSB3PIPECTL(11)), 158 dump_register(GUSB3PIPECTL(12)), 159 dump_register(GUSB3PIPECTL(13)), 160 dump_register(GUSB3PIPECTL(14)), 161 dump_register(GUSB3PIPECTL(15)), 162 163 dump_register(GTXFIFOSIZ(0)), 164 dump_register(GTXFIFOSIZ(1)), 165 dump_register(GTXFIFOSIZ(2)), 166 dump_register(GTXFIFOSIZ(3)), 167 dump_register(GTXFIFOSIZ(4)), 168 dump_register(GTXFIFOSIZ(5)), 169 dump_register(GTXFIFOSIZ(6)), 170 dump_register(GTXFIFOSIZ(7)), 171 dump_register(GTXFIFOSIZ(8)), 172 dump_register(GTXFIFOSIZ(9)), 173 dump_register(GTXFIFOSIZ(10)), 174 dump_register(GTXFIFOSIZ(11)), 175 dump_register(GTXFIFOSIZ(12)), 176 dump_register(GTXFIFOSIZ(13)), 177 dump_register(GTXFIFOSIZ(14)), 178 dump_register(GTXFIFOSIZ(15)), 179 dump_register(GTXFIFOSIZ(16)), 180 dump_register(GTXFIFOSIZ(17)), 181 dump_register(GTXFIFOSIZ(18)), 182 dump_register(GTXFIFOSIZ(19)), 183 dump_register(GTXFIFOSIZ(20)), 184 dump_register(GTXFIFOSIZ(21)), 185 dump_register(GTXFIFOSIZ(22)), 186 dump_register(GTXFIFOSIZ(23)), 187 dump_register(GTXFIFOSIZ(24)), 188 dump_register(GTXFIFOSIZ(25)), 189 dump_register(GTXFIFOSIZ(26)), 190 dump_register(GTXFIFOSIZ(27)), 191 dump_register(GTXFIFOSIZ(28)), 192 dump_register(GTXFIFOSIZ(29)), 193 dump_register(GTXFIFOSIZ(30)), 194 dump_register(GTXFIFOSIZ(31)), 195 196 dump_register(GRXFIFOSIZ(0)), 197 dump_register(GRXFIFOSIZ(1)), 198 dump_register(GRXFIFOSIZ(2)), 199 dump_register(GRXFIFOSIZ(3)), 200 dump_register(GRXFIFOSIZ(4)), 201 dump_register(GRXFIFOSIZ(5)), 202 dump_register(GRXFIFOSIZ(6)), 203 dump_register(GRXFIFOSIZ(7)), 204 dump_register(GRXFIFOSIZ(8)), 205 dump_register(GRXFIFOSIZ(9)), 206 dump_register(GRXFIFOSIZ(10)), 207 dump_register(GRXFIFOSIZ(11)), 208 dump_register(GRXFIFOSIZ(12)), 209 dump_register(GRXFIFOSIZ(13)), 210 dump_register(GRXFIFOSIZ(14)), 211 dump_register(GRXFIFOSIZ(15)), 212 dump_register(GRXFIFOSIZ(16)), 213 dump_register(GRXFIFOSIZ(17)), 214 dump_register(GRXFIFOSIZ(18)), 215 dump_register(GRXFIFOSIZ(19)), 216 dump_register(GRXFIFOSIZ(20)), 217 dump_register(GRXFIFOSIZ(21)), 218 dump_register(GRXFIFOSIZ(22)), 219 dump_register(GRXFIFOSIZ(23)), 220 dump_register(GRXFIFOSIZ(24)), 221 dump_register(GRXFIFOSIZ(25)), 222 dump_register(GRXFIFOSIZ(26)), 223 dump_register(GRXFIFOSIZ(27)), 224 dump_register(GRXFIFOSIZ(28)), 225 dump_register(GRXFIFOSIZ(29)), 226 dump_register(GRXFIFOSIZ(30)), 227 dump_register(GRXFIFOSIZ(31)), 228 229 dump_register(GEVNTADRLO(0)), 230 dump_register(GEVNTADRHI(0)), 231 dump_register(GEVNTSIZ(0)), 232 dump_register(GEVNTCOUNT(0)), 233 234 dump_register(GHWPARAMS8), 235 dump_register(GUCTL3), 236 dump_register(GFLADJ), 237 dump_register(DCFG), 238 dump_register(DCTL), 239 dump_register(DEVTEN), 240 dump_register(DSTS), 241 dump_register(DGCMDPAR), 242 dump_register(DGCMD), 243 dump_register(DALEPENA), 244 245 dump_ep_register_set(0), 246 dump_ep_register_set(1), 247 dump_ep_register_set(2), 248 dump_ep_register_set(3), 249 dump_ep_register_set(4), 250 dump_ep_register_set(5), 251 dump_ep_register_set(6), 252 dump_ep_register_set(7), 253 dump_ep_register_set(8), 254 dump_ep_register_set(9), 255 dump_ep_register_set(10), 256 dump_ep_register_set(11), 257 dump_ep_register_set(12), 258 dump_ep_register_set(13), 259 dump_ep_register_set(14), 260 dump_ep_register_set(15), 261 dump_ep_register_set(16), 262 dump_ep_register_set(17), 263 dump_ep_register_set(18), 264 dump_ep_register_set(19), 265 dump_ep_register_set(20), 266 dump_ep_register_set(21), 267 dump_ep_register_set(22), 268 dump_ep_register_set(23), 269 dump_ep_register_set(24), 270 dump_ep_register_set(25), 271 dump_ep_register_set(26), 272 dump_ep_register_set(27), 273 dump_ep_register_set(28), 274 dump_ep_register_set(29), 275 dump_ep_register_set(30), 276 dump_ep_register_set(31), 277 278 dump_register(OCFG), 279 dump_register(OCTL), 280 dump_register(OEVT), 281 dump_register(OEVTEN), 282 dump_register(OSTS), 283 }; 284 285 static void dwc3_host_lsp(struct seq_file *s) 286 { 287 struct dwc3 *dwc = s->private; 288 bool dbc_enabled; 289 u32 sel; 290 u32 reg; 291 u32 val; 292 293 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC); 294 295 sel = dwc->dbg_lsp_select; 296 if (sel == DWC3_LSP_MUX_UNSELECTED) { 297 seq_puts(s, "Write LSP selection to print for host\n"); 298 return; 299 } 300 301 reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel); 302 303 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 304 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 305 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val); 306 307 if (dbc_enabled && sel < 256) { 308 reg |= DWC3_GDBGLSPMUX_ENDBC; 309 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 310 val = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 311 seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val); 312 } 313 } 314 315 static void dwc3_gadget_lsp(struct seq_file *s) 316 { 317 struct dwc3 *dwc = s->private; 318 int i; 319 u32 reg; 320 321 for (i = 0; i < 16; i++) { 322 reg = DWC3_GDBGLSPMUX_DEVSELECT(i); 323 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 324 reg = dwc3_readl(dwc->regs, DWC3_GDBGLSP); 325 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg); 326 } 327 } 328 329 static int dwc3_lsp_show(struct seq_file *s, void *unused) 330 { 331 struct dwc3 *dwc = s->private; 332 unsigned int current_mode; 333 unsigned long flags; 334 u32 reg; 335 int ret; 336 337 ret = pm_runtime_resume_and_get(dwc->dev); 338 if (ret < 0) 339 return ret; 340 341 spin_lock_irqsave(&dwc->lock, flags); 342 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 343 current_mode = DWC3_GSTS_CURMOD(reg); 344 345 switch (current_mode) { 346 case DWC3_GSTS_CURMOD_HOST: 347 dwc3_host_lsp(s); 348 break; 349 case DWC3_GSTS_CURMOD_DEVICE: 350 dwc3_gadget_lsp(s); 351 break; 352 default: 353 seq_puts(s, "Mode is unknown, no LSP register printed\n"); 354 break; 355 } 356 spin_unlock_irqrestore(&dwc->lock, flags); 357 358 pm_runtime_put_sync(dwc->dev); 359 360 return 0; 361 } 362 363 static int dwc3_lsp_open(struct inode *inode, struct file *file) 364 { 365 return single_open(file, dwc3_lsp_show, inode->i_private); 366 } 367 368 static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf, 369 size_t count, loff_t *ppos) 370 { 371 struct seq_file *s = file->private_data; 372 struct dwc3 *dwc = s->private; 373 unsigned long flags; 374 char buf[32] = { 0 }; 375 u32 sel; 376 int ret; 377 378 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 379 return -EFAULT; 380 381 ret = kstrtouint(buf, 0, &sel); 382 if (ret) 383 return ret; 384 385 spin_lock_irqsave(&dwc->lock, flags); 386 dwc->dbg_lsp_select = sel; 387 spin_unlock_irqrestore(&dwc->lock, flags); 388 389 return count; 390 } 391 392 static const struct file_operations dwc3_lsp_fops = { 393 .open = dwc3_lsp_open, 394 .write = dwc3_lsp_write, 395 .read = seq_read, 396 .llseek = seq_lseek, 397 .release = single_release, 398 }; 399 400 static int dwc3_mode_show(struct seq_file *s, void *unused) 401 { 402 struct dwc3 *dwc = s->private; 403 unsigned long flags; 404 u32 reg; 405 u32 mode; 406 int ret; 407 408 ret = pm_runtime_resume_and_get(dwc->dev); 409 if (ret < 0) 410 return ret; 411 412 spin_lock_irqsave(&dwc->lock, flags); 413 reg = dwc3_readl(dwc->regs, DWC3_GCTL); 414 spin_unlock_irqrestore(&dwc->lock, flags); 415 416 mode = DWC3_GCTL_PRTCAP(reg); 417 switch (mode) { 418 case DWC3_GCTL_PRTCAP_HOST: 419 case DWC3_GCTL_PRTCAP_DEVICE: 420 case DWC3_GCTL_PRTCAP_OTG: 421 seq_printf(s, "%s\n", dwc3_mode_string(mode)); 422 break; 423 default: 424 seq_printf(s, "UNKNOWN %08x\n", mode); 425 } 426 427 pm_runtime_put_sync(dwc->dev); 428 429 return 0; 430 } 431 432 static int dwc3_mode_open(struct inode *inode, struct file *file) 433 { 434 return single_open(file, dwc3_mode_show, inode->i_private); 435 } 436 437 static ssize_t dwc3_mode_write(struct file *file, 438 const char __user *ubuf, size_t count, loff_t *ppos) 439 { 440 struct seq_file *s = file->private_data; 441 struct dwc3 *dwc = s->private; 442 u32 mode = 0; 443 char buf[32]; 444 445 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 446 return -EFAULT; 447 448 if (dwc->dr_mode != USB_DR_MODE_OTG) 449 return count; 450 451 if (!strncmp(buf, "host", 4)) 452 mode = DWC3_GCTL_PRTCAP_HOST; 453 454 if (!strncmp(buf, "device", 6)) 455 mode = DWC3_GCTL_PRTCAP_DEVICE; 456 457 if (!strncmp(buf, "otg", 3)) 458 mode = DWC3_GCTL_PRTCAP_OTG; 459 460 dwc3_set_mode(dwc, mode); 461 462 return count; 463 } 464 465 static const struct file_operations dwc3_mode_fops = { 466 .open = dwc3_mode_open, 467 .write = dwc3_mode_write, 468 .read = seq_read, 469 .llseek = seq_lseek, 470 .release = single_release, 471 }; 472 473 static int dwc3_testmode_show(struct seq_file *s, void *unused) 474 { 475 struct dwc3 *dwc = s->private; 476 unsigned long flags; 477 u32 reg; 478 int ret; 479 480 ret = pm_runtime_resume_and_get(dwc->dev); 481 if (ret < 0) 482 return ret; 483 484 spin_lock_irqsave(&dwc->lock, flags); 485 reg = dwc3_readl(dwc->regs, DWC3_DCTL); 486 reg &= DWC3_DCTL_TSTCTRL_MASK; 487 reg >>= 1; 488 spin_unlock_irqrestore(&dwc->lock, flags); 489 490 switch (reg) { 491 case 0: 492 seq_puts(s, "no test\n"); 493 break; 494 case USB_TEST_J: 495 seq_puts(s, "test_j\n"); 496 break; 497 case USB_TEST_K: 498 seq_puts(s, "test_k\n"); 499 break; 500 case USB_TEST_SE0_NAK: 501 seq_puts(s, "test_se0_nak\n"); 502 break; 503 case USB_TEST_PACKET: 504 seq_puts(s, "test_packet\n"); 505 break; 506 case USB_TEST_FORCE_ENABLE: 507 seq_puts(s, "test_force_enable\n"); 508 break; 509 default: 510 seq_printf(s, "UNKNOWN %d\n", reg); 511 } 512 513 pm_runtime_put_sync(dwc->dev); 514 515 return 0; 516 } 517 518 static int dwc3_testmode_open(struct inode *inode, struct file *file) 519 { 520 return single_open(file, dwc3_testmode_show, inode->i_private); 521 } 522 523 static ssize_t dwc3_testmode_write(struct file *file, 524 const char __user *ubuf, size_t count, loff_t *ppos) 525 { 526 struct seq_file *s = file->private_data; 527 struct dwc3 *dwc = s->private; 528 unsigned long flags; 529 u32 testmode = 0; 530 char buf[32]; 531 int ret; 532 533 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 534 return -EFAULT; 535 536 if (!strncmp(buf, "test_j", 6)) 537 testmode = USB_TEST_J; 538 else if (!strncmp(buf, "test_k", 6)) 539 testmode = USB_TEST_K; 540 else if (!strncmp(buf, "test_se0_nak", 12)) 541 testmode = USB_TEST_SE0_NAK; 542 else if (!strncmp(buf, "test_packet", 11)) 543 testmode = USB_TEST_PACKET; 544 else if (!strncmp(buf, "test_force_enable", 17)) 545 testmode = USB_TEST_FORCE_ENABLE; 546 else 547 testmode = 0; 548 549 ret = pm_runtime_resume_and_get(dwc->dev); 550 if (ret < 0) 551 return ret; 552 553 spin_lock_irqsave(&dwc->lock, flags); 554 dwc3_gadget_set_test_mode(dwc, testmode); 555 spin_unlock_irqrestore(&dwc->lock, flags); 556 557 pm_runtime_put_sync(dwc->dev); 558 559 return count; 560 } 561 562 static const struct file_operations dwc3_testmode_fops = { 563 .open = dwc3_testmode_open, 564 .write = dwc3_testmode_write, 565 .read = seq_read, 566 .llseek = seq_lseek, 567 .release = single_release, 568 }; 569 570 static int dwc3_link_state_show(struct seq_file *s, void *unused) 571 { 572 struct dwc3 *dwc = s->private; 573 unsigned long flags; 574 enum dwc3_link_state state; 575 u32 reg; 576 u8 speed; 577 int ret; 578 579 ret = pm_runtime_resume_and_get(dwc->dev); 580 if (ret < 0) 581 return ret; 582 583 spin_lock_irqsave(&dwc->lock, flags); 584 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 585 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 586 seq_puts(s, "Not available\n"); 587 spin_unlock_irqrestore(&dwc->lock, flags); 588 pm_runtime_put_sync(dwc->dev); 589 return 0; 590 } 591 592 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 593 state = DWC3_DSTS_USBLNKST(reg); 594 speed = reg & DWC3_DSTS_CONNECTSPD; 595 596 seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ? 597 dwc3_gadget_link_string(state) : 598 dwc3_gadget_hs_link_string(state)); 599 spin_unlock_irqrestore(&dwc->lock, flags); 600 601 pm_runtime_put_sync(dwc->dev); 602 603 return 0; 604 } 605 606 static int dwc3_link_state_open(struct inode *inode, struct file *file) 607 { 608 return single_open(file, dwc3_link_state_show, inode->i_private); 609 } 610 611 static ssize_t dwc3_link_state_write(struct file *file, 612 const char __user *ubuf, size_t count, loff_t *ppos) 613 { 614 struct seq_file *s = file->private_data; 615 struct dwc3 *dwc = s->private; 616 unsigned long flags; 617 enum dwc3_link_state state = 0; 618 char buf[32]; 619 u32 reg; 620 u8 speed; 621 int ret; 622 623 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 624 return -EFAULT; 625 626 if (!strncmp(buf, "SS.Disabled", 11)) 627 state = DWC3_LINK_STATE_SS_DIS; 628 else if (!strncmp(buf, "Rx.Detect", 9)) 629 state = DWC3_LINK_STATE_RX_DET; 630 else if (!strncmp(buf, "SS.Inactive", 11)) 631 state = DWC3_LINK_STATE_SS_INACT; 632 else if (!strncmp(buf, "Recovery", 8)) 633 state = DWC3_LINK_STATE_RECOV; 634 else if (!strncmp(buf, "Compliance", 10)) 635 state = DWC3_LINK_STATE_CMPLY; 636 else if (!strncmp(buf, "Loopback", 8)) 637 state = DWC3_LINK_STATE_LPBK; 638 else 639 return -EINVAL; 640 641 ret = pm_runtime_resume_and_get(dwc->dev); 642 if (ret < 0) 643 return ret; 644 645 spin_lock_irqsave(&dwc->lock, flags); 646 reg = dwc3_readl(dwc->regs, DWC3_GSTS); 647 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 648 spin_unlock_irqrestore(&dwc->lock, flags); 649 pm_runtime_put_sync(dwc->dev); 650 return -EINVAL; 651 } 652 653 reg = dwc3_readl(dwc->regs, DWC3_DSTS); 654 speed = reg & DWC3_DSTS_CONNECTSPD; 655 656 if (speed < DWC3_DSTS_SUPERSPEED && 657 state != DWC3_LINK_STATE_RECOV) { 658 spin_unlock_irqrestore(&dwc->lock, flags); 659 pm_runtime_put_sync(dwc->dev); 660 return -EINVAL; 661 } 662 663 dwc3_gadget_set_link_state(dwc, state); 664 spin_unlock_irqrestore(&dwc->lock, flags); 665 666 pm_runtime_put_sync(dwc->dev); 667 668 return count; 669 } 670 671 static const struct file_operations dwc3_link_state_fops = { 672 .open = dwc3_link_state_open, 673 .write = dwc3_link_state_write, 674 .read = seq_read, 675 .llseek = seq_lseek, 676 .release = single_release, 677 }; 678 679 struct dwc3_ep_file_map { 680 const char name[25]; 681 const struct file_operations *const fops; 682 }; 683 684 static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused) 685 { 686 struct dwc3_ep *dep = s->private; 687 struct dwc3 *dwc = dep->dwc; 688 unsigned long flags; 689 u32 mdwidth; 690 u32 val; 691 int ret; 692 693 ret = pm_runtime_resume_and_get(dwc->dev); 694 if (ret < 0) 695 return ret; 696 697 spin_lock_irqsave(&dwc->lock, flags); 698 val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); 699 700 /* Convert to bytes */ 701 mdwidth = dwc3_mdwidth(dwc); 702 703 val *= mdwidth; 704 val >>= 3; 705 seq_printf(s, "%u\n", val); 706 spin_unlock_irqrestore(&dwc->lock, flags); 707 708 pm_runtime_put_sync(dwc->dev); 709 710 return 0; 711 } 712 713 static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused) 714 { 715 struct dwc3_ep *dep = s->private; 716 struct dwc3 *dwc = dep->dwc; 717 unsigned long flags; 718 u32 mdwidth; 719 u32 val; 720 int ret; 721 722 ret = pm_runtime_resume_and_get(dwc->dev); 723 if (ret < 0) 724 return ret; 725 726 spin_lock_irqsave(&dwc->lock, flags); 727 val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); 728 729 /* Convert to bytes */ 730 mdwidth = dwc3_mdwidth(dwc); 731 732 val *= mdwidth; 733 val >>= 3; 734 seq_printf(s, "%u\n", val); 735 spin_unlock_irqrestore(&dwc->lock, flags); 736 737 pm_runtime_put_sync(dwc->dev); 738 739 return 0; 740 } 741 742 static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused) 743 { 744 struct dwc3_ep *dep = s->private; 745 struct dwc3 *dwc = dep->dwc; 746 unsigned long flags; 747 u32 val; 748 int ret; 749 750 ret = pm_runtime_resume_and_get(dwc->dev); 751 if (ret < 0) 752 return ret; 753 754 spin_lock_irqsave(&dwc->lock, flags); 755 val = dwc3_core_fifo_space(dep, DWC3_TXREQQ); 756 seq_printf(s, "%u\n", val); 757 spin_unlock_irqrestore(&dwc->lock, flags); 758 759 pm_runtime_put_sync(dwc->dev); 760 761 return 0; 762 } 763 764 static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused) 765 { 766 struct dwc3_ep *dep = s->private; 767 struct dwc3 *dwc = dep->dwc; 768 unsigned long flags; 769 u32 val; 770 int ret; 771 772 ret = pm_runtime_resume_and_get(dwc->dev); 773 if (ret < 0) 774 return ret; 775 776 spin_lock_irqsave(&dwc->lock, flags); 777 val = dwc3_core_fifo_space(dep, DWC3_RXREQQ); 778 seq_printf(s, "%u\n", val); 779 spin_unlock_irqrestore(&dwc->lock, flags); 780 781 pm_runtime_put_sync(dwc->dev); 782 783 return 0; 784 } 785 786 static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused) 787 { 788 struct dwc3_ep *dep = s->private; 789 struct dwc3 *dwc = dep->dwc; 790 unsigned long flags; 791 u32 val; 792 int ret; 793 794 ret = pm_runtime_resume_and_get(dwc->dev); 795 if (ret < 0) 796 return ret; 797 798 spin_lock_irqsave(&dwc->lock, flags); 799 val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ); 800 seq_printf(s, "%u\n", val); 801 spin_unlock_irqrestore(&dwc->lock, flags); 802 803 pm_runtime_put_sync(dwc->dev); 804 805 return 0; 806 } 807 808 static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused) 809 { 810 struct dwc3_ep *dep = s->private; 811 struct dwc3 *dwc = dep->dwc; 812 unsigned long flags; 813 u32 val; 814 int ret; 815 816 ret = pm_runtime_resume_and_get(dwc->dev); 817 if (ret < 0) 818 return ret; 819 820 spin_lock_irqsave(&dwc->lock, flags); 821 val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ); 822 seq_printf(s, "%u\n", val); 823 spin_unlock_irqrestore(&dwc->lock, flags); 824 825 pm_runtime_put_sync(dwc->dev); 826 827 return 0; 828 } 829 830 static int dwc3_event_queue_show(struct seq_file *s, void *unused) 831 { 832 struct dwc3_ep *dep = s->private; 833 struct dwc3 *dwc = dep->dwc; 834 unsigned long flags; 835 u32 val; 836 int ret; 837 838 ret = pm_runtime_resume_and_get(dwc->dev); 839 if (ret < 0) 840 return ret; 841 842 spin_lock_irqsave(&dwc->lock, flags); 843 val = dwc3_core_fifo_space(dep, DWC3_EVENTQ); 844 seq_printf(s, "%u\n", val); 845 spin_unlock_irqrestore(&dwc->lock, flags); 846 847 pm_runtime_put_sync(dwc->dev); 848 849 return 0; 850 } 851 852 static int dwc3_transfer_type_show(struct seq_file *s, void *unused) 853 { 854 struct dwc3_ep *dep = s->private; 855 struct dwc3 *dwc = dep->dwc; 856 unsigned long flags; 857 858 spin_lock_irqsave(&dwc->lock, flags); 859 if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) { 860 seq_puts(s, "--\n"); 861 goto out; 862 } 863 864 switch (usb_endpoint_type(dep->endpoint.desc)) { 865 case USB_ENDPOINT_XFER_CONTROL: 866 seq_puts(s, "control\n"); 867 break; 868 case USB_ENDPOINT_XFER_ISOC: 869 seq_puts(s, "isochronous\n"); 870 break; 871 case USB_ENDPOINT_XFER_BULK: 872 seq_puts(s, "bulk\n"); 873 break; 874 case USB_ENDPOINT_XFER_INT: 875 seq_puts(s, "interrupt\n"); 876 break; 877 default: 878 seq_puts(s, "--\n"); 879 } 880 881 out: 882 spin_unlock_irqrestore(&dwc->lock, flags); 883 884 return 0; 885 } 886 887 static int dwc3_trb_ring_show(struct seq_file *s, void *unused) 888 { 889 struct dwc3_ep *dep = s->private; 890 struct dwc3 *dwc = dep->dwc; 891 unsigned long flags; 892 int i; 893 int ret; 894 895 ret = pm_runtime_resume_and_get(dwc->dev); 896 if (ret < 0) 897 return ret; 898 899 spin_lock_irqsave(&dwc->lock, flags); 900 if (dep->number <= 1) { 901 seq_puts(s, "--\n"); 902 goto out; 903 } 904 905 seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n"); 906 907 for (i = 0; i < DWC3_TRB_NUM; i++) { 908 struct dwc3_trb *trb = &dep->trb_pool[i]; 909 unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl); 910 911 seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d %c%c\n", 912 trb->bph, trb->bpl, trb->size, 913 dwc3_trb_type_string(type), 914 !!(trb->ctrl & DWC3_TRB_CTRL_IOC), 915 !!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI), 916 !!(trb->ctrl & DWC3_TRB_CTRL_CSP), 917 !!(trb->ctrl & DWC3_TRB_CTRL_CHN), 918 !!(trb->ctrl & DWC3_TRB_CTRL_LST), 919 !!(trb->ctrl & DWC3_TRB_CTRL_HWO), 920 dep->trb_enqueue == i ? 'E' : ' ', 921 dep->trb_dequeue == i ? 'D' : ' '); 922 } 923 924 out: 925 spin_unlock_irqrestore(&dwc->lock, flags); 926 927 pm_runtime_put_sync(dwc->dev); 928 929 return 0; 930 } 931 932 static int dwc3_ep_info_register_show(struct seq_file *s, void *unused) 933 { 934 struct dwc3_ep *dep = s->private; 935 struct dwc3 *dwc = dep->dwc; 936 unsigned long flags; 937 u64 ep_info; 938 u32 lower_32_bits; 939 u32 upper_32_bits; 940 u32 reg; 941 int ret; 942 943 ret = pm_runtime_resume_and_get(dwc->dev); 944 if (ret < 0) 945 return ret; 946 947 spin_lock_irqsave(&dwc->lock, flags); 948 reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); 949 dwc3_writel(dwc->regs, DWC3_GDBGLSPMUX, reg); 950 951 lower_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO0); 952 upper_32_bits = dwc3_readl(dwc->regs, DWC3_GDBGEPINFO1); 953 954 ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; 955 seq_printf(s, "0x%016llx\n", ep_info); 956 spin_unlock_irqrestore(&dwc->lock, flags); 957 958 pm_runtime_put_sync(dwc->dev); 959 960 return 0; 961 } 962 963 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size); 964 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size); 965 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue); 966 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue); 967 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue); 968 DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue); 969 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue); 970 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type); 971 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring); 972 DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register); 973 974 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = { 975 { "tx_fifo_size", &dwc3_tx_fifo_size_fops, }, 976 { "rx_fifo_size", &dwc3_rx_fifo_size_fops, }, 977 { "tx_request_queue", &dwc3_tx_request_queue_fops, }, 978 { "rx_request_queue", &dwc3_rx_request_queue_fops, }, 979 { "rx_info_queue", &dwc3_rx_info_queue_fops, }, 980 { "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, }, 981 { "event_queue", &dwc3_event_queue_fops, }, 982 { "transfer_type", &dwc3_transfer_type_fops, }, 983 { "trb_ring", &dwc3_trb_ring_fops, }, 984 { "GDBGEPINFO", &dwc3_ep_info_register_fops, }, 985 }; 986 987 void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep) 988 { 989 struct dentry *dir; 990 int i; 991 992 dir = debugfs_create_dir(dep->name, dep->dwc->debug_root); 993 for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) { 994 const struct file_operations *fops = dwc3_ep_file_map[i].fops; 995 const char *name = dwc3_ep_file_map[i].name; 996 997 debugfs_create_file(name, 0444, dir, dep, fops); 998 } 999 } 1000 1001 void dwc3_debugfs_remove_endpoint_dir(struct dwc3_ep *dep) 1002 { 1003 debugfs_lookup_and_remove(dep->name, dep->dwc->debug_root); 1004 } 1005 1006 void dwc3_debugfs_init(struct dwc3 *dwc) 1007 { 1008 struct dentry *root; 1009 1010 dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL); 1011 if (!dwc->regset) 1012 return; 1013 1014 dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED; 1015 1016 dwc->regset->regs = dwc3_regs; 1017 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); 1018 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; 1019 dwc->regset->dev = dwc->dev; 1020 1021 root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root); 1022 dwc->debug_root = root; 1023 debugfs_create_regset32("regdump", 0444, root, dwc->regset); 1024 debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops); 1025 1026 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) 1027 debugfs_create_file("mode", 0644, root, dwc, 1028 &dwc3_mode_fops); 1029 1030 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) || 1031 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 1032 debugfs_create_file("testmode", 0644, root, dwc, 1033 &dwc3_testmode_fops); 1034 debugfs_create_file("link_state", 0644, root, dwc, 1035 &dwc3_link_state_fops); 1036 } 1037 } 1038 1039 void dwc3_debugfs_exit(struct dwc3 *dwc) 1040 { 1041 debugfs_lookup_and_remove(dev_name(dwc->dev), usb_debug_root); 1042 kfree(dwc->regset); 1043 } 1044