1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * debugfs.c - DesignWare USB3 DRD Controller DebugFS file 4 * 5 * Copyright (C) 2010-2011 Texas Instruments Incorporated - https://www.ti.com 6 * 7 * Authors: Felipe Balbi <balbi@ti.com>, 8 * Sebastian Andrzej Siewior <bigeasy@linutronix.de> 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/slab.h> 13 #include <linux/ptrace.h> 14 #include <linux/types.h> 15 #include <linux/spinlock.h> 16 #include <linux/debugfs.h> 17 #include <linux/seq_file.h> 18 #include <linux/delay.h> 19 #include <linux/uaccess.h> 20 21 #include <linux/usb/ch9.h> 22 23 #include "core.h" 24 #include "gadget.h" 25 #include "io.h" 26 #include "debug.h" 27 28 #define DWC3_LSP_MUX_UNSELECTED 0xfffff 29 30 #define dump_register(nm) \ 31 { \ 32 .name = __stringify(nm), \ 33 .offset = DWC3_ ##nm, \ 34 } 35 36 #define dump_ep_register_set(n) \ 37 { \ 38 .name = "DEPCMDPAR2("__stringify(n)")", \ 39 .offset = DWC3_DEPCMDPAR2(n), \ 40 }, \ 41 { \ 42 .name = "DEPCMDPAR1("__stringify(n)")", \ 43 .offset = DWC3_DEPCMDPAR1(n), \ 44 }, \ 45 { \ 46 .name = "DEPCMDPAR0("__stringify(n)")", \ 47 .offset = DWC3_DEPCMDPAR0(n), \ 48 }, \ 49 { \ 50 .name = "DEPCMD("__stringify(n)")", \ 51 .offset = DWC3_DEPCMD(n), \ 52 } 53 54 55 static const struct debugfs_reg32 dwc3_regs[] = { 56 dump_register(GSBUSCFG0), 57 dump_register(GSBUSCFG1), 58 dump_register(GTXTHRCFG), 59 dump_register(GRXTHRCFG), 60 dump_register(GCTL), 61 dump_register(GEVTEN), 62 dump_register(GSTS), 63 dump_register(GUCTL1), 64 dump_register(GSNPSID), 65 dump_register(GGPIO), 66 dump_register(GUID), 67 dump_register(GUCTL), 68 dump_register(GBUSERRADDR0), 69 dump_register(GBUSERRADDR1), 70 dump_register(GPRTBIMAP0), 71 dump_register(GPRTBIMAP1), 72 dump_register(GHWPARAMS0), 73 dump_register(GHWPARAMS1), 74 dump_register(GHWPARAMS2), 75 dump_register(GHWPARAMS3), 76 dump_register(GHWPARAMS4), 77 dump_register(GHWPARAMS5), 78 dump_register(GHWPARAMS6), 79 dump_register(GHWPARAMS7), 80 dump_register(GDBGFIFOSPACE), 81 dump_register(GDBGLTSSM), 82 dump_register(GDBGBMU), 83 dump_register(GPRTBIMAP_HS0), 84 dump_register(GPRTBIMAP_HS1), 85 dump_register(GPRTBIMAP_FS0), 86 dump_register(GPRTBIMAP_FS1), 87 dump_register(GUCTL2), 88 dump_register(VER_NUMBER), 89 dump_register(VER_TYPE), 90 91 dump_register(GUSB2PHYCFG(0)), 92 dump_register(GUSB2PHYCFG(1)), 93 dump_register(GUSB2PHYCFG(2)), 94 dump_register(GUSB2PHYCFG(3)), 95 dump_register(GUSB2PHYCFG(4)), 96 dump_register(GUSB2PHYCFG(5)), 97 dump_register(GUSB2PHYCFG(6)), 98 dump_register(GUSB2PHYCFG(7)), 99 dump_register(GUSB2PHYCFG(8)), 100 dump_register(GUSB2PHYCFG(9)), 101 dump_register(GUSB2PHYCFG(10)), 102 dump_register(GUSB2PHYCFG(11)), 103 dump_register(GUSB2PHYCFG(12)), 104 dump_register(GUSB2PHYCFG(13)), 105 dump_register(GUSB2PHYCFG(14)), 106 dump_register(GUSB2PHYCFG(15)), 107 108 dump_register(GUSB2I2CCTL(0)), 109 dump_register(GUSB2I2CCTL(1)), 110 dump_register(GUSB2I2CCTL(2)), 111 dump_register(GUSB2I2CCTL(3)), 112 dump_register(GUSB2I2CCTL(4)), 113 dump_register(GUSB2I2CCTL(5)), 114 dump_register(GUSB2I2CCTL(6)), 115 dump_register(GUSB2I2CCTL(7)), 116 dump_register(GUSB2I2CCTL(8)), 117 dump_register(GUSB2I2CCTL(9)), 118 dump_register(GUSB2I2CCTL(10)), 119 dump_register(GUSB2I2CCTL(11)), 120 dump_register(GUSB2I2CCTL(12)), 121 dump_register(GUSB2I2CCTL(13)), 122 dump_register(GUSB2I2CCTL(14)), 123 dump_register(GUSB2I2CCTL(15)), 124 125 dump_register(GUSB2PHYACC(0)), 126 dump_register(GUSB2PHYACC(1)), 127 dump_register(GUSB2PHYACC(2)), 128 dump_register(GUSB2PHYACC(3)), 129 dump_register(GUSB2PHYACC(4)), 130 dump_register(GUSB2PHYACC(5)), 131 dump_register(GUSB2PHYACC(6)), 132 dump_register(GUSB2PHYACC(7)), 133 dump_register(GUSB2PHYACC(8)), 134 dump_register(GUSB2PHYACC(9)), 135 dump_register(GUSB2PHYACC(10)), 136 dump_register(GUSB2PHYACC(11)), 137 dump_register(GUSB2PHYACC(12)), 138 dump_register(GUSB2PHYACC(13)), 139 dump_register(GUSB2PHYACC(14)), 140 dump_register(GUSB2PHYACC(15)), 141 142 dump_register(GUSB3PIPECTL(0)), 143 dump_register(GUSB3PIPECTL(1)), 144 dump_register(GUSB3PIPECTL(2)), 145 dump_register(GUSB3PIPECTL(3)), 146 dump_register(GUSB3PIPECTL(4)), 147 dump_register(GUSB3PIPECTL(5)), 148 dump_register(GUSB3PIPECTL(6)), 149 dump_register(GUSB3PIPECTL(7)), 150 dump_register(GUSB3PIPECTL(8)), 151 dump_register(GUSB3PIPECTL(9)), 152 dump_register(GUSB3PIPECTL(10)), 153 dump_register(GUSB3PIPECTL(11)), 154 dump_register(GUSB3PIPECTL(12)), 155 dump_register(GUSB3PIPECTL(13)), 156 dump_register(GUSB3PIPECTL(14)), 157 dump_register(GUSB3PIPECTL(15)), 158 159 dump_register(GTXFIFOSIZ(0)), 160 dump_register(GTXFIFOSIZ(1)), 161 dump_register(GTXFIFOSIZ(2)), 162 dump_register(GTXFIFOSIZ(3)), 163 dump_register(GTXFIFOSIZ(4)), 164 dump_register(GTXFIFOSIZ(5)), 165 dump_register(GTXFIFOSIZ(6)), 166 dump_register(GTXFIFOSIZ(7)), 167 dump_register(GTXFIFOSIZ(8)), 168 dump_register(GTXFIFOSIZ(9)), 169 dump_register(GTXFIFOSIZ(10)), 170 dump_register(GTXFIFOSIZ(11)), 171 dump_register(GTXFIFOSIZ(12)), 172 dump_register(GTXFIFOSIZ(13)), 173 dump_register(GTXFIFOSIZ(14)), 174 dump_register(GTXFIFOSIZ(15)), 175 dump_register(GTXFIFOSIZ(16)), 176 dump_register(GTXFIFOSIZ(17)), 177 dump_register(GTXFIFOSIZ(18)), 178 dump_register(GTXFIFOSIZ(19)), 179 dump_register(GTXFIFOSIZ(20)), 180 dump_register(GTXFIFOSIZ(21)), 181 dump_register(GTXFIFOSIZ(22)), 182 dump_register(GTXFIFOSIZ(23)), 183 dump_register(GTXFIFOSIZ(24)), 184 dump_register(GTXFIFOSIZ(25)), 185 dump_register(GTXFIFOSIZ(26)), 186 dump_register(GTXFIFOSIZ(27)), 187 dump_register(GTXFIFOSIZ(28)), 188 dump_register(GTXFIFOSIZ(29)), 189 dump_register(GTXFIFOSIZ(30)), 190 dump_register(GTXFIFOSIZ(31)), 191 192 dump_register(GRXFIFOSIZ(0)), 193 dump_register(GRXFIFOSIZ(1)), 194 dump_register(GRXFIFOSIZ(2)), 195 dump_register(GRXFIFOSIZ(3)), 196 dump_register(GRXFIFOSIZ(4)), 197 dump_register(GRXFIFOSIZ(5)), 198 dump_register(GRXFIFOSIZ(6)), 199 dump_register(GRXFIFOSIZ(7)), 200 dump_register(GRXFIFOSIZ(8)), 201 dump_register(GRXFIFOSIZ(9)), 202 dump_register(GRXFIFOSIZ(10)), 203 dump_register(GRXFIFOSIZ(11)), 204 dump_register(GRXFIFOSIZ(12)), 205 dump_register(GRXFIFOSIZ(13)), 206 dump_register(GRXFIFOSIZ(14)), 207 dump_register(GRXFIFOSIZ(15)), 208 dump_register(GRXFIFOSIZ(16)), 209 dump_register(GRXFIFOSIZ(17)), 210 dump_register(GRXFIFOSIZ(18)), 211 dump_register(GRXFIFOSIZ(19)), 212 dump_register(GRXFIFOSIZ(20)), 213 dump_register(GRXFIFOSIZ(21)), 214 dump_register(GRXFIFOSIZ(22)), 215 dump_register(GRXFIFOSIZ(23)), 216 dump_register(GRXFIFOSIZ(24)), 217 dump_register(GRXFIFOSIZ(25)), 218 dump_register(GRXFIFOSIZ(26)), 219 dump_register(GRXFIFOSIZ(27)), 220 dump_register(GRXFIFOSIZ(28)), 221 dump_register(GRXFIFOSIZ(29)), 222 dump_register(GRXFIFOSIZ(30)), 223 dump_register(GRXFIFOSIZ(31)), 224 225 dump_register(GEVNTADRLO(0)), 226 dump_register(GEVNTADRHI(0)), 227 dump_register(GEVNTSIZ(0)), 228 dump_register(GEVNTCOUNT(0)), 229 230 dump_register(GHWPARAMS8), 231 dump_register(GUCTL3), 232 dump_register(GFLADJ), 233 dump_register(DCFG), 234 dump_register(DCTL), 235 dump_register(DEVTEN), 236 dump_register(DSTS), 237 dump_register(DGCMDPAR), 238 dump_register(DGCMD), 239 dump_register(DALEPENA), 240 241 dump_ep_register_set(0), 242 dump_ep_register_set(1), 243 dump_ep_register_set(2), 244 dump_ep_register_set(3), 245 dump_ep_register_set(4), 246 dump_ep_register_set(5), 247 dump_ep_register_set(6), 248 dump_ep_register_set(7), 249 dump_ep_register_set(8), 250 dump_ep_register_set(9), 251 dump_ep_register_set(10), 252 dump_ep_register_set(11), 253 dump_ep_register_set(12), 254 dump_ep_register_set(13), 255 dump_ep_register_set(14), 256 dump_ep_register_set(15), 257 dump_ep_register_set(16), 258 dump_ep_register_set(17), 259 dump_ep_register_set(18), 260 dump_ep_register_set(19), 261 dump_ep_register_set(20), 262 dump_ep_register_set(21), 263 dump_ep_register_set(22), 264 dump_ep_register_set(23), 265 dump_ep_register_set(24), 266 dump_ep_register_set(25), 267 dump_ep_register_set(26), 268 dump_ep_register_set(27), 269 dump_ep_register_set(28), 270 dump_ep_register_set(29), 271 dump_ep_register_set(30), 272 dump_ep_register_set(31), 273 274 dump_register(OCFG), 275 dump_register(OCTL), 276 dump_register(OEVT), 277 dump_register(OEVTEN), 278 dump_register(OSTS), 279 }; 280 281 static void dwc3_host_lsp(struct seq_file *s) 282 { 283 struct dwc3 *dwc = s->private; 284 bool dbc_enabled; 285 u32 sel; 286 u32 reg; 287 u32 val; 288 289 dbc_enabled = !!(dwc->hwparams.hwparams1 & DWC3_GHWPARAMS1_ENDBC); 290 291 sel = dwc->dbg_lsp_select; 292 if (sel == DWC3_LSP_MUX_UNSELECTED) { 293 seq_puts(s, "Write LSP selection to print for host\n"); 294 return; 295 } 296 297 reg = DWC3_GDBGLSPMUX_HOSTSELECT(sel); 298 299 dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg); 300 val = dwc3_readl(dwc, DWC3_GDBGLSP); 301 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", sel, val); 302 303 if (dbc_enabled && sel < 256) { 304 reg |= DWC3_GDBGLSPMUX_ENDBC; 305 dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg); 306 val = dwc3_readl(dwc, DWC3_GDBGLSP); 307 seq_printf(s, "GDBGLSP_DBC[%d] = 0x%08x\n", sel, val); 308 } 309 } 310 311 static void dwc3_gadget_lsp(struct seq_file *s) 312 { 313 struct dwc3 *dwc = s->private; 314 int i; 315 u32 reg; 316 317 for (i = 0; i < 16; i++) { 318 reg = DWC3_GDBGLSPMUX_DEVSELECT(i); 319 dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg); 320 reg = dwc3_readl(dwc, DWC3_GDBGLSP); 321 seq_printf(s, "GDBGLSP[%d] = 0x%08x\n", i, reg); 322 } 323 } 324 325 static int dwc3_lsp_show(struct seq_file *s, void *unused) 326 { 327 struct dwc3 *dwc = s->private; 328 unsigned int current_mode; 329 unsigned long flags; 330 u32 reg; 331 int ret; 332 333 ret = pm_runtime_resume_and_get(dwc->dev); 334 if (ret < 0) 335 return ret; 336 337 spin_lock_irqsave(&dwc->lock, flags); 338 reg = dwc3_readl(dwc, DWC3_GSTS); 339 current_mode = DWC3_GSTS_CURMOD(reg); 340 341 switch (current_mode) { 342 case DWC3_GSTS_CURMOD_HOST: 343 dwc3_host_lsp(s); 344 break; 345 case DWC3_GSTS_CURMOD_DEVICE: 346 dwc3_gadget_lsp(s); 347 break; 348 default: 349 seq_puts(s, "Mode is unknown, no LSP register printed\n"); 350 break; 351 } 352 spin_unlock_irqrestore(&dwc->lock, flags); 353 354 pm_runtime_put_sync(dwc->dev); 355 356 return 0; 357 } 358 359 static int dwc3_lsp_open(struct inode *inode, struct file *file) 360 { 361 return single_open(file, dwc3_lsp_show, inode->i_private); 362 } 363 364 static ssize_t dwc3_lsp_write(struct file *file, const char __user *ubuf, 365 size_t count, loff_t *ppos) 366 { 367 struct seq_file *s = file->private_data; 368 struct dwc3 *dwc = s->private; 369 unsigned long flags; 370 char buf[32] = { 0 }; 371 u32 sel; 372 int ret; 373 374 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 375 return -EFAULT; 376 377 ret = kstrtouint(buf, 0, &sel); 378 if (ret) 379 return ret; 380 381 spin_lock_irqsave(&dwc->lock, flags); 382 dwc->dbg_lsp_select = sel; 383 spin_unlock_irqrestore(&dwc->lock, flags); 384 385 return count; 386 } 387 388 static const struct file_operations dwc3_lsp_fops = { 389 .open = dwc3_lsp_open, 390 .write = dwc3_lsp_write, 391 .read = seq_read, 392 .llseek = seq_lseek, 393 .release = single_release, 394 }; 395 396 static int dwc3_mode_show(struct seq_file *s, void *unused) 397 { 398 struct dwc3 *dwc = s->private; 399 unsigned long flags; 400 u32 reg; 401 u32 mode; 402 int ret; 403 404 ret = pm_runtime_resume_and_get(dwc->dev); 405 if (ret < 0) 406 return ret; 407 408 spin_lock_irqsave(&dwc->lock, flags); 409 reg = dwc3_readl(dwc, DWC3_GCTL); 410 spin_unlock_irqrestore(&dwc->lock, flags); 411 412 mode = DWC3_GCTL_PRTCAP(reg); 413 switch (mode) { 414 case DWC3_GCTL_PRTCAP_HOST: 415 case DWC3_GCTL_PRTCAP_DEVICE: 416 case DWC3_GCTL_PRTCAP_OTG: 417 seq_printf(s, "%s\n", dwc3_mode_string(mode)); 418 break; 419 default: 420 seq_printf(s, "UNKNOWN %08x\n", mode); 421 } 422 423 pm_runtime_put_sync(dwc->dev); 424 425 return 0; 426 } 427 428 static int dwc3_mode_open(struct inode *inode, struct file *file) 429 { 430 return single_open(file, dwc3_mode_show, inode->i_private); 431 } 432 433 static ssize_t dwc3_mode_write(struct file *file, 434 const char __user *ubuf, size_t count, loff_t *ppos) 435 { 436 struct seq_file *s = file->private_data; 437 struct dwc3 *dwc = s->private; 438 u32 mode = 0; 439 char buf[32]; 440 441 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 442 return -EFAULT; 443 444 if (dwc->dr_mode != USB_DR_MODE_OTG) 445 return count; 446 447 if (!strncmp(buf, "host", 4)) 448 mode = DWC3_GCTL_PRTCAP_HOST; 449 450 if (!strncmp(buf, "device", 6)) 451 mode = DWC3_GCTL_PRTCAP_DEVICE; 452 453 if (!strncmp(buf, "otg", 3)) 454 mode = DWC3_GCTL_PRTCAP_OTG; 455 456 dwc3_set_mode(dwc, mode); 457 458 return count; 459 } 460 461 static const struct file_operations dwc3_mode_fops = { 462 .open = dwc3_mode_open, 463 .write = dwc3_mode_write, 464 .read = seq_read, 465 .llseek = seq_lseek, 466 .release = single_release, 467 }; 468 469 static int dwc3_testmode_show(struct seq_file *s, void *unused) 470 { 471 struct dwc3 *dwc = s->private; 472 unsigned long flags; 473 u32 reg; 474 int ret; 475 476 ret = pm_runtime_resume_and_get(dwc->dev); 477 if (ret < 0) 478 return ret; 479 480 spin_lock_irqsave(&dwc->lock, flags); 481 reg = dwc3_readl(dwc, DWC3_DCTL); 482 reg &= DWC3_DCTL_TSTCTRL_MASK; 483 reg >>= 1; 484 spin_unlock_irqrestore(&dwc->lock, flags); 485 486 switch (reg) { 487 case 0: 488 seq_puts(s, "no test\n"); 489 break; 490 case USB_TEST_J: 491 seq_puts(s, "test_j\n"); 492 break; 493 case USB_TEST_K: 494 seq_puts(s, "test_k\n"); 495 break; 496 case USB_TEST_SE0_NAK: 497 seq_puts(s, "test_se0_nak\n"); 498 break; 499 case USB_TEST_PACKET: 500 seq_puts(s, "test_packet\n"); 501 break; 502 case USB_TEST_FORCE_ENABLE: 503 seq_puts(s, "test_force_enable\n"); 504 break; 505 default: 506 seq_printf(s, "UNKNOWN %d\n", reg); 507 } 508 509 pm_runtime_put_sync(dwc->dev); 510 511 return 0; 512 } 513 514 static int dwc3_testmode_open(struct inode *inode, struct file *file) 515 { 516 return single_open(file, dwc3_testmode_show, inode->i_private); 517 } 518 519 static ssize_t dwc3_testmode_write(struct file *file, 520 const char __user *ubuf, size_t count, loff_t *ppos) 521 { 522 struct seq_file *s = file->private_data; 523 struct dwc3 *dwc = s->private; 524 unsigned long flags; 525 u32 testmode = 0; 526 char buf[32]; 527 int ret; 528 529 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 530 return -EFAULT; 531 532 if (!strncmp(buf, "test_j", 6)) 533 testmode = USB_TEST_J; 534 else if (!strncmp(buf, "test_k", 6)) 535 testmode = USB_TEST_K; 536 else if (!strncmp(buf, "test_se0_nak", 12)) 537 testmode = USB_TEST_SE0_NAK; 538 else if (!strncmp(buf, "test_packet", 11)) 539 testmode = USB_TEST_PACKET; 540 else if (!strncmp(buf, "test_force_enable", 17)) 541 testmode = USB_TEST_FORCE_ENABLE; 542 else 543 testmode = 0; 544 545 ret = pm_runtime_resume_and_get(dwc->dev); 546 if (ret < 0) 547 return ret; 548 549 spin_lock_irqsave(&dwc->lock, flags); 550 dwc3_gadget_set_test_mode(dwc, testmode); 551 spin_unlock_irqrestore(&dwc->lock, flags); 552 553 pm_runtime_put_sync(dwc->dev); 554 555 return count; 556 } 557 558 static const struct file_operations dwc3_testmode_fops = { 559 .open = dwc3_testmode_open, 560 .write = dwc3_testmode_write, 561 .read = seq_read, 562 .llseek = seq_lseek, 563 .release = single_release, 564 }; 565 566 static int dwc3_link_state_show(struct seq_file *s, void *unused) 567 { 568 struct dwc3 *dwc = s->private; 569 unsigned long flags; 570 enum dwc3_link_state state; 571 u32 reg; 572 u8 speed; 573 int ret; 574 575 ret = pm_runtime_resume_and_get(dwc->dev); 576 if (ret < 0) 577 return ret; 578 579 spin_lock_irqsave(&dwc->lock, flags); 580 reg = dwc3_readl(dwc, DWC3_GSTS); 581 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 582 seq_puts(s, "Not available\n"); 583 spin_unlock_irqrestore(&dwc->lock, flags); 584 pm_runtime_put_sync(dwc->dev); 585 return 0; 586 } 587 588 reg = dwc3_readl(dwc, DWC3_DSTS); 589 state = DWC3_DSTS_USBLNKST(reg); 590 speed = reg & DWC3_DSTS_CONNECTSPD; 591 592 seq_printf(s, "%s\n", (speed >= DWC3_DSTS_SUPERSPEED) ? 593 dwc3_gadget_link_string(state) : 594 dwc3_gadget_hs_link_string(state)); 595 spin_unlock_irqrestore(&dwc->lock, flags); 596 597 pm_runtime_put_sync(dwc->dev); 598 599 return 0; 600 } 601 602 static int dwc3_link_state_open(struct inode *inode, struct file *file) 603 { 604 return single_open(file, dwc3_link_state_show, inode->i_private); 605 } 606 607 static ssize_t dwc3_link_state_write(struct file *file, 608 const char __user *ubuf, size_t count, loff_t *ppos) 609 { 610 struct seq_file *s = file->private_data; 611 struct dwc3 *dwc = s->private; 612 unsigned long flags; 613 enum dwc3_link_state state = 0; 614 char buf[32]; 615 u32 reg; 616 u8 speed; 617 int ret; 618 619 if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count))) 620 return -EFAULT; 621 622 if (!strncmp(buf, "SS.Disabled", 11)) 623 state = DWC3_LINK_STATE_SS_DIS; 624 else if (!strncmp(buf, "Rx.Detect", 9)) 625 state = DWC3_LINK_STATE_RX_DET; 626 else if (!strncmp(buf, "SS.Inactive", 11)) 627 state = DWC3_LINK_STATE_SS_INACT; 628 else if (!strncmp(buf, "Recovery", 8)) 629 state = DWC3_LINK_STATE_RECOV; 630 else if (!strncmp(buf, "Compliance", 10)) 631 state = DWC3_LINK_STATE_CMPLY; 632 else if (!strncmp(buf, "Loopback", 8)) 633 state = DWC3_LINK_STATE_LPBK; 634 else 635 return -EINVAL; 636 637 ret = pm_runtime_resume_and_get(dwc->dev); 638 if (ret < 0) 639 return ret; 640 641 spin_lock_irqsave(&dwc->lock, flags); 642 reg = dwc3_readl(dwc, DWC3_GSTS); 643 if (DWC3_GSTS_CURMOD(reg) != DWC3_GSTS_CURMOD_DEVICE) { 644 spin_unlock_irqrestore(&dwc->lock, flags); 645 pm_runtime_put_sync(dwc->dev); 646 return -EINVAL; 647 } 648 649 reg = dwc3_readl(dwc, DWC3_DSTS); 650 speed = reg & DWC3_DSTS_CONNECTSPD; 651 652 if (speed < DWC3_DSTS_SUPERSPEED && 653 state != DWC3_LINK_STATE_RECOV) { 654 spin_unlock_irqrestore(&dwc->lock, flags); 655 pm_runtime_put_sync(dwc->dev); 656 return -EINVAL; 657 } 658 659 dwc3_gadget_set_link_state(dwc, state); 660 spin_unlock_irqrestore(&dwc->lock, flags); 661 662 pm_runtime_put_sync(dwc->dev); 663 664 return count; 665 } 666 667 static const struct file_operations dwc3_link_state_fops = { 668 .open = dwc3_link_state_open, 669 .write = dwc3_link_state_write, 670 .read = seq_read, 671 .llseek = seq_lseek, 672 .release = single_release, 673 }; 674 675 struct dwc3_ep_file_map { 676 const char name[25]; 677 const struct file_operations *const fops; 678 }; 679 680 static int dwc3_tx_fifo_size_show(struct seq_file *s, void *unused) 681 { 682 struct dwc3_ep *dep = s->private; 683 struct dwc3 *dwc = dep->dwc; 684 unsigned long flags; 685 u32 mdwidth; 686 u32 val; 687 int ret; 688 689 ret = pm_runtime_resume_and_get(dwc->dev); 690 if (ret < 0) 691 return ret; 692 693 spin_lock_irqsave(&dwc->lock, flags); 694 val = dwc3_core_fifo_space(dep, DWC3_TXFIFO); 695 696 /* Convert to bytes */ 697 mdwidth = dwc3_mdwidth(dwc); 698 699 val *= mdwidth; 700 val >>= 3; 701 seq_printf(s, "%u\n", val); 702 spin_unlock_irqrestore(&dwc->lock, flags); 703 704 pm_runtime_put_sync(dwc->dev); 705 706 return 0; 707 } 708 709 static int dwc3_rx_fifo_size_show(struct seq_file *s, void *unused) 710 { 711 struct dwc3_ep *dep = s->private; 712 struct dwc3 *dwc = dep->dwc; 713 unsigned long flags; 714 u32 mdwidth; 715 u32 val; 716 int ret; 717 718 ret = pm_runtime_resume_and_get(dwc->dev); 719 if (ret < 0) 720 return ret; 721 722 spin_lock_irqsave(&dwc->lock, flags); 723 val = dwc3_core_fifo_space(dep, DWC3_RXFIFO); 724 725 /* Convert to bytes */ 726 mdwidth = dwc3_mdwidth(dwc); 727 728 val *= mdwidth; 729 val >>= 3; 730 seq_printf(s, "%u\n", val); 731 spin_unlock_irqrestore(&dwc->lock, flags); 732 733 pm_runtime_put_sync(dwc->dev); 734 735 return 0; 736 } 737 738 static int dwc3_tx_request_queue_show(struct seq_file *s, void *unused) 739 { 740 struct dwc3_ep *dep = s->private; 741 struct dwc3 *dwc = dep->dwc; 742 unsigned long flags; 743 u32 val; 744 int ret; 745 746 ret = pm_runtime_resume_and_get(dwc->dev); 747 if (ret < 0) 748 return ret; 749 750 spin_lock_irqsave(&dwc->lock, flags); 751 val = dwc3_core_fifo_space(dep, DWC3_TXREQQ); 752 seq_printf(s, "%u\n", val); 753 spin_unlock_irqrestore(&dwc->lock, flags); 754 755 pm_runtime_put_sync(dwc->dev); 756 757 return 0; 758 } 759 760 static int dwc3_rx_request_queue_show(struct seq_file *s, void *unused) 761 { 762 struct dwc3_ep *dep = s->private; 763 struct dwc3 *dwc = dep->dwc; 764 unsigned long flags; 765 u32 val; 766 int ret; 767 768 ret = pm_runtime_resume_and_get(dwc->dev); 769 if (ret < 0) 770 return ret; 771 772 spin_lock_irqsave(&dwc->lock, flags); 773 val = dwc3_core_fifo_space(dep, DWC3_RXREQQ); 774 seq_printf(s, "%u\n", val); 775 spin_unlock_irqrestore(&dwc->lock, flags); 776 777 pm_runtime_put_sync(dwc->dev); 778 779 return 0; 780 } 781 782 static int dwc3_rx_info_queue_show(struct seq_file *s, void *unused) 783 { 784 struct dwc3_ep *dep = s->private; 785 struct dwc3 *dwc = dep->dwc; 786 unsigned long flags; 787 u32 val; 788 int ret; 789 790 ret = pm_runtime_resume_and_get(dwc->dev); 791 if (ret < 0) 792 return ret; 793 794 spin_lock_irqsave(&dwc->lock, flags); 795 val = dwc3_core_fifo_space(dep, DWC3_RXINFOQ); 796 seq_printf(s, "%u\n", val); 797 spin_unlock_irqrestore(&dwc->lock, flags); 798 799 pm_runtime_put_sync(dwc->dev); 800 801 return 0; 802 } 803 804 static int dwc3_descriptor_fetch_queue_show(struct seq_file *s, void *unused) 805 { 806 struct dwc3_ep *dep = s->private; 807 struct dwc3 *dwc = dep->dwc; 808 unsigned long flags; 809 u32 val; 810 int ret; 811 812 ret = pm_runtime_resume_and_get(dwc->dev); 813 if (ret < 0) 814 return ret; 815 816 spin_lock_irqsave(&dwc->lock, flags); 817 val = dwc3_core_fifo_space(dep, DWC3_DESCFETCHQ); 818 seq_printf(s, "%u\n", val); 819 spin_unlock_irqrestore(&dwc->lock, flags); 820 821 pm_runtime_put_sync(dwc->dev); 822 823 return 0; 824 } 825 826 static int dwc3_event_queue_show(struct seq_file *s, void *unused) 827 { 828 struct dwc3_ep *dep = s->private; 829 struct dwc3 *dwc = dep->dwc; 830 unsigned long flags; 831 u32 val; 832 int ret; 833 834 ret = pm_runtime_resume_and_get(dwc->dev); 835 if (ret < 0) 836 return ret; 837 838 spin_lock_irqsave(&dwc->lock, flags); 839 val = dwc3_core_fifo_space(dep, DWC3_EVENTQ); 840 seq_printf(s, "%u\n", val); 841 spin_unlock_irqrestore(&dwc->lock, flags); 842 843 pm_runtime_put_sync(dwc->dev); 844 845 return 0; 846 } 847 848 static int dwc3_transfer_type_show(struct seq_file *s, void *unused) 849 { 850 struct dwc3_ep *dep = s->private; 851 struct dwc3 *dwc = dep->dwc; 852 unsigned long flags; 853 854 spin_lock_irqsave(&dwc->lock, flags); 855 if (!(dep->flags & DWC3_EP_ENABLED) || !dep->endpoint.desc) { 856 seq_puts(s, "--\n"); 857 goto out; 858 } 859 860 switch (usb_endpoint_type(dep->endpoint.desc)) { 861 case USB_ENDPOINT_XFER_CONTROL: 862 seq_puts(s, "control\n"); 863 break; 864 case USB_ENDPOINT_XFER_ISOC: 865 seq_puts(s, "isochronous\n"); 866 break; 867 case USB_ENDPOINT_XFER_BULK: 868 seq_puts(s, "bulk\n"); 869 break; 870 case USB_ENDPOINT_XFER_INT: 871 seq_puts(s, "interrupt\n"); 872 break; 873 default: 874 seq_puts(s, "--\n"); 875 } 876 877 out: 878 spin_unlock_irqrestore(&dwc->lock, flags); 879 880 return 0; 881 } 882 883 static int dwc3_trb_ring_show(struct seq_file *s, void *unused) 884 { 885 struct dwc3_ep *dep = s->private; 886 struct dwc3 *dwc = dep->dwc; 887 unsigned long flags; 888 int i; 889 int ret; 890 891 ret = pm_runtime_resume_and_get(dwc->dev); 892 if (ret < 0) 893 return ret; 894 895 spin_lock_irqsave(&dwc->lock, flags); 896 if (dep->number <= 1) { 897 seq_puts(s, "--\n"); 898 goto out; 899 } 900 901 seq_puts(s, "buffer_addr,size,type,ioc,isp_imi,csp,chn,lst,hwo\n"); 902 903 for (i = 0; i < DWC3_TRB_NUM; i++) { 904 struct dwc3_trb *trb = &dep->trb_pool[i]; 905 unsigned int type = DWC3_TRBCTL_TYPE(trb->ctrl); 906 907 seq_printf(s, "%08x%08x,%d,%s,%d,%d,%d,%d,%d,%d %c%c\n", 908 trb->bph, trb->bpl, trb->size, 909 dwc3_trb_type_string(type), 910 !!(trb->ctrl & DWC3_TRB_CTRL_IOC), 911 !!(trb->ctrl & DWC3_TRB_CTRL_ISP_IMI), 912 !!(trb->ctrl & DWC3_TRB_CTRL_CSP), 913 !!(trb->ctrl & DWC3_TRB_CTRL_CHN), 914 !!(trb->ctrl & DWC3_TRB_CTRL_LST), 915 !!(trb->ctrl & DWC3_TRB_CTRL_HWO), 916 dep->trb_enqueue == i ? 'E' : ' ', 917 dep->trb_dequeue == i ? 'D' : ' '); 918 } 919 920 out: 921 spin_unlock_irqrestore(&dwc->lock, flags); 922 923 pm_runtime_put_sync(dwc->dev); 924 925 return 0; 926 } 927 928 static int dwc3_ep_info_register_show(struct seq_file *s, void *unused) 929 { 930 struct dwc3_ep *dep = s->private; 931 struct dwc3 *dwc = dep->dwc; 932 unsigned long flags; 933 u64 ep_info; 934 u32 lower_32_bits; 935 u32 upper_32_bits; 936 u32 reg; 937 int ret; 938 939 ret = pm_runtime_resume_and_get(dwc->dev); 940 if (ret < 0) 941 return ret; 942 943 spin_lock_irqsave(&dwc->lock, flags); 944 reg = DWC3_GDBGLSPMUX_EPSELECT(dep->number); 945 dwc3_writel(dwc, DWC3_GDBGLSPMUX, reg); 946 947 lower_32_bits = dwc3_readl(dwc, DWC3_GDBGEPINFO0); 948 upper_32_bits = dwc3_readl(dwc, DWC3_GDBGEPINFO1); 949 950 ep_info = ((u64)upper_32_bits << 32) | lower_32_bits; 951 seq_printf(s, "0x%016llx\n", ep_info); 952 spin_unlock_irqrestore(&dwc->lock, flags); 953 954 pm_runtime_put_sync(dwc->dev); 955 956 return 0; 957 } 958 959 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_fifo_size); 960 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_fifo_size); 961 DEFINE_SHOW_ATTRIBUTE(dwc3_tx_request_queue); 962 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_request_queue); 963 DEFINE_SHOW_ATTRIBUTE(dwc3_rx_info_queue); 964 DEFINE_SHOW_ATTRIBUTE(dwc3_descriptor_fetch_queue); 965 DEFINE_SHOW_ATTRIBUTE(dwc3_event_queue); 966 DEFINE_SHOW_ATTRIBUTE(dwc3_transfer_type); 967 DEFINE_SHOW_ATTRIBUTE(dwc3_trb_ring); 968 DEFINE_SHOW_ATTRIBUTE(dwc3_ep_info_register); 969 970 static const struct dwc3_ep_file_map dwc3_ep_file_map[] = { 971 { "tx_fifo_size", &dwc3_tx_fifo_size_fops, }, 972 { "rx_fifo_size", &dwc3_rx_fifo_size_fops, }, 973 { "tx_request_queue", &dwc3_tx_request_queue_fops, }, 974 { "rx_request_queue", &dwc3_rx_request_queue_fops, }, 975 { "rx_info_queue", &dwc3_rx_info_queue_fops, }, 976 { "descriptor_fetch_queue", &dwc3_descriptor_fetch_queue_fops, }, 977 { "event_queue", &dwc3_event_queue_fops, }, 978 { "transfer_type", &dwc3_transfer_type_fops, }, 979 { "trb_ring", &dwc3_trb_ring_fops, }, 980 { "GDBGEPINFO", &dwc3_ep_info_register_fops, }, 981 }; 982 983 void dwc3_debugfs_create_endpoint_dir(struct dwc3_ep *dep) 984 { 985 struct dentry *dir; 986 int i; 987 988 dir = debugfs_create_dir(dep->name, dep->dwc->debug_root); 989 for (i = 0; i < ARRAY_SIZE(dwc3_ep_file_map); i++) { 990 const struct file_operations *fops = dwc3_ep_file_map[i].fops; 991 const char *name = dwc3_ep_file_map[i].name; 992 993 debugfs_create_file(name, 0444, dir, dep, fops); 994 } 995 } 996 997 void dwc3_debugfs_remove_endpoint_dir(struct dwc3_ep *dep) 998 { 999 debugfs_lookup_and_remove(dep->name, dep->dwc->debug_root); 1000 } 1001 1002 void dwc3_debugfs_init(struct dwc3 *dwc) 1003 { 1004 struct dentry *root; 1005 1006 dwc->regset = kzalloc(sizeof(*dwc->regset), GFP_KERNEL); 1007 if (!dwc->regset) 1008 return; 1009 1010 dwc->dbg_lsp_select = DWC3_LSP_MUX_UNSELECTED; 1011 1012 dwc->regset->regs = dwc3_regs; 1013 dwc->regset->nregs = ARRAY_SIZE(dwc3_regs); 1014 dwc->regset->base = dwc->regs - DWC3_GLOBALS_REGS_START; 1015 dwc->regset->dev = dwc->dev; 1016 1017 root = debugfs_create_dir(dev_name(dwc->dev), usb_debug_root); 1018 dwc->debug_root = root; 1019 debugfs_create_regset32("regdump", 0444, root, dwc->regset); 1020 debugfs_create_file("lsp_dump", 0644, root, dwc, &dwc3_lsp_fops); 1021 1022 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE)) 1023 debugfs_create_file("mode", 0644, root, dwc, 1024 &dwc3_mode_fops); 1025 1026 if (IS_ENABLED(CONFIG_USB_DWC3_DUAL_ROLE) || 1027 IS_ENABLED(CONFIG_USB_DWC3_GADGET)) { 1028 debugfs_create_file("testmode", 0644, root, dwc, 1029 &dwc3_testmode_fops); 1030 debugfs_create_file("link_state", 0644, root, dwc, 1031 &dwc3_link_state_fops); 1032 } 1033 } 1034 1035 void dwc3_debugfs_exit(struct dwc3 *dwc) 1036 { 1037 debugfs_lookup_and_remove(dev_name(dwc->dev), usb_debug_root); 1038 kfree(dwc->regset); 1039 } 1040